From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PATCH 4/4] agp/intel-gtt: extract mch buffer flush in i830 chipset flush Date: Sun, 9 May 2010 13:41:26 +0200 Message-ID: <1273405286-3560-5-git-send-email-daniel.vetter@ffwll.ch> References: <1273405286-3560-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.ffwll.ch (cable-static-49-187.intergga.ch [157.161.49.187]) by gabe.freedesktop.org (Postfix) with ESMTP id D29BB9EF22 for ; Sun, 9 May 2010 04:40:41 -0700 (PDT) In-Reply-To: <1273405286-3560-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org Just a small clean up. The real fix will add tons of code here, so it's nice to shrink the function a tad bit, first. Signed-off-by: Daniel Vetter --- drivers/char/agp/intel-gtt.c | 24 ++++++++++++++++-------- 1 files changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index bed0ed6..0277314 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -808,6 +808,20 @@ setup: intel_private.i8xx_cache_flush_num = 0; } +static void intel_flush_mch_write_buffer(void) +{ + memset(intel_private.i8xx_cpu_flush_page, 0, + I830_MCH_WRITE_BUFFER_SIZE); + + mb(); + if (cpu_has_clflush) { + clflush_cache_range(intel_private.i8xx_cpu_flush_page, + I830_MCH_WRITE_BUFFER_SIZE); + } else if (wbinvd_on_all_cpus() != 0) + printk(KERN_ERR "Timed out waiting for cache flush.\n"); + mb(); +} + /* The chipset_flush interface needs to get data that has already been * flushed out of the CPU all the way out to main memory, because the GPU * doesn't snoop those buffers. @@ -846,14 +860,8 @@ static void intel_i830_chipset_flush(struct agp_bridge_data *bridge) intel_private.i8xx_gtt_cc_pages + offset1); mb(); - memset(intel_private.i8xx_cpu_flush_page, 0, - I830_MCH_WRITE_BUFFER_SIZE); - - if (cpu_has_clflush) { - clflush_cache_range(intel_private.i8xx_cpu_flush_page, - I830_MCH_WRITE_BUFFER_SIZE); - } else if (wbinvd_on_all_cpus() != 0) - printk(KERN_ERR "Timed out waiting for cache flush.\n"); + /* start chipset flush */ + intel_flush_mch_write_buffer(); /* read check values */ mb(); -- 1.7.1