Intel-GFX Archive on lore.kernel.org
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From: Alexey Fisher <bug-track@fisher-privat.net>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [regression] drm/i915: cleanup per-pipe reg usage
Date: Sat, 12 Feb 2011 22:02:36 +0100
Message-ID: <1297544556.16171.2.camel@zwerg> (raw)
In-Reply-To: <b9dded$hu5fo8@orsmga002.jf.intel.com>


[-- Attachment #1: Type: text/plain, Size: 683 bytes --]

In attachment are reg_dumps.

intel_1 - is gdm login screen, every thing is ok
intel_2 - is after login, noise
intel_3 - is after mouse pointer was placed to the upper left corner,
image is ok again.

Am Samstag, den 12.02.2011, 18:09 +0000 schrieb Chris Wilson:
> 
> On Sat, 12 Feb 2011 15:16:16 +0100, Alexey Fisher
> <bug-track@fisher-privat.net> wrote:
> > Video is in attachment.
> > 
> > If mouse pointer is on the left top corner i get still image .. if
> not -
> > noise.
> 
> I think intel_reg_dumper before/after will be the best guide as to
> where
> the mistake crept in.
> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre 
-- 
Regards,
        Alexey

[-- Attachment #2: intel_3 --]
[-- Type: text/plain, Size: 9307 bytes --]

                 DCC: 0x000f0400 (single channel, XOR randomization: disabled, XOR bit: 11)
           CHDECMISC: 0x22b97428 (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present)
              C0DRB0: 0x000f0400 (0x0400)
              C0DRB1: 0x0000000f (0x000f)
              C0DRB2: 0x00000000 (0x0000)
              C0DRB3: 0x01180000 (0x0000)
              C1DRB0: 0x0e0d0d0c (0x0d0c)
              C1DRB1: 0x0f0e0e0d (0x0e0d)
              C1DRB2: 0x100f0f0e (0x0f0e)
              C1DRB3: 0x0e0d100f (0x100f)
             C0DRA01: 0x04020118 (0x0118)
             C0DRA23: 0x00000402 (0x0402)
             C1DRA01: 0x100f0e0d (0x0e0d)
             C1DRA23: 0x1211100f (0x100f)
          PGETBL_CTL: 0x7ffc0001
   VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
   VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
       VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
           DPLL_TEST: 0x00010001 ()
        CACHE_MODE_0: 0x00006820
             D_STATE: 0x0000000b
       DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
      RENCLK_GATE_D1: 0x00000000
      RENCLK_GATE_D2: 0x00000000
               SDVOB: 0x00480000 (disabled, pipe A, stall disabled, not detected)
               SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
             SDVOUDI: 0x000000ff
              DSPARB: 0x00001d9c
              DSPFW1: 0x00000000
              DSPFW2: 0x00000000
              DSPFW3: 0x00000000
                ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
                LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
                DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
                DVOB: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
                DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
         DVOA_SRCDIM: 0x00000000
         DVOB_SRCDIM: 0x00000000
         DVOC_SRCDIM: 0x00000000
          PP_CONTROL: 0x00000001 (power target: on)
           PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
        PP_ON_DELAYS: 0x025807d0
       PP_OFF_DELAYS: 0x01f407d0
          PP_DIVISOR: 0x00251b05
        PFIT_CONTROL: 0x00000000
     PFIT_PGM_RATIOS: 0x00000000
     PORT_HOTPLUG_EN: 0x00000220
   PORT_HOTPLUG_STAT: 0x00000000
            DSPACNTR: 0xd9000000 (enabled, pipe B)
          DSPASTRIDE: 0x00001000 (4096 bytes)
             DSPAPOS: 0x00000000 (0, 0)
            DSPASIZE: 0x025703ff (1024, 600)
            DSPABASE: 0x06000000
            DSPASURF: 0x00000000
         DSPATILEOFF: 0x00000000
           PIPEACONF: 0x00000000 (disabled, single-wide)
            PIPEASRC: 0x027f01df (640, 480)
           PIPEASTAT: 0x00000000 (status:)
   PIPEA_GMCH_DATA_M: 0x00000000
   PIPEA_GMCH_DATA_N: 0x00000000
     PIPEA_DP_LINK_M: 0x00000000
     PIPEA_DP_LINK_N: 0x00000000
       CURSOR_A_BASE: 0x00000000
    CURSOR_A_CONTROL: 0x00000000
   CURSOR_A_POSITION: 0x00000000
                FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
                FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
              DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
           DPLL_A_MD: 0x00000000
            HTOTAL_A: 0x031f027f (640 active, 800 total)
            HBLANK_A: 0x03170287 (648 start, 792 end)
             HSYNC_A: 0x02ef028f (656 start, 752 end)
            VTOTAL_A: 0x020c01df (480 active, 525 total)
            VBLANK_A: 0x020401e7 (488 start, 517 end)
             VSYNC_A: 0x01eb01e9 (490 start, 492 end)
           BCLRPAT_A: 0x00000000
        VSYNCSHIFT_A: 0x00000000
            DSPBCNTR: 0x19000000 (disabled, pipe B)
          DSPBSTRIDE: 0x00000c80 (3200 bytes)
             DSPBPOS: 0x00000000 (0, 0)
            DSPBSIZE: 0x0257031f (800, 600)
            DSPBBASE: 0x00000000
            DSPBSURF: 0x00000000
         DSPBTILEOFF: 0x00000000
           PIPEBCONF: 0x80000000 (enabled, single-wide)
            PIPEBSRC: 0x03ff0257 (1024, 600)
           PIPEBSTAT: 0x00000302 (status: VSYNC_INT_STATUS DLINE_COMPARE_STATUS VBLANK_INT_STATUS)
   PIPEB_GMCH_DATA_M: 0x00000000
   PIPEB_GMCH_DATA_N: 0x00000000
     PIPEB_DP_LINK_M: 0x00000000
     PIPEB_DP_LINK_N: 0x00000000
       CURSOR_B_BASE: 0x35ca8000
    CURSOR_B_CONTROL: 0x14070027
   CURSOR_B_POSITION: 0x80048007
                FPB0: 0x00051008 (n = 5, m1 = 16, m2 = 8)
                FPB1: 0x00051008 (n = 5, m1 = 16, m2 = 8)
              DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
           DPLL_B_MD: 0x00000000
            HTOTAL_B: 0x04e103ff (1024 active, 1250 total)
            HBLANK_B: 0x04e103ff (1024 start, 1250 end)
             HSYNC_B: 0x047f045c (1117 start, 1152 end)
            VTOTAL_B: 0x02a70257 (600 active, 680 total)
            VBLANK_B: 0x02a70257 (600 start, 680 end)
             VSYNC_B: 0x025d0258 (601 start, 606 end)
           BCLRPAT_B: 0x00000000
        VSYNCSHIFT_B: 0x00000000
   VCLK_DIVISOR_VGA0: 0x00031108
   VCLK_DIVISOR_VGA1: 0x00031406
       VCLK_POST_DIV: 0x00020002
            VGACNTRL: 0x80000000 (disabled)
              TV_CTL: 0x00000010
              TV_DAC: 0x70000000
            TV_CSC_Y: 0x00000000
           TV_CSC_Y2: 0x00000000
            TV_CSC_U: 0x00000000
           TV_CSC_U2: 0x00000000
            TV_CSC_V: 0x00000000
           TV_CSC_V2: 0x00000000
        TV_CLR_KNOBS: 0x00000000
        TV_CLR_LEVEL: 0x00000000
          TV_H_CTL_1: 0x00000000
          TV_H_CTL_2: 0x00000000
          TV_H_CTL_3: 0x00000000
          TV_V_CTL_1: 0x00000000
          TV_V_CTL_2: 0x00000000
          TV_V_CTL_3: 0x00000000
          TV_V_CTL_4: 0x00000000
          TV_V_CTL_5: 0x00000000
          TV_V_CTL_6: 0x00000000
          TV_V_CTL_7: 0x00000000
         TV_SC_CTL_1: 0x00000000
         TV_SC_CTL_2: 0x00000000
         TV_SC_CTL_3: 0x00000000
          TV_WIN_POS: 0x00000000
         TV_WIN_SIZE: 0x00000000
     TV_FILTER_CTL_1: 0x00000000
     TV_FILTER_CTL_2: 0x00000000
     TV_FILTER_CTL_3: 0x00000000
       TV_CC_CONTROL: 0x00000000
          TV_CC_DATA: 0x00000000
         TV_H_LUMA_0: 0x00000000
        TV_H_LUMA_59: 0x00000000
       TV_H_CHROMA_0: 0x00000000
      TV_H_CHROMA_59: 0x00000000
        FBC_CFB_BASE: 0x00000000
         FBC_LL_BASE: 0x00000000
         FBC_CONTROL: 0x00000000
         FBC_COMMAND: 0x00000000
          FBC_STATUS: 0x20000000
        FBC_CONTROL2: 0x00000000
       FBC_FENCE_OFF: 0x00000000
         FBC_MOD_NUM: 0x00000000
             MI_MODE: 0x00000200
        MI_ARB_STATE: 0x00000840
      MI_RDRET_STATE: 0x00000000
             ECOSKPD: 0x00000307
                DP_B: 0x00000000
      DPB_AUX_CH_CTL: 0x00000000
    DPB_AUX_CH_DATA1: 0x00000000
    DPB_AUX_CH_DATA2: 0x00000000
    DPB_AUX_CH_DATA3: 0x00000000
    DPB_AUX_CH_DATA4: 0x00000000
    DPB_AUX_CH_DATA5: 0x00000000
                DP_C: 0x00000000
      DPC_AUX_CH_CTL: 0x00000000
    DPC_AUX_CH_DATA1: 0x00000000
    DPC_AUX_CH_DATA2: 0x00000000
    DPC_AUX_CH_DATA3: 0x00000000
    DPC_AUX_CH_DATA4: 0x00000000
    DPC_AUX_CH_DATA5: 0x00000000
                DP_D: 0x00000000
      DPD_AUX_CH_CTL: 0x00000000
    DPD_AUX_CH_DATA1: 0x00000000
    DPD_AUX_CH_DATA2: 0x00000000
    DPD_AUX_CH_DATA3: 0x00000000
    DPD_AUX_CH_DATA4: 0x00000000
    DPD_AUX_CH_DATA5: 0x00000000
          AUD_CONFIG: 0x00000000
    AUD_HDMIW_STATUS: 0x00000000
      AUD_CONV_CHCNT: 0x00000000
       VIDEO_DIP_CTL: 0x00000000
       AUD_PINW_CNTR: 0x00000000
         AUD_CNTL_ST: 0x00000000
         AUD_PIN_CAP: 0x00000000
        AUD_PINW_CAP: 0x00000000
  AUD_PINW_UNSOLRESP: 0x00000000
    AUD_OUT_DIG_CNVT: 0x00000000
       AUD_OUT_CWCAP: 0x00000000
         AUD_GRP_CAP: 0x00000000
            FENCE  0: 0x02600031 (enabled, X tiled, 4096 pitch, 0x02600000 - 0x02700000 (1024kb))
            FENCE  1: 0x04000001 (enabled, X tiled,  512 pitch, 0x04000000 - 0x04100000 (1024kb))
            FENCE  2: 0x02000001 (enabled, X tiled,  512 pitch, 0x02000000 - 0x02100000 (1024kb))
            FENCE  3: 0x05500031 (enabled, X tiled, 4096 pitch, 0x05500000 - 0x05600000 (1024kb))
            FENCE  4: 0x01100001 (enabled, X tiled,  512 pitch, 0x01100000 - 0x01200000 (1024kb))
            FENCE  5: 0x03c00001 (enabled, X tiled,  512 pitch, 0x03c00000 - 0x03d00000 (1024kb))
            FENCE  6: 0x05400031 (enabled, X tiled, 4096 pitch, 0x05400000 - 0x05500000 (1024kb))
            FENCE  7: 0x01300001 (enabled, X tiled,  512 pitch, 0x01300000 - 0x01400000 (1024kb))
            FENCE  8: 0x02800031 (enabled, X tiled, 4096 pitch, 0x02800000 - 0x02900000 (1024kb))
            FENCE  9: 0x00800231 (enabled, X tiled, 4096 pitch, 0x00800000 - 0x00c00000 (4096kb))
           FENCE  10: 0x06000231 (enabled, X tiled, 4096 pitch, 0x06000000 - 0x06400000 (4096kb))
           FENCE  11: 0x01200031 (enabled, X tiled, 4096 pitch, 0x01200000 - 0x01300000 (1024kb))
           FENCE  12: 0x05b00031 (enabled, X tiled, 4096 pitch, 0x05b00000 - 0x05c00000 (1024kb))
           FENCE  13: 0x00000000 (disabled)
           FENCE  14: 0x00000000 (disabled)
           FENCE  15: 0x00000000 (disabled)
             INST_PM: 0x00000000
pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
pipe B dot 51020 n 5 m1 16 m2 8 p1 2 p2 14

[-- Attachment #3: intel_2 --]
[-- Type: text/plain, Size: 9250 bytes --]

                 DCC: 0x000f0400 (single channel, XOR randomization: disabled, XOR bit: 11)
           CHDECMISC: 0x22b97428 (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present)
              C0DRB0: 0x000f0400 (0x0400)
              C0DRB1: 0x0000000f (0x000f)
              C0DRB2: 0x00000000 (0x0000)
              C0DRB3: 0x01180000 (0x0000)
              C1DRB0: 0x0e0d0d0c (0x0d0c)
              C1DRB1: 0x0f0e0e0d (0x0e0d)
              C1DRB2: 0x100f0f0e (0x0f0e)
              C1DRB3: 0x0e0d100f (0x100f)
             C0DRA01: 0x04020118 (0x0118)
             C0DRA23: 0x00000402 (0x0402)
             C1DRA01: 0x100f0e0d (0x0e0d)
             C1DRA23: 0x1211100f (0x100f)
          PGETBL_CTL: 0x7ffc0001
   VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
   VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
       VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
           DPLL_TEST: 0x00010001 ()
        CACHE_MODE_0: 0x00006820
             D_STATE: 0x0000000b
       DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
      RENCLK_GATE_D1: 0x00000000
      RENCLK_GATE_D2: 0x00000000
               SDVOB: 0x00480000 (disabled, pipe A, stall disabled, not detected)
               SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
             SDVOUDI: 0x000000ff
              DSPARB: 0x00001d9c
              DSPFW1: 0x00000000
              DSPFW2: 0x00000000
              DSPFW3: 0x00000000
                ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
                LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
                DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
                DVOB: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
                DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
         DVOA_SRCDIM: 0x00000000
         DVOB_SRCDIM: 0x00000000
         DVOC_SRCDIM: 0x00000000
          PP_CONTROL: 0x00000001 (power target: on)
           PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
        PP_ON_DELAYS: 0x025807d0
       PP_OFF_DELAYS: 0x01f407d0
          PP_DIVISOR: 0x00251b05
        PFIT_CONTROL: 0x00000000
     PFIT_PGM_RATIOS: 0x00000000
     PORT_HOTPLUG_EN: 0x00000220
   PORT_HOTPLUG_STAT: 0x00000000
            DSPACNTR: 0xd9000000 (enabled, pipe B)
          DSPASTRIDE: 0x00001000 (4096 bytes)
             DSPAPOS: 0x00000000 (0, 0)
            DSPASIZE: 0x025703ff (1024, 600)
            DSPABASE: 0x06000000
            DSPASURF: 0x00000000
         DSPATILEOFF: 0x00000000
           PIPEACONF: 0x00000000 (disabled, single-wide)
            PIPEASRC: 0x027f01df (640, 480)
           PIPEASTAT: 0x00000000 (status:)
   PIPEA_GMCH_DATA_M: 0x00000000
   PIPEA_GMCH_DATA_N: 0x00000000
     PIPEA_DP_LINK_M: 0x00000000
     PIPEA_DP_LINK_N: 0x00000000
       CURSOR_A_BASE: 0x00000000
    CURSOR_A_CONTROL: 0x00000000
   CURSOR_A_POSITION: 0x00000000
                FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
                FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
              DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
           DPLL_A_MD: 0x00000000
            HTOTAL_A: 0x031f027f (640 active, 800 total)
            HBLANK_A: 0x03170287 (648 start, 792 end)
             HSYNC_A: 0x02ef028f (656 start, 752 end)
            VTOTAL_A: 0x020c01df (480 active, 525 total)
            VBLANK_A: 0x020401e7 (488 start, 517 end)
             VSYNC_A: 0x01eb01e9 (490 start, 492 end)
           BCLRPAT_A: 0x00000000
        VSYNCSHIFT_A: 0x00000000
            DSPBCNTR: 0x19000000 (disabled, pipe B)
          DSPBSTRIDE: 0x00000c80 (3200 bytes)
             DSPBPOS: 0x00000000 (0, 0)
            DSPBSIZE: 0x0257031f (800, 600)
            DSPBBASE: 0x00000000
            DSPBSURF: 0x00000000
         DSPBTILEOFF: 0x00000000
           PIPEBCONF: 0x80000000 (enabled, single-wide)
            PIPEBSRC: 0x03ff0257 (1024, 600)
           PIPEBSTAT: 0x80020100 (status: FIFO_UNDERRUN VBLANK_INT_ENABLE DLINE_COMPARE_STATUS)
   PIPEB_GMCH_DATA_M: 0x00000000
   PIPEB_GMCH_DATA_N: 0x00000000
     PIPEB_DP_LINK_M: 0x00000000
     PIPEB_DP_LINK_N: 0x00000000
       CURSOR_B_BASE: 0x35ca8000
    CURSOR_B_CONTROL: 0x14070027
   CURSOR_B_POSITION: 0x01540210
                FPB0: 0x00051008 (n = 5, m1 = 16, m2 = 8)
                FPB1: 0x00051008 (n = 5, m1 = 16, m2 = 8)
              DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
           DPLL_B_MD: 0x00000000
            HTOTAL_B: 0x04e103ff (1024 active, 1250 total)
            HBLANK_B: 0x04e103ff (1024 start, 1250 end)
             HSYNC_B: 0x047f045c (1117 start, 1152 end)
            VTOTAL_B: 0x02a70257 (600 active, 680 total)
            VBLANK_B: 0x02a70257 (600 start, 680 end)
             VSYNC_B: 0x025d0258 (601 start, 606 end)
           BCLRPAT_B: 0x00000000
        VSYNCSHIFT_B: 0x00000000
   VCLK_DIVISOR_VGA0: 0x00031108
   VCLK_DIVISOR_VGA1: 0x00031406
       VCLK_POST_DIV: 0x00020002
            VGACNTRL: 0x80000000 (disabled)
              TV_CTL: 0x00000010
              TV_DAC: 0x70000000
            TV_CSC_Y: 0x00000000
           TV_CSC_Y2: 0x00000000
            TV_CSC_U: 0x00000000
           TV_CSC_U2: 0x00000000
            TV_CSC_V: 0x00000000
           TV_CSC_V2: 0x00000000
        TV_CLR_KNOBS: 0x00000000
        TV_CLR_LEVEL: 0x00000000
          TV_H_CTL_1: 0x00000000
          TV_H_CTL_2: 0x00000000
          TV_H_CTL_3: 0x00000000
          TV_V_CTL_1: 0x00000000
          TV_V_CTL_2: 0x00000000
          TV_V_CTL_3: 0x00000000
          TV_V_CTL_4: 0x00000000
          TV_V_CTL_5: 0x00000000
          TV_V_CTL_6: 0x00000000
          TV_V_CTL_7: 0x00000000
         TV_SC_CTL_1: 0x00000000
         TV_SC_CTL_2: 0x00000000
         TV_SC_CTL_3: 0x00000000
          TV_WIN_POS: 0x00000000
         TV_WIN_SIZE: 0x00000000
     TV_FILTER_CTL_1: 0x00000000
     TV_FILTER_CTL_2: 0x00000000
     TV_FILTER_CTL_3: 0x00000000
       TV_CC_CONTROL: 0x00000000
          TV_CC_DATA: 0x00000000
         TV_H_LUMA_0: 0x00000000
        TV_H_LUMA_59: 0x00000000
       TV_H_CHROMA_0: 0x00000000
      TV_H_CHROMA_59: 0x00000000
        FBC_CFB_BASE: 0x00000000
         FBC_LL_BASE: 0x00000000
         FBC_CONTROL: 0x00000000
         FBC_COMMAND: 0x00000000
          FBC_STATUS: 0x20000000
        FBC_CONTROL2: 0x00000000
       FBC_FENCE_OFF: 0x00000000
         FBC_MOD_NUM: 0x00000000
             MI_MODE: 0x00000200
        MI_ARB_STATE: 0x00000840
      MI_RDRET_STATE: 0x00000000
             ECOSKPD: 0x00000307
                DP_B: 0x00000000
      DPB_AUX_CH_CTL: 0x00000000
    DPB_AUX_CH_DATA1: 0x00000000
    DPB_AUX_CH_DATA2: 0x00000000
    DPB_AUX_CH_DATA3: 0x00000000
    DPB_AUX_CH_DATA4: 0x00000000
    DPB_AUX_CH_DATA5: 0x00000000
                DP_C: 0x00000000
      DPC_AUX_CH_CTL: 0x00000000
    DPC_AUX_CH_DATA1: 0x00000000
    DPC_AUX_CH_DATA2: 0x00000000
    DPC_AUX_CH_DATA3: 0x00000000
    DPC_AUX_CH_DATA4: 0x00000000
    DPC_AUX_CH_DATA5: 0x00000000
                DP_D: 0x00000000
      DPD_AUX_CH_CTL: 0x00000000
    DPD_AUX_CH_DATA1: 0x00000000
    DPD_AUX_CH_DATA2: 0x00000000
    DPD_AUX_CH_DATA3: 0x00000000
    DPD_AUX_CH_DATA4: 0x00000000
    DPD_AUX_CH_DATA5: 0x00000000
          AUD_CONFIG: 0x00000000
    AUD_HDMIW_STATUS: 0x00000000
      AUD_CONV_CHCNT: 0x00000000
       VIDEO_DIP_CTL: 0x00000000
       AUD_PINW_CNTR: 0x00000000
         AUD_CNTL_ST: 0x00000000
         AUD_PIN_CAP: 0x00000000
        AUD_PINW_CAP: 0x00000000
  AUD_PINW_UNSOLRESP: 0x00000000
    AUD_OUT_DIG_CNVT: 0x00000000
       AUD_OUT_CWCAP: 0x00000000
         AUD_GRP_CAP: 0x00000000
            FENCE  0: 0x03f00031 (enabled, X tiled, 4096 pitch, 0x03f00000 - 0x04000000 (1024kb))
            FENCE  1: 0x04000001 (enabled, X tiled,  512 pitch, 0x04000000 - 0x04100000 (1024kb))
            FENCE  2: 0x02600031 (enabled, X tiled, 4096 pitch, 0x02600000 - 0x02700000 (1024kb))
            FENCE  3: 0x05500031 (enabled, X tiled, 4096 pitch, 0x05500000 - 0x05600000 (1024kb))
            FENCE  4: 0x01100001 (enabled, X tiled,  512 pitch, 0x01100000 - 0x01200000 (1024kb))
            FENCE  5: 0x03c00001 (enabled, X tiled,  512 pitch, 0x03c00000 - 0x03d00000 (1024kb))
            FENCE  6: 0x05400031 (enabled, X tiled, 4096 pitch, 0x05400000 - 0x05500000 (1024kb))
            FENCE  7: 0x01300001 (enabled, X tiled,  512 pitch, 0x01300000 - 0x01400000 (1024kb))
            FENCE  8: 0x00000000 (disabled)
            FENCE  9: 0x00800231 (enabled, X tiled, 4096 pitch, 0x00800000 - 0x00c00000 (4096kb))
           FENCE  10: 0x06000231 (enabled, X tiled, 4096 pitch, 0x06000000 - 0x06400000 (4096kb))
           FENCE  11: 0x01200031 (enabled, X tiled, 4096 pitch, 0x01200000 - 0x01300000 (1024kb))
           FENCE  12: 0x05b00031 (enabled, X tiled, 4096 pitch, 0x05b00000 - 0x05c00000 (1024kb))
           FENCE  13: 0x00000000 (disabled)
           FENCE  14: 0x00000000 (disabled)
           FENCE  15: 0x00000000 (disabled)
             INST_PM: 0x00000000
pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
pipe B dot 51020 n 5 m1 16 m2 8 p1 2 p2 14

[-- Attachment #4: intel_1 --]
[-- Type: text/plain, Size: 8854 bytes --]

                 DCC: 0x000f0400 (single channel, XOR randomization: disabled, XOR bit: 11)
           CHDECMISC: 0x22b97428 (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh disabled, flex disabled, ep not present)
              C0DRB0: 0x000f0400 (0x0400)
              C0DRB1: 0x0000000f (0x000f)
              C0DRB2: 0x00000000 (0x0000)
              C0DRB3: 0x01180000 (0x0000)
              C1DRB0: 0x0e0d0d0c (0x0d0c)
              C1DRB1: 0x0f0e0e0d (0x0e0d)
              C1DRB2: 0x100f0f0e (0x0f0e)
              C1DRB3: 0x0e0d100f (0x100f)
             C0DRA01: 0x04020118 (0x0118)
             C0DRA23: 0x00000402 (0x0402)
             C1DRA01: 0x100f0e0d (0x0e0d)
             C1DRA23: 0x1211100f (0x100f)
          PGETBL_CTL: 0x7ffc0001
   VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
   VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
       VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
           DPLL_TEST: 0x00010001 ()
        CACHE_MODE_0: 0x00006820
             D_STATE: 0x0000000b
       DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
      RENCLK_GATE_D1: 0x00000000
      RENCLK_GATE_D2: 0x00000000
               SDVOB: 0x00480000 (disabled, pipe A, stall disabled, not detected)
               SDVOC: 0x00480000 (disabled, pipe A, stall disabled, not detected)
             SDVOUDI: 0x000000ff
              DSPARB: 0x00001d9c
              DSPFW1: 0x00000000
              DSPFW2: 0x00000000
              DSPFW3: 0x00000000
                ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
                LVDS: 0xc0300300 (enabled, pipe B, 18 bit, 1 channel)
                DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
                DVOB: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
                DVOC: 0x00480000 (disabled, pipe A, no stall, -hsync, -vsync)
         DVOA_SRCDIM: 0x00000000
         DVOB_SRCDIM: 0x00000000
         DVOC_SRCDIM: 0x00000000
          PP_CONTROL: 0x00000001 (power target: on)
           PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
        PP_ON_DELAYS: 0x025807d0
       PP_OFF_DELAYS: 0x01f407d0
          PP_DIVISOR: 0x00251b05
        PFIT_CONTROL: 0x00000000
     PFIT_PGM_RATIOS: 0x00000000
     PORT_HOTPLUG_EN: 0x00000220
   PORT_HOTPLUG_STAT: 0x00000000
            DSPACNTR: 0xd9000000 (enabled, pipe B)
          DSPASTRIDE: 0x00001000 (4096 bytes)
             DSPAPOS: 0x00000000 (0, 0)
            DSPASIZE: 0x025703ff (1024, 600)
            DSPABASE: 0x00800000
            DSPASURF: 0x00000000
         DSPATILEOFF: 0x00000000
           PIPEACONF: 0x00000000 (disabled, single-wide)
            PIPEASRC: 0x027f01df (640, 480)
           PIPEASTAT: 0x00000000 (status:)
   PIPEA_GMCH_DATA_M: 0x00000000
   PIPEA_GMCH_DATA_N: 0x00000000
     PIPEA_DP_LINK_M: 0x00000000
     PIPEA_DP_LINK_N: 0x00000000
       CURSOR_A_BASE: 0x00000000
    CURSOR_A_CONTROL: 0x00000000
   CURSOR_A_POSITION: 0x00000000
                FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
                FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
              DPLL_A: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
           DPLL_A_MD: 0x00000000
            HTOTAL_A: 0x031f027f (640 active, 800 total)
            HBLANK_A: 0x03170287 (648 start, 792 end)
             HSYNC_A: 0x02ef028f (656 start, 752 end)
            VTOTAL_A: 0x020c01df (480 active, 525 total)
            VBLANK_A: 0x020401e7 (488 start, 517 end)
             VSYNC_A: 0x01eb01e9 (490 start, 492 end)
           BCLRPAT_A: 0x00000000
        VSYNCSHIFT_A: 0x00000000
            DSPBCNTR: 0x19000000 (disabled, pipe B)
          DSPBSTRIDE: 0x00000c80 (3200 bytes)
             DSPBPOS: 0x00000000 (0, 0)
            DSPBSIZE: 0x0257031f (800, 600)
            DSPBBASE: 0x00000000
            DSPBSURF: 0x00000000
         DSPBTILEOFF: 0x00000000
           PIPEBCONF: 0x80000000 (enabled, single-wide)
            PIPEBSRC: 0x03ff0257 (1024, 600)
           PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
   PIPEB_GMCH_DATA_M: 0x00000000
   PIPEB_GMCH_DATA_N: 0x00000000
     PIPEB_DP_LINK_M: 0x00000000
     PIPEB_DP_LINK_N: 0x00000000
       CURSOR_B_BASE: 0x35ca8000
    CURSOR_B_CONTROL: 0x14070027
   CURSOR_B_POSITION: 0x012801f9
                FPB0: 0x00051008 (n = 5, m1 = 16, m2 = 8)
                FPB1: 0x00051008 (n = 5, m1 = 16, m2 = 8)
              DPLL_B: 0x98026000 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14, SDVO mult 1)
           DPLL_B_MD: 0x00000000
            HTOTAL_B: 0x04e103ff (1024 active, 1250 total)
            HBLANK_B: 0x04e103ff (1024 start, 1250 end)
             HSYNC_B: 0x047f045c (1117 start, 1152 end)
            VTOTAL_B: 0x02a70257 (600 active, 680 total)
            VBLANK_B: 0x02a70257 (600 start, 680 end)
             VSYNC_B: 0x025d0258 (601 start, 606 end)
           BCLRPAT_B: 0x00000000
        VSYNCSHIFT_B: 0x00000000
   VCLK_DIVISOR_VGA0: 0x00031108
   VCLK_DIVISOR_VGA1: 0x00031406
       VCLK_POST_DIV: 0x00020002
            VGACNTRL: 0x80000000 (disabled)
              TV_CTL: 0x00000010
              TV_DAC: 0x70000000
            TV_CSC_Y: 0x00000000
           TV_CSC_Y2: 0x00000000
            TV_CSC_U: 0x00000000
           TV_CSC_U2: 0x00000000
            TV_CSC_V: 0x00000000
           TV_CSC_V2: 0x00000000
        TV_CLR_KNOBS: 0x00000000
        TV_CLR_LEVEL: 0x00000000
          TV_H_CTL_1: 0x00000000
          TV_H_CTL_2: 0x00000000
          TV_H_CTL_3: 0x00000000
          TV_V_CTL_1: 0x00000000
          TV_V_CTL_2: 0x00000000
          TV_V_CTL_3: 0x00000000
          TV_V_CTL_4: 0x00000000
          TV_V_CTL_5: 0x00000000
          TV_V_CTL_6: 0x00000000
          TV_V_CTL_7: 0x00000000
         TV_SC_CTL_1: 0x00000000
         TV_SC_CTL_2: 0x00000000
         TV_SC_CTL_3: 0x00000000
          TV_WIN_POS: 0x00000000
         TV_WIN_SIZE: 0x00000000
     TV_FILTER_CTL_1: 0x00000000
     TV_FILTER_CTL_2: 0x00000000
     TV_FILTER_CTL_3: 0x00000000
       TV_CC_CONTROL: 0x00000000
          TV_CC_DATA: 0x00000000
         TV_H_LUMA_0: 0x00000000
        TV_H_LUMA_59: 0x00000000
       TV_H_CHROMA_0: 0x00000000
      TV_H_CHROMA_59: 0x00000000
        FBC_CFB_BASE: 0x00000000
         FBC_LL_BASE: 0x00000000
         FBC_CONTROL: 0x00000000
         FBC_COMMAND: 0x00000000
          FBC_STATUS: 0x20000000
        FBC_CONTROL2: 0x00000000
       FBC_FENCE_OFF: 0x00000000
         FBC_MOD_NUM: 0x00000000
             MI_MODE: 0x00000200
        MI_ARB_STATE: 0x00000840
      MI_RDRET_STATE: 0x00000000
             ECOSKPD: 0x00000307
                DP_B: 0x00000000
      DPB_AUX_CH_CTL: 0x00000000
    DPB_AUX_CH_DATA1: 0x00000000
    DPB_AUX_CH_DATA2: 0x00000000
    DPB_AUX_CH_DATA3: 0x00000000
    DPB_AUX_CH_DATA4: 0x00000000
    DPB_AUX_CH_DATA5: 0x00000000
                DP_C: 0x00000000
      DPC_AUX_CH_CTL: 0x00000000
    DPC_AUX_CH_DATA1: 0x00000000
    DPC_AUX_CH_DATA2: 0x00000000
    DPC_AUX_CH_DATA3: 0x00000000
    DPC_AUX_CH_DATA4: 0x00000000
    DPC_AUX_CH_DATA5: 0x00000000
                DP_D: 0x00000000
      DPD_AUX_CH_CTL: 0x00000000
    DPD_AUX_CH_DATA1: 0x00000000
    DPD_AUX_CH_DATA2: 0x00000000
    DPD_AUX_CH_DATA3: 0x00000000
    DPD_AUX_CH_DATA4: 0x00000000
    DPD_AUX_CH_DATA5: 0x00000000
          AUD_CONFIG: 0x00000000
    AUD_HDMIW_STATUS: 0x00000000
      AUD_CONV_CHCNT: 0x00000000
       VIDEO_DIP_CTL: 0x00000000
       AUD_PINW_CNTR: 0x00000000
         AUD_CNTL_ST: 0x00000000
         AUD_PIN_CAP: 0x00000000
        AUD_PINW_CAP: 0x00000000
  AUD_PINW_UNSOLRESP: 0x00000000
    AUD_OUT_DIG_CNVT: 0x00000000
       AUD_OUT_CWCAP: 0x00000000
         AUD_GRP_CAP: 0x00000000
            FENCE  0: 0x00800231 (enabled, X tiled, 4096 pitch, 0x00800000 - 0x00c00000 (4096kb))
            FENCE  1: 0x00c00231 (enabled, X tiled, 4096 pitch, 0x00c00000 - 0x01000000 (4096kb))
            FENCE  2: 0x01000231 (enabled, X tiled, 4096 pitch, 0x01000000 - 0x01400000 (4096kb))
            FENCE  3: 0x01400231 (enabled, X tiled, 4096 pitch, 0x01400000 - 0x01800000 (4096kb))
            FENCE  4: 0x01800231 (enabled, X tiled, 4096 pitch, 0x01800000 - 0x01c00000 (4096kb))
            FENCE  5: 0x00000000 (disabled)
            FENCE  6: 0x00000000 (disabled)
            FENCE  7: 0x00000000 (disabled)
            FENCE  8: 0x00000000 (disabled)
            FENCE  9: 0x00000000 (disabled)
           FENCE  10: 0x00000000 (disabled)
           FENCE  11: 0x00000000 (disabled)
           FENCE  12: 0x00000000 (disabled)
           FENCE  13: 0x00000000 (disabled)
           FENCE  14: 0x00000000 (disabled)
           FENCE  15: 0x00000000 (disabled)
             INST_PM: 0x00000000
pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
pipe B dot 51020 n 5 m1 16 m2 8 p1 2 p2 14

[-- Attachment #5: Type: text/plain, Size: 159 bytes --]

_______________________________________________
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  parent reply index

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-02-11 20:59 Alexey Fisher
     [not found] ` <1297520176.10989.1.camel@zwerg>
     [not found]   ` <b9dded$hu5fo8@orsmga002.jf.intel.com>
2011-02-12 21:02     ` Alexey Fisher [this message]
2011-02-16 18:42       ` Jesse Barnes
2011-02-16 18:57       ` Jesse Barnes
2011-02-17  7:26         ` Alexey Fisher
2011-02-17 18:32           ` Jesse Barnes
2011-02-17 20:54             ` Alexey Fisher
2011-02-17 21:09               ` Jesse Barnes
2011-02-17 21:24                 ` Alexey Fisher
2011-02-17 21:26                   ` Alexey Fisher

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