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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/8] drm/i915: skip redundant operations whilst enabling pipes and planes
Date: Fri, 18 Mar 2011 08:02:04 +0000
Message-ID: <1300435330-15934-3-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1300435330-15934-1-git-send-email-chris@chris-wilson.co.uk>

If the pipe or plane is already enabled, then we do not need to enable
it again and can skip the delay.

References: https://bugs.freedesktop.org/show_bug.cgi?id=34601
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_display.c |   24 ++++++++++++++++--------
 1 files changed, 16 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3bc6ab5..841f039 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1516,8 +1516,10 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 
 	reg = PIPECONF(pipe);
 	val = I915_READ(reg);
-	val |= PIPECONF_ENABLE;
-	I915_WRITE(reg, val);
+	if (val & PIPECONF_ENABLE)
+		return;
+
+	I915_WRITE(reg, val | PIPECONF_ENABLE);
 	intel_wait_for_vblank(dev_priv->dev, pipe);
 }
 
@@ -1551,8 +1553,10 @@ static void intel_disable_pipe(struct drm_i915_private *dev_priv,
 
 	reg = PIPECONF(pipe);
 	val = I915_READ(reg);
-	val &= ~PIPECONF_ENABLE;
-	I915_WRITE(reg, val);
+	if ((val & PIPECONF_ENABLE) == 0)
+		return;
+
+	I915_WRITE(reg, val & ~PIPECONF_ENABLE);
 	intel_wait_for_pipe_off(dev_priv->dev, pipe);
 }
 
@@ -1575,8 +1579,10 @@ static void intel_enable_plane(struct drm_i915_private *dev_priv,
 
 	reg = DSPCNTR(plane);
 	val = I915_READ(reg);
-	val |= DISPLAY_PLANE_ENABLE;
-	I915_WRITE(reg, val);
+	if (val & DISPLAY_PLANE_ENABLE)
+		return;
+
+	I915_WRITE(reg, val | DISPLAY_PLANE_ENABLE);
 	intel_wait_for_vblank(dev_priv->dev, pipe);
 }
 
@@ -1607,8 +1613,10 @@ static void intel_disable_plane(struct drm_i915_private *dev_priv,
 
 	reg = DSPCNTR(plane);
 	val = I915_READ(reg);
-	val &= ~DISPLAY_PLANE_ENABLE;
-	I915_WRITE(reg, val);
+	if ((val & DISPLAY_PLANE_ENABLE) == 0)
+		return;
+
+	I915_WRITE(reg, val & ~DISPLAY_PLANE_ENABLE);
 	intel_flush_display_plane(dev_priv, plane);
 	intel_wait_for_vblank(dev_priv->dev, pipe);
 }
-- 
1.7.2.3

  parent reply index

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-03-18  8:02 Patch queue for -fixes Chris Wilson
2011-03-18  8:02 ` [PATCH 1/8] drm/i915: Remove surplus POSTING_READs before wait_for_vblank Chris Wilson
2011-03-18 14:42   ` Keith Packard
2011-03-18 16:23   ` Jesse Barnes
2011-03-18  8:02 ` Chris Wilson [this message]
2011-03-18 14:46   ` [PATCH 2/8] drm/i915: skip redundant operations whilst enabling pipes and planes Keith Packard
2011-03-18 16:25   ` Jesse Barnes
2011-03-18 17:37     ` Chris Wilson
2011-03-18 17:41       ` Jesse Barnes
2011-03-18  8:02 ` [PATCH 3/8] drm/i915: Flush the plane enable using the DSPCNTR latch Chris Wilson
2011-03-18 15:09   ` Keith Packard
2011-03-18 16:26   ` Jesse Barnes
2011-03-18 17:42     ` Chris Wilson
2011-03-18  8:02 ` [PATCH 4/8] drm/i915: Only wait for vblank after pipe enabling on gen2 Chris Wilson
2011-03-18 15:10   ` Keith Packard
2011-03-18 16:27   ` Jesse Barnes
2011-03-18  8:02 ` [PATCH 5/8] drm/i915: Prevent racy removal of request from client list Chris Wilson
2011-03-18  8:02 ` [PATCH 6/8] drm: Fix use-after-free in drm_gem_vm_close() Chris Wilson
2011-03-18 15:15   ` [Intel-gfx] " Keith Packard
2011-03-18  8:02 ` [PATCH 7/8] drm/i915: Re-enable self-refresh Chris Wilson
2011-03-18 15:22   ` Keith Packard
2011-03-18 17:48     ` Chris Wilson
2011-03-18 18:12     ` Eric Anholt
2011-03-18 19:08       ` Chris Wilson
2011-03-18  8:02 ` [PATCH 8/8] drm/i915: Fix tiling corruption from pipelined fencing Chris Wilson
2011-03-19 22:17   ` Daniel Vetter
2011-03-19 22:25     ` Chris Wilson
2011-03-19 23:12       ` Daniel Vetter

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