From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PATCH] drm/i915: fix relaxed tiling on gen2 Date: Sat, 26 Mar 2011 15:22:57 +0100 Message-ID: <1301149377-7195-1-git-send-email-daniel.vetter@ffwll.ch> References: <849307$c62598@azsmga001.ch.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.ffwll.ch (cable-static-216-94.intergga.ch [87.102.216.94]) by gabe.freedesktop.org (Postfix) with ESMTP id A5F159E78C for ; Sat, 26 Mar 2011 07:25:31 -0700 (PDT) In-Reply-To: <849307$c62598@azsmga001.ch.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: Daniel Vetter , intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Userspace was broken and assumed 8 rows. Complain with a printk_once and disallow such tiling requests. Also experiments and randoms cues from i81x docs suggest that y-tiling doesn't work with fences (it's already known to be broken on the blitter). Original idea seems to be to use y-tiling for textures with a manually tiling upload path. Hence also disallow y-tiling - current userspace doesn't use it at all, anyway. Signed-off-by: Daniel Vetter --- IMO a -next patch. If people keep on complaining that .2.6.38 broke their machines we can backport the printk_once; return -EINVAL hunk. -Daniel drivers/gpu/drm/i915/i915_gem.c | 5 +++-- drivers/gpu/drm/i915/i915_gem_tiling.c | 9 +++++++++ 2 files changed, 12 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 4554b2f..bc96e70 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -1452,8 +1452,9 @@ i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj) * edge of an even tile row (where tile rows are counted as if the bo is * placed in a fenced gtt region). */ - if (IS_GEN2(dev) || - (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) + if (IS_GEN2(dev)) + tile_height = 16; + else if (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)) tile_height = 32; else tile_height = 8; diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index 281ad3d..693e6e8 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c @@ -190,6 +190,9 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) if (tiling_mode == I915_TILING_NONE) return true; + if (IS_GEN2(dev) && tiling_mode == I915_TILING_Y) + return false; + if (IS_GEN2(dev) || (tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) tile_width = 128; @@ -226,6 +229,12 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode) if (stride < tile_width) return false; + if (IS_GEN2(dev) && (size / tile_width) % 16 != 0) { + printk_once("broken userspace detected, " + "please upgrade libdrm and xf86-video-intel\n"); + return false; + } + if (stride & (stride - 1)) return false; -- 1.7.4.1