From: Eric Anholt <eric@anholt.net>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 6/6] drm/i915: Use the LLC mode on gen6 for everything but display.
Date: Tue, 29 Mar 2011 16:59:55 -0700 [thread overview]
Message-ID: <1301443195-10721-7-git-send-email-eric@anholt.net> (raw)
In-Reply-To: <1301443195-10721-1-git-send-email-eric@anholt.net>
Improves full-screen openarena on my laptop 20.3% +/- 4.0% (n=3)
Improves 800x600 nexuiz on my laptop 12.3% +/- 0.1% (n=3)
We have more room to improve with doing LLC caching for display using
GFDT, and in doing LLC+MLC caching, but this was an easy performance
win and incremental improvement toward those two.
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
---
drivers/gpu/drm/i915/i915_gem.c | 18 +++++++++++++++++-
1 files changed, 17 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index de9a446..87d4e17 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3623,7 +3623,23 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
obj->base.write_domain = I915_GEM_DOMAIN_CPU;
obj->base.read_domains = I915_GEM_DOMAIN_CPU;
- obj->cache_level = I915_CACHE_NONE;
+ if (IS_GEN6(dev)) {
+ /* On Gen6, we can have the GPU use the LLC (the CPU
+ * cache) for about a 10% performance improvement
+ * compared to uncached. Graphics requests other than
+ * display scanout are coherent with the CPU in
+ * accessing this cache. This means in this mode we
+ * don't need to clflush on the CPU side, and on the
+ * GPU side we only need to flush internal caches to
+ * get data visible to the CPU.
+ *
+ * However, we maintain the display planes as UC, and so
+ * need to rebind when first used as such.
+ */
+ obj->cache_level = I915_CACHE_LLC;
+ } else
+ obj->cache_level = I915_CACHE_NONE;
+
obj->base.driver_private = NULL;
obj->fence_reg = I915_FENCE_REG_NONE;
INIT_LIST_HEAD(&obj->mm_list);
--
1.7.4.1
next prev parent reply other threads:[~2011-03-29 23:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-03-29 23:59 reduced LLC caching series Eric Anholt
2011-03-29 23:59 ` [PATCH 1/6] drm/i915: Rename agp_type to cache_level Eric Anholt
2011-03-29 23:59 ` [PATCH 2/6] drm/i915: Mark the cursor and the overlay as being part of the display planes Eric Anholt
2011-03-29 23:59 ` [PATCH 3/6] drm/i915: Do not clflush snooped objects Eric Anholt
2011-03-29 23:59 ` [PATCH 4/6] drm/i915: Add an interface to dynamically change the cache level Eric Anholt
2011-03-30 7:09 ` Chris Wilson
2011-03-30 16:59 ` Eric Anholt
2011-03-30 17:16 ` Chris Wilson
2011-03-30 21:45 ` Eric Anholt
2011-03-31 7:29 ` Chris Wilson
2011-03-31 20:10 ` Eric Anholt
2011-03-29 23:59 ` [PATCH 5/6] drm/i915: Use the uncached domain for the display planes v2 Eric Anholt
2011-03-29 23:59 ` Eric Anholt [this message]
2011-03-30 22:35 ` reduced LLC caching series Michael Larabel
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