From: Chris Wilson <chris@chris-wilson.co.uk> To: intel-gfx@lists.freedesktop.org Subject: [PATCH 16/30] drm/i915: Mark the cursor and the overlay as being part of the display planes Date: Tue, 12 Apr 2011 21:31:44 +0100 Message-ID: <1302640318-23165-17-git-send-email-chris@chris-wilson.co.uk> (raw) In-Reply-To: <1302640318-23165-1-git-send-email-chris@chris-wilson.co.uk> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net> --- drivers/gpu/drm/i915/intel_display.c | 2 +- drivers/gpu/drm/i915/intel_overlay.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 79f8c51..0d316e9 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5357,7 +5357,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, goto fail_locked; } - ret = i915_gem_object_set_to_gtt_domain(obj, 0); + ret = i915_gem_object_set_to_display_plane(obj, NULL); if (ret) { DRM_ERROR("failed to move cursor bo into the GTT\n"); goto fail_unpin; diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index a670c00..e0903c5 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c @@ -777,7 +777,7 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay, if (ret != 0) return ret; - ret = i915_gem_object_set_to_gtt_domain(new_bo, 0); + ret = i915_gem_object_set_to_display_plane(new_bo, NULL); if (ret != 0) goto out_unpin; -- 1.7.4.1
next prev parent reply index Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top 2011-04-12 20:31 i915 next Chris Wilson 2011-04-12 20:31 ` [PATCH 01/30] drm/i915: Split the crtc_mode_set function along HAS_PCH_SPLIT() lines Chris Wilson 2011-04-12 20:31 ` [PATCH 02/30] drm/i915: Move the vblank pre/post modeset to the common crtc_mode_set Chris Wilson 2011-04-12 20:31 ` [PATCH 03/30] drm/i915: Remove the PCH paths from the pre-Ironlake crtc_mode_set() Chris Wilson 2011-04-12 20:31 ` [PATCH 04/30] drm/i915: Drop the eDP paths from the pre-Ironlake crtc_mode_set Chris Wilson 2011-04-12 20:31 ` [PATCH 05/30] drm/i915: Drop the remaining bit of Ironlake code from i9xx_crtc_mode_set() Chris Wilson 2011-04-12 20:31 ` [PATCH 06/30] drm/i915: Drop non-HAS_PCH_SPLIT() code from ironlake_crtc_mode_set() Chris Wilson 2011-04-12 20:31 ` [PATCH 07/30] drm/i915: Drop remaining pre-Ironlake " Chris Wilson 2011-04-12 20:31 ` [PATCH 08/30] drm/i915: Clean up leftover DPLL and LVDS register choice from pch split Chris Wilson 2011-04-12 20:31 ` [PATCH 09/30] drm/i915: Fold the DPLL limit defines into the structs that use them Chris Wilson 2011-04-12 20:31 ` [PATCH 10/30] drm/i915: fix ilk rc6 teardown locking Chris Wilson 2011-04-12 20:31 ` [PATCH 11/30] drm/1915: ringbuffer wait for idle function Chris Wilson 2011-04-12 20:31 ` [PATCH 12/30] drm/i915: fix rc6 initialization on Ironlake Chris Wilson 2011-04-12 20:31 ` [PATCH 13/30] drm/i915: re-enable rc6 for ironlake Chris Wilson 2011-04-12 20:31 ` [PATCH 14/30] drm/i915: use i915_enable_rc6 on SNB too Chris Wilson 2011-04-12 20:31 ` [PATCH 15/30] drm/i915: Rename agp_type to cache_level Chris Wilson 2011-04-13 15:57 ` Daniel Vetter 2011-04-12 20:31 ` Chris Wilson [this message] 2011-04-13 16:00 ` [PATCH 16/30] drm/i915: Mark the cursor and the overlay as being part of the display planes Daniel Vetter 2011-04-12 20:31 ` [PATCH 17/30] drm/i915: Do not clflush snooped objects Chris Wilson 2011-04-13 16:04 ` Daniel Vetter 2011-04-13 17:34 ` Chris Wilson 2011-04-13 20:47 ` Daniel Vetter 2011-04-12 20:31 ` [PATCH 18/30] drm/i915: Add an interface to dynamically change the cache level Chris Wilson 2011-04-13 18:59 ` Daniel Vetter 2011-04-13 19:21 ` Chris Wilson 2011-04-13 22:27 ` [PATCH 1/3] drm/i915: Introduce i915_gem_object_finish_gpu() Chris Wilson 2011-04-13 22:27 ` [PATCH 2/3] drm/i915: Introduce i915_gem_object_finish_gtt() Chris Wilson 2011-04-13 22:27 ` [PATCH 3/3] drm/i915: Add an interface to dynamically change the cache level Chris Wilson 2011-04-12 20:31 ` [PATCH 19/30] drm/i915: Use the uncached domain for the display planes v2 Chris Wilson 2011-04-12 20:31 ` [PATCH 20/30] drm/i915: Use the CPU domain for snooped pwrites Chris Wilson 2011-04-12 20:31 ` [PATCH 21/30] drm/i915: Redirect GTT mappings to the CPU page if cache-coherent Chris Wilson 2011-04-13 15:57 ` Eric Anholt 2011-04-13 16:19 ` Chris Wilson 2011-04-13 18:35 ` [PATCH] " Chris Wilson 2011-04-13 19:13 ` Daniel Vetter 2011-04-13 19:47 ` Chris Wilson 2011-04-13 20:26 ` [PATCH] drm/i915: Prevent mmap access through the GTT of snooped pages Chris Wilson 2011-04-13 20:51 ` Daniel Vetter 2011-04-12 20:31 ` [PATCH 22/30] drm/i915: Use the LLC mode on gen6 for everything but display Chris Wilson 2011-04-13 19:15 ` Daniel Vetter 2011-04-12 20:31 ` [PATCH 23/30] drm/i915: Cache GT fifo count for SandyBridge Chris Wilson 2011-04-14 2:21 ` Ben Widawsky 2011-04-14 4:48 ` Ben Widawsky 2011-04-12 20:31 ` [PATCH 24/30] drm/i915: Refactor pwrite/pread to use single copy of get_user_pages Chris Wilson 2011-04-13 15:59 ` Eric Anholt 2011-04-13 17:24 ` Chris Wilson 2011-04-13 19:35 ` Eric Anholt 2011-04-13 19:26 ` Daniel Vetter 2011-04-13 19:56 ` Chris Wilson 2011-04-13 20:56 ` Daniel Vetter 2011-04-14 23:23 ` Ben Widawsky 2011-04-15 9:48 ` Paul Menzel 2011-04-16 8:03 ` Chris Wilson 2011-04-12 20:31 ` [PATCH 25/30] drm/i915: s/addr & ~PAGE_MASK/offset_in_page(addr)/ Chris Wilson 2011-04-12 20:31 ` [PATCH 26/30] drm/i915: Maintain fenced gpu access until we flush the fence Chris Wilson 2011-04-13 19:37 ` Daniel Vetter 2011-04-13 20:15 ` Chris Wilson 2011-04-13 20:58 ` Daniel Vetter 2011-04-13 21:37 ` Chris Wilson 2011-04-12 20:31 ` [PATCH 27/30] drm/i915: Invalidate fenced read domains upon flush Chris Wilson 2011-04-13 19:43 ` Daniel Vetter 2011-04-13 20:38 ` Chris Wilson 2011-04-13 21:02 ` Daniel Vetter 2011-04-12 20:31 ` [PATCH 28/30] drm/i915: Pass the fence register number to be written Chris Wilson 2011-04-13 19:48 ` Daniel Vetter 2011-04-12 20:31 ` [PATCH 29/30] drm/i915: Track fence setup separately from fenced object lifetime Chris Wilson 2011-04-13 20:42 ` Daniel Vetter 2011-04-13 21:56 ` Chris Wilson 2011-04-12 20:31 ` [PATCH 30/30] drm/i915: Only print out the actual number of fences for i915_error_state Chris Wilson 2011-04-13 7:26 ` i915 next Chris Wilson
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=1302640318-23165-17-git-send-email-chris@chris-wilson.co.uk \ --to=chris@chris-wilson.co.uk \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: link
Intel-GFX Archive on lore.kernel.org Archives are clonable: git clone --mirror https://lore.kernel.org/intel-gfx/0 intel-gfx/git/0.git git clone --mirror https://lore.kernel.org/intel-gfx/1 intel-gfx/git/1.git # If you have public-inbox 1.1+ installed, you may # initialize and index your mirror using the following commands: public-inbox-init -V2 intel-gfx intel-gfx/ https://lore.kernel.org/intel-gfx \ intel-gfx@lists.freedesktop.org public-inbox-index intel-gfx Example config snippet for mirrors Newsgroup available over NNTP: nntp://nntp.lore.kernel.org/org.freedesktop.lists.intel-gfx AGPL code for this site: git clone https://public-inbox.org/public-inbox.git