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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/6] drm/i915: Use of a CPU fence is mandatory to update FBC regions upon CPU writes
Date: Thu,  7 Jul 2011 12:48:07 +0100
Message-ID: <1310039291-22554-3-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1310039291-22554-1-git-send-email-chris@chris-wilson.co.uk>

...and this requirement is enforced by intel_update_fbc() so we can
remove the later check from g4x_enable_fbc() and ironlake_enable_fbc().

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_display.c |   16 ++++------------
 1 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 577229d..0cbae6c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1492,12 +1492,8 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
 	dev_priv->cfb_y = crtc->y;
 
 	dpfc_ctl = plane | DPFC_SR_EN | DPFC_CTL_LIMIT_1X;
-	if (obj->tiling_mode != I915_TILING_NONE) {
-		dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
-		I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
-	} else {
-		I915_WRITE(DPFC_CHICKEN, ~DPFC_HT_MODIFY);
-	}
+	dpfc_ctl |= DPFC_CTL_FENCE_EN | dev_priv->cfb_fence;
+	I915_WRITE(DPFC_CHICKEN, DPFC_HT_MODIFY);
 
 	I915_WRITE(DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |
 		   (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) |
@@ -1583,12 +1579,8 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval)
 
 	dpfc_ctl &= DPFC_RESERVED;
 	dpfc_ctl |= (plane | DPFC_CTL_LIMIT_1X);
-	if (obj->tiling_mode != I915_TILING_NONE) {
-		dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence);
-		I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY);
-	} else {
-		I915_WRITE(ILK_DPFC_CHICKEN, ~DPFC_HT_MODIFY);
-	}
+	dpfc_ctl |= (DPFC_CTL_FENCE_EN | dev_priv->cfb_fence);
+	I915_WRITE(ILK_DPFC_CHICKEN, DPFC_HT_MODIFY);
 
 	I915_WRITE(ILK_DPFC_RECOMP_CTL, DPFC_RECOMP_STALL_EN |
 		   (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) |
-- 
1.7.5.4

  parent reply index

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-07-07 11:48 FBC fixes for review and testing Chris Wilson
2011-07-07 11:48 ` [PATCH 1/6] drm/i915: Remove vestigial pitch from post-gen2 FBC control routines Chris Wilson
2011-07-07 16:12   ` Jesse Barnes
2011-07-07 11:48 ` Chris Wilson [this message]
2011-07-07 16:13   ` [PATCH 2/6] drm/i915: Use of a CPU fence is mandatory to update FBC regions upon CPU writes Jesse Barnes
2011-07-07 11:48 ` [PATCH 3/6] drm/i915: Set persistent-mode for ILK/SNB framebuffer compression Chris Wilson
2011-07-07 16:14   ` Jesse Barnes
2011-07-07 11:48 ` [PATCH 4/6] drm/i915: Disable FBC across page-flipping Chris Wilson
2011-07-07 16:15   ` Jesse Barnes
2011-07-07 11:48 ` [PATCH 5/6] drm/i915: Only export the generic intel_disable_fbc() interface Chris Wilson
2011-07-07 16:16   ` Jesse Barnes
2011-07-07 17:19     ` [PATCH] drm/i915: Replace direct calls to vfunc.disable_fbc with intel_disable_fbc() Chris Wilson
2011-07-07 11:48 ` [PATCH 6/6] drm/i915: Perform intel_enable_fbc() from a delayed task Chris Wilson
2011-07-07 16:20   ` Jesse Barnes
2011-07-07 17:12     ` [PATCH] drm/i915: Flush any scheduled tasks during unload Chris Wilson
2011-07-07 15:45 ` FBC fixes for review and testing Keith Packard
2011-07-07 20:30   ` [PATCH] drm/i915: Share the common work of disabling active FBC before updating Chris Wilson
2011-07-07 20:52     ` Keith Packard
2011-07-07 21:14       ` Chris Wilson
2011-07-07 21:26         ` Keith Packard

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