From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PATCH 3/3] drm/i915: close rps work vs. rps disable races Date: Sun, 4 Sep 2011 17:35:02 +0200 Message-ID: <1315150502-12537-4-git-send-email-daniel.vetter@ffwll.ch> References: <20110904084953.16cd10a2@bwidawsk.net> <1315150502-12537-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ew0-f49.google.com (mail-ew0-f49.google.com [209.85.215.49]) by gabe.freedesktop.org (Postfix) with ESMTP id C7B15A1AF0 for ; Sun, 4 Sep 2011 09:34:52 -0700 (PDT) Received: by ewy3 with SMTP id 3so2309231ewy.36 for ; Sun, 04 Sep 2011 09:34:51 -0700 (PDT) In-Reply-To: <1315150502-12537-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org Cc: Daniel Vetter , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org The rps disabling code wasn't properly cancelling outstanding work items. Also add a comment that explains why we're not racing with the work item, that could again unmask interrupts. This also fixes a bug on module unload because nothing was properly syncing up with that work item, possibly leading to it being run after freeing dev_priv or removing the module code. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_display.c | 8 +++++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 56a8554..ccd4600 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -7483,10 +7483,16 @@ void gen6_disable_rps(struct drm_device *dev) I915_WRITE(GEN6_RPNSWREQ, 1 << 31); I915_WRITE(GEN6_PMINTRMSK, 0xffffffff); - I915_WRITE(GEN6_PMIER, 0); + /* Complete PM interrupt masking here doesn't race with the rps work + * item again unmasking PM interrupts because that is using PMIMR + * (logically sitting atop of PMINTRMSK) to mask interrupts. */ + cancel_work_sync(&dev_priv->rps_work); + /* Clear PMIMR and dev_priv->pm_iir in case outstanding work gets + * cancelled before having run. */ spin_lock_irq(&dev_priv->rps_lock); dev_priv->pm_iir = 0; + I915_WRITE(GEN6_PMIER, 0); spin_unlock_irq(&dev_priv->rps_lock); I915_WRITE(GEN6_PMIIR, I915_READ(GEN6_PMIIR)); -- 1.7.6