From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 3/6] drm/i915: Remove the per-ring write list Date: Thu, 12 Jul 2012 21:07:52 +0100 Message-ID: <1342123681_2236@CP5-2952> References: <1342106019-17806-1-git-send-email-chris@chris-wilson.co.uk> <1342106019-17806-4-git-send-email-chris@chris-wilson.co.uk> <20120712193716.GN5039@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id ECF19A0FA7 for ; Thu, 12 Jul 2012 13:08:05 -0700 (PDT) In-Reply-To: <20120712193716.GN5039@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, 12 Jul 2012 21:37:16 +0200, Daniel Vetter wrote: > On Thu, Jul 12, 2012 at 04:13:36PM +0100, Chris Wilson wrote: > > obj->base.write_domain = 0; > > - list_del_init(&obj->gpu_write_list); > > + obj->pending_gpu_write = false; > > i915_gem_object_move_to_inactive(obj); > > Hm, this hunk makes me wonder whether we don't leak some bogus state > accross a gpu reset. Can't we just reuse the move_to_inactive helper here, > ensuring that we consistenly clear up any active state? Yes. I had planned to finish off with another patch to remove that pair of then redundant lines, but apparently forgot. I think it is better expressed as a second patch, at least from the point of view of how I was applying the transformations. -Chris -- Chris Wilson, Intel Open Source Technology Centre