From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 01/13] drm/i915: Flush the context object from the CPU caches upon creation Date: Sat, 14 Jul 2012 13:48:59 +0100 Message-ID: <1342270150_7607@CP5-2952> References: <1342185256-16024-1-git-send-email-chris@chris-wilson.co.uk> <1342185256-16024-2-git-send-email-chris@chris-wilson.co.uk> <20120714115858.GB5498@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from fireflyinternet.com (smtp.fireflyinternet.com [109.228.6.236]) by gabe.freedesktop.org (Postfix) with ESMTP id 98B719F301 for ; Sat, 14 Jul 2012 05:49:18 -0700 (PDT) In-Reply-To: <20120714115858.GB5498@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org, Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Sat, 14 Jul 2012 13:58:58 +0200, Daniel Vetter wrote: > So afact this first patch here seems to add another instance of the very > bug this patch series tries squash ... Additionally I'm still hunting for > that other failure case, which can't be fixed by adding the flush in > execbuffer if ring->gpu_caches_dirty is set. > > /me is still lost Now all that you are missing is that we only flush GPU_DOMAINS when on the gpu_write_list. -Chris -- Chris Wilson, Intel Open Source Technology Centre