From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 06/10] drm/i915: Remove explicit flush from i915_gem_object_flush_fence()
Date: Fri, 20 Jul 2012 12:41:04 +0100 [thread overview]
Message-ID: <1342784468-20474-7-git-send-email-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <1342784468-20474-1-git-send-email-chris@chris-wilson.co.uk>
As the flush is either performed explictly immediately after the
execbuffer dispatch, or before the serialisation of last_fenced_seqno we
can forgo the explict i915_gem_flush_ring().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem.c | 16 ++--------------
1 file changed, 2 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9c3db94..f5e6a3b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2473,21 +2473,8 @@ static void i915_gem_object_update_fence(struct drm_i915_gem_object *obj,
static int
i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
{
- int ret;
-
- if (obj->fenced_gpu_access) {
- if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
- ret = i915_gem_flush_ring(obj->ring,
- 0, obj->base.write_domain);
- if (ret)
- return ret;
- }
-
- obj->fenced_gpu_access = false;
- }
-
if (obj->last_fenced_seqno) {
- ret = i915_wait_seqno(obj->ring, obj->last_fenced_seqno);
+ int ret = i915_wait_seqno(obj->ring, obj->last_fenced_seqno);
if (ret)
return ret;
@@ -2500,6 +2487,7 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj)
if (obj->base.read_domains & I915_GEM_DOMAIN_GTT)
mb();
+ obj->fenced_gpu_access = false;
return 0;
}
--
1.7.10.4
next prev parent reply other threads:[~2012-07-20 11:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-07-20 11:40 Remove the flushing list (v2) Chris Wilson
2012-07-20 11:40 ` [PATCH 01/10] drm/i915: Allow late allocation of request for i915_add_request() Chris Wilson
2012-07-20 11:41 ` [PATCH 02/10] drm/i915: Remove assertion over write domain after i915_gem_object_sync() Chris Wilson
2012-07-20 11:41 ` [PATCH 03/10] drm/i915: Replace the pending_gpu_write flag with an explicit seqno Chris Wilson
2012-07-20 11:41 ` [PATCH 04/10] drm/i915: Remove the defunct flushing list Chris Wilson
2012-07-20 11:41 ` [PATCH 05/10] drm/i915: Remove the per-ring write list Chris Wilson
2012-07-20 11:41 ` Chris Wilson [this message]
2012-07-20 11:41 ` [PATCH 07/10] drm/i915: Remove the explicit flush of the GPU write domain Chris Wilson
2012-07-20 11:41 ` [PATCH 08/10] drm/i915: Replace the complex flushing logic with simple invalidate/flush all Chris Wilson
2012-07-20 11:41 ` [PATCH 09/10] drm/i915: Clear the pending_gpu_fenced_access flag at the start of execbuffer Chris Wilson
2012-07-20 11:41 ` [PATCH 10/10] drm/i915: Split i915_gem_flush_ring() into seperate invalidate/flush funcs Chris Wilson
2012-07-21 10:49 ` Daniel Vetter
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