From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: [PATCH 3/5] drm/i915: WaInsertNoopAfterBatchEndCommand Date: Thu, 18 Oct 2012 11:49:52 +0200 Message-ID: <1350553794-5534-4-git-send-email-daniel.vetter@ffwll.ch> References: <1350553794-5534-1-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id C41979E832 for ; Thu, 18 Oct 2012 02:32:06 -0700 (PDT) Received: by mail-ee0-f49.google.com with SMTP id c1so4370674eek.36 for ; Thu, 18 Oct 2012 02:32:06 -0700 (PDT) In-Reply-To: <1350553794-5534-1-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Intel Graphics Development Cc: Daniel Vetter List-Id: intel-gfx@lists.freedesktop.org Comment says that this applies to earlier gens, too. Since two more MI_NOOP's can't hurt that much, I've figured I'll apply this w/a down to gen2. v2: Correct the ringbuffer dword count for gen3, spotted by Chris Wilson. Signed-off-by: Daniel Vetter --- drivers/gpu/drm/i915/intel_ringbuffer.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 984a0c5..38092dc 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -969,7 +969,7 @@ i965_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length) { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(ring, 4); if (ret) return ret; @@ -978,6 +978,11 @@ i965_dispatch_execbuffer(struct intel_ring_buffer *ring, u32 offset, u32 length) MI_BATCH_GTT | MI_BATCH_NON_SECURE_I965); intel_ring_emit(ring, offset); + /* WaInsertNoopAfterBatchEndCommand: Command says to do the same after + * the batchbuffer start command. Unclear whether really required on + * gen3, but better safe than sorry. */ + intel_ring_emit(ring, MI_NOOP); + intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); return 0; @@ -996,7 +1001,10 @@ i830_dispatch_execbuffer(struct intel_ring_buffer *ring, intel_ring_emit(ring, MI_BATCH_BUFFER); intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE); intel_ring_emit(ring, offset + len - 8); - intel_ring_emit(ring, 0); + /* WaInsertNoopAfterBatchEndCommand: Command says to do the same after + * the batchbuffer start command. Unclear whether really required on + * gen2, but better safe than sorry. */ + intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); return 0; @@ -1008,12 +1016,16 @@ i915_dispatch_execbuffer(struct intel_ring_buffer *ring, { int ret; - ret = intel_ring_begin(ring, 2); + ret = intel_ring_begin(ring, 4); if (ret) return ret; intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_GTT); intel_ring_emit(ring, offset | MI_BATCH_NON_SECURE); + /* WaInsertNoopAfterBatchEndCommand: Command says to do the same after + * the batchbuffer start command. */ + intel_ring_emit(ring, MI_NOOP); + intel_ring_emit(ring, MI_NOOP); intel_ring_advance(ring); return 0; -- 1.7.10.4