* [PATCH] drm/i915: Use pci_resource functions for BARs.
@ 2012-11-19 20:04 Ben Widawsky
2012-11-19 20:23 ` [PATCH v2] " Ben Widawsky
0 siblings, 1 reply; 4+ messages in thread
From: Ben Widawsky @ 2012-11-19 20:04 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
This was leftover crap from kill-agp. The current code is theoretically
broken for 64b bars. (I resist removing theoretically because I am too
lazy to test).
We still need to ioremap things ourselves because we want to ioremap_wc
the PTEs.
CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 35fec1e..06e14f1 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -638,12 +638,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
- pci_read_config_dword(dev->pdev, PCI_BASE_ADDRESS_0, &tmp);
/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
- gtt_bus_addr = (tmp & PCI_BASE_ADDRESS_MEM_MASK) + (2<<20);
-
- pci_read_config_dword(dev->pdev, PCI_BASE_ADDRESS_2, &tmp);
- dev_priv->mm.gtt->gma_bus_addr = tmp & PCI_BASE_ADDRESS_MEM_MASK;
+ gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
+ dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);
/* i9xx_setup */
pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
--
1.8.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH v2] drm/i915: Use pci_resource functions for BARs.
2012-11-19 20:04 [PATCH] drm/i915: Use pci_resource functions for BARs Ben Widawsky
@ 2012-11-19 20:23 ` Ben Widawsky
2012-11-19 21:27 ` Chris Wilson
0 siblings, 1 reply; 4+ messages in thread
From: Ben Widawsky @ 2012-11-19 20:23 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
This was leftover crap from kill-agp. The current code is theoretically
broken for 64b bars. (I resist removing theoretically because I am too
lazy to test).
We still need to ioremap things ourselves because we want to ioremap_wc
the PTEs.
v2: Forgot to kill the tmp variable in v1
CC: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 35fec1e..51f79bb 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -609,7 +609,6 @@ int i915_gem_gtt_init(struct drm_device *dev)
struct drm_i915_private *dev_priv = dev->dev_private;
phys_addr_t gtt_bus_addr;
u16 snb_gmch_ctl;
- u32 tmp;
int ret;
/* On modern platforms we need not worry ourself with the legacy
@@ -638,12 +637,9 @@ int i915_gem_gtt_init(struct drm_device *dev)
if (!pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(40)))
pci_set_consistent_dma_mask(dev->pdev, DMA_BIT_MASK(40));
- pci_read_config_dword(dev->pdev, PCI_BASE_ADDRESS_0, &tmp);
/* For GEN6+ the PTEs for the ggtt live at 2MB + BAR0 */
- gtt_bus_addr = (tmp & PCI_BASE_ADDRESS_MEM_MASK) + (2<<20);
-
- pci_read_config_dword(dev->pdev, PCI_BASE_ADDRESS_2, &tmp);
- dev_priv->mm.gtt->gma_bus_addr = tmp & PCI_BASE_ADDRESS_MEM_MASK;
+ gtt_bus_addr = pci_resource_start(dev->pdev, 0) + (2<<20);
+ dev_priv->mm.gtt->gma_bus_addr = pci_resource_start(dev->pdev, 2);
/* i9xx_setup */
pci_read_config_word(dev->pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
--
1.8.0
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] drm/i915: Use pci_resource functions for BARs.
2012-11-19 20:23 ` [PATCH v2] " Ben Widawsky
@ 2012-11-19 21:27 ` Chris Wilson
2012-11-21 14:58 ` Daniel Vetter
0 siblings, 1 reply; 4+ messages in thread
From: Chris Wilson @ 2012-11-19 21:27 UTC (permalink / raw)
To: intel-gfx; +Cc: Ben Widawsky
On Mon, 19 Nov 2012 12:23:44 -0800, Ben Widawsky <ben@bwidawsk.net> wrote:
> This was leftover crap from kill-agp. The current code is theoretically
> broken for 64b bars. (I resist removing theoretically because I am too
> lazy to test).
>
> We still need to ioremap things ourselves because we want to ioremap_wc
> the PTEs.
>
> v2: Forgot to kill the tmp variable in v1
>
> CC: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Nice.
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] drm/i915: Use pci_resource functions for BARs.
2012-11-19 21:27 ` Chris Wilson
@ 2012-11-21 14:58 ` Daniel Vetter
0 siblings, 0 replies; 4+ messages in thread
From: Daniel Vetter @ 2012-11-21 14:58 UTC (permalink / raw)
To: Chris Wilson; +Cc: Ben Widawsky, intel-gfx
On Mon, Nov 19, 2012 at 09:27:13PM +0000, Chris Wilson wrote:
> On Mon, 19 Nov 2012 12:23:44 -0800, Ben Widawsky <ben@bwidawsk.net> wrote:
> > This was leftover crap from kill-agp. The current code is theoretically
> > broken for 64b bars. (I resist removing theoretically because I am too
> > lazy to test).
> >
> > We still need to ioremap things ourselves because we want to ioremap_wc
> > the PTEs.
> >
> > v2: Forgot to kill the tmp variable in v1
> >
> > CC: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
>
> Nice.
>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2012-11-21 14:57 UTC | newest]
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2012-11-19 20:04 [PATCH] drm/i915: Use pci_resource functions for BARs Ben Widawsky
2012-11-19 20:23 ` [PATCH v2] " Ben Widawsky
2012-11-19 21:27 ` Chris Wilson
2012-11-21 14:58 ` Daniel Vetter
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