From: Ben Widawsky <ben@bwidawsk.net>
To: Intel GFX <intel-gfx@lists.freedesktop.org>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH 3/6] drm/i915: pte_encode is gen6+
Date: Thu, 24 Jan 2013 14:44:57 -0800 [thread overview]
Message-ID: <1359067500-4318-3-git-send-email-ben@bwidawsk.net> (raw)
In-Reply-To: <1359067500-4318-1-git-send-email-ben@bwidawsk.net>
From: Daniel Vetter <daniel.vetter@ffwll.ch>
All the other gen6+ hw code has the gen6_ prefix, so be consistent
about it.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 24 ++++++++++++++----------
1 file changed, 14 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f63dbc7..d171982 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -44,9 +44,9 @@ typedef uint32_t gtt_pte_t;
#define GEN6_PTE_CACHE_LLC_MLC (3 << 1)
#define GEN6_PTE_ADDR_ENCODE(addr) GEN6_GTT_ADDR_ENCODE(addr)
-static inline gtt_pte_t pte_encode(struct drm_device *dev,
- dma_addr_t addr,
- enum i915_cache_level level)
+static inline gtt_pte_t gen6_pte_encode(struct drm_device *dev,
+ dma_addr_t addr,
+ enum i915_cache_level level)
{
gtt_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
@@ -87,8 +87,9 @@ static void gen6_ppgtt_clear_range(struct i915_hw_ppgtt *ppgtt,
unsigned first_pte = first_entry % I915_PPGTT_PT_ENTRIES;
unsigned last_pte, i;
- scratch_pte = pte_encode(ppgtt->dev, ppgtt->scratch_page_dma_addr,
- I915_CACHE_LLC);
+ scratch_pte = gen6_pte_encode(ppgtt->dev,
+ ppgtt->scratch_page_dma_addr,
+ I915_CACHE_LLC);
while (num_entries) {
last_pte = first_pte + num_entries;
@@ -131,8 +132,8 @@ static void gen6_ppgtt_insert_entries(struct i915_hw_ppgtt *ppgtt,
for (j = first_pte; j < I915_PPGTT_PT_ENTRIES; j++) {
page_addr = sg_dma_address(sg) + (m << PAGE_SHIFT);
- pt_vaddr[j] = pte_encode(ppgtt->dev, page_addr,
- cache_level);
+ pt_vaddr[j] = gen6_pte_encode(ppgtt->dev, page_addr,
+ cache_level);
/* grab the next page */
if (++m == segment_len) {
@@ -421,7 +422,8 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev,
len = sg_dma_len(sg) >> PAGE_SHIFT;
for (m = 0; m < len; m++) {
addr = sg_dma_address(sg) + (m << PAGE_SHIFT);
- iowrite32(pte_encode(dev, addr, level), >t_entries[i]);
+ iowrite32(gen6_pte_encode(dev, addr, level),
+ >t_entries[i]);
i++;
}
}
@@ -433,7 +435,8 @@ static void gen6_ggtt_insert_entries(struct drm_device *dev,
* hardware should work, we must keep this posting read for paranoia.
*/
if (i != 0)
- WARN_ON(readl(>t_entries[i-1]) != pte_encode(dev, addr, level));
+ WARN_ON(readl(>t_entries[i-1])
+ != gen6_pte_encode(dev, addr, level));
/* This next bit makes the above posting read even more important. We
* want to flush the TLBs only after we're certain all the PTE updates
@@ -458,7 +461,8 @@ static void gen6_ggtt_clear_range(struct drm_device *dev,
first_entry, num_entries, max_entries))
num_entries = max_entries;
- scratch_pte = pte_encode(dev, dev_priv->gtt.scratch_page_dma, I915_CACHE_LLC);
+ scratch_pte = gen6_pte_encode(dev, dev_priv->gtt.scratch_page_dma,
+ I915_CACHE_LLC);
for (i = 0; i < num_entries; i++)
iowrite32(scratch_pte, >t_base[i]);
readl(gtt_base);
--
1.8.1.1
next prev parent reply other threads:[~2013-01-24 22:44 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-24 15:50 [PATCH 0/4] gtt abstractions Daniel Vetter
2013-01-24 15:50 ` [PATCH 1/4] drm/i915: vfuncs for gtt_clear_range/insert_entries Daniel Vetter
2013-01-24 15:50 ` [PATCH 2/4] drm/i915: vfuncs for ppgtt Daniel Vetter
2013-01-24 15:50 ` [PATCH 3/4] drm/i915: pte_encode is gen6+ Daniel Vetter
2013-01-24 15:50 ` [PATCH 4/4] drm/i915: extract hw ppgtt setup/cleanup code Daniel Vetter
2013-01-24 19:41 ` [PATCH 0/4] gtt abstractions Ben Widawsky
2013-01-24 21:49 ` [PATCH 1/6] drm/i915: vfuncs for gtt_clear_range/insert_entries Ben Widawsky
2013-01-24 21:49 ` [PATCH 2/6] drm/i915: vfuncs for ppgtt Ben Widawsky
2013-01-24 21:49 ` [PATCH 3/6] drm/i915: pte_encode is gen6+ Ben Widawsky
2013-01-24 21:49 ` [PATCH 4/6] drm/i915: extract hw ppgtt setup/cleanup code Ben Widawsky
2013-01-29 7:58 ` Damien Lespiau
2013-01-24 21:49 ` [PATCH 5/6] drm/i915: Add probe and remove to the gtt ops Ben Widawsky
2013-01-29 8:30 ` Damien Lespiau
2013-01-24 21:49 ` [PATCH 6/6] drm/i915: Resume dissecting intel_gtt Ben Widawsky
2013-01-24 22:44 ` [PATCH 1/6] drm/i915: vfuncs for gtt_clear_range/insert_entries Ben Widawsky
2013-01-24 22:44 ` [PATCH 2/6] drm/i915: vfuncs for ppgtt Ben Widawsky
2013-01-29 7:44 ` Damien Lespiau
2013-01-24 22:44 ` Ben Widawsky [this message]
2013-01-29 7:46 ` [PATCH 3/6] drm/i915: pte_encode is gen6+ Damien Lespiau
2013-01-24 22:44 ` [PATCH 4/6] drm/i915: extract hw ppgtt setup/cleanup code Ben Widawsky
2013-01-24 22:44 ` [PATCH 5/6] drm/i915: Add probe and remove to the gtt ops Ben Widawsky
2013-01-24 22:45 ` [PATCH 6/6] drm/i915: Resume dissecting intel_gtt Ben Widawsky
2013-01-29 8:40 ` Damien Lespiau
2013-01-29 19:02 ` Ben Widawsky
2013-01-29 7:42 ` [PATCH 1/6] drm/i915: vfuncs for gtt_clear_range/insert_entries Damien Lespiau
2013-01-29 9:13 ` Daniel Vetter
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