From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 8/9] drm/i915/pmu: Split reading engine and other events into helpers
Date: Thu, 30 Mar 2023 14:26:36 +0100 [thread overview]
Message-ID: <145ce975-d5b0-d0f1-8020-de3e368972be@linux.intel.com> (raw)
In-Reply-To: <20230330004103.1295413-9-umesh.nerlige.ramappa@intel.com>
On 30/03/2023 01:41, Umesh Nerlige Ramappa wrote:
> Split the event reading function into engine and other helpers.
What, why and how please, third bit not being needed in this case. :)
> Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
> ---
> drivers/gpu/drm/i915/i915_pmu.c | 93 ++++++++++++++++++---------------
> 1 file changed, 52 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 40ce1dc00067..9bd9605d2662 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -641,58 +641,69 @@ static u64 read_sample_us(struct i915_pmu *pmu, unsigned int gt_id, int sample)
> return div_u64(read_sample(pmu, gt_id, sample), USEC_PER_SEC);
> }
>
> -static u64 __i915_pmu_event_read(struct perf_event *event)
> +static u64 __i915_pmu_event_read_engine(struct perf_event *event)
> {
> - struct drm_i915_private *i915 =
> - container_of(event->pmu, typeof(*i915), pmu.base);
> - struct i915_pmu *pmu = &i915->pmu;
> + struct drm_i915_private *i915 = container_of(event->pmu, typeof(*i915), pmu.base);
Liking the over 80 look, if you insist. :)
> + u8 sample = engine_event_sample(event);
> + struct intel_engine_cs *engine;
> u64 val = 0;
>
> - if (is_engine_event(event)) {
> - u8 sample = engine_event_sample(event);
> - struct intel_engine_cs *engine;
> -
> - engine = intel_engine_lookup_user(i915,
> - engine_event_class(event),
> - engine_event_instance(event));
> + engine = intel_engine_lookup_user(i915,
> + engine_event_class(event),
> + engine_event_instance(event));
>
> - if (drm_WARN_ON_ONCE(&i915->drm, !engine)) {
> - /* Do nothing */
> - } else if (sample == I915_SAMPLE_BUSY &&
> - intel_engine_supports_stats(engine)) {
> - ktime_t unused;
> + if (drm_WARN_ON_ONCE(&i915->drm, !engine)) {
> + /* Do nothing */
> + } else if (sample == I915_SAMPLE_BUSY &&
> + intel_engine_supports_stats(engine)) {
> + ktime_t unused;
>
> - val = ktime_to_ns(intel_engine_get_busy_time(engine,
> - &unused));
> - } else {
> - val = engine->pmu.sample[sample].cur;
> - }
> + val = ktime_to_ns(intel_engine_get_busy_time(engine,
> + &unused));
> } else {
> - const unsigned int gt_id = config_gt_id(event->attr.config);
> - const u64 config = config_counter(event->attr.config);
> -
> - switch (config) {
> - case I915_PMU_ACTUAL_FREQUENCY:
> - val = read_sample_us(pmu, gt_id, __I915_SAMPLE_FREQ_ACT);
> - break;
> - case I915_PMU_REQUESTED_FREQUENCY:
> - val = read_sample_us(pmu, gt_id, __I915_SAMPLE_FREQ_REQ);
> - break;
> - case I915_PMU_INTERRUPTS:
> - val = READ_ONCE(pmu->irq_count);
> - break;
> - case I915_PMU_RC6_RESIDENCY:
> - val = get_rc6(i915->gt[gt_id]);
> - break;
> - case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
> - val = ktime_to_ns(intel_gt_get_awake_time(to_gt(i915)));
> - break;
> - }
> + val = engine->pmu.sample[sample].cur;
> }
>
> return val;
> }
>
> +static u64 __i915_pmu_event_read_other(struct perf_event *event)
> +{
> + struct drm_i915_private *i915 = container_of(event->pmu, typeof(*i915), pmu.base);
> + const unsigned int gt_id = config_gt_id(event->attr.config);
> + const u64 config = config_counter(event->attr.config);
> + struct i915_pmu *pmu = &i915->pmu;
> + u64 val = 0;
> +
> + switch (config) {
> + case I915_PMU_ACTUAL_FREQUENCY:
> + val = read_sample_us(pmu, gt_id, __I915_SAMPLE_FREQ_ACT);
> + break;
> + case I915_PMU_REQUESTED_FREQUENCY:
> + val = read_sample_us(pmu, gt_id, __I915_SAMPLE_FREQ_REQ);
> + break;
> + case I915_PMU_INTERRUPTS:
> + val = READ_ONCE(pmu->irq_count);
> + break;
> + case I915_PMU_RC6_RESIDENCY:
> + val = get_rc6(i915->gt[gt_id]);
> + break;
> + case I915_PMU_SOFTWARE_GT_AWAKE_TIME:
> + val = ktime_to_ns(intel_gt_get_awake_time(to_gt(i915)));
> + break;
> + }
> +
> + return val;
> +}
> +
> +static u64 __i915_pmu_event_read(struct perf_event *event)
> +{
> + if (is_engine_event(event))
> + return __i915_pmu_event_read_engine(event);
> + else
> + return __i915_pmu_event_read_other(event);
> +}
> +
> static void i915_pmu_event_read(struct perf_event *event)
> {
> struct drm_i915_private *i915 =
No real complaints - it is tidier and more readable. Just drop a note in
the commit that is why and:
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
next prev parent reply other threads:[~2023-03-30 13:26 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-30 0:40 [Intel-gfx] [PATCH 0/7] Add MTL PMU support for multi-gt Umesh Nerlige Ramappa
2023-03-30 0:40 ` [Intel-gfx] [PATCH 1/9] drm/i915/pmu: Support PMU for all engines Umesh Nerlige Ramappa
2023-03-30 12:27 ` Tvrtko Ursulin
2023-03-30 0:40 ` [Intel-gfx] [PATCH 2/9] drm/i915/pmu: Skip sampling engines with no enabled counters Umesh Nerlige Ramappa
2023-03-30 0:40 ` [Intel-gfx] [PATCH 3/9] drm/i915/pmu: Transform PMU parking code to be GT based Umesh Nerlige Ramappa
2023-03-30 0:40 ` [Intel-gfx] [PATCH 4/9] drm/i915/pmu: Add reference counting to the sampling timer Umesh Nerlige Ramappa
2023-03-30 0:40 ` [Intel-gfx] [PATCH 5/9] drm/i915/pmu: Prepare for multi-tile non-engine counters Umesh Nerlige Ramappa
2023-03-30 12:39 ` Tvrtko Ursulin
2023-03-30 22:28 ` Dixit, Ashutosh
2023-03-31 8:22 ` Tvrtko Ursulin
2023-03-30 0:41 ` [Intel-gfx] [PATCH 6/9] drm/i915/pmu: Export counters from all tiles Umesh Nerlige Ramappa
2023-03-30 13:01 ` Tvrtko Ursulin
2023-03-30 17:33 ` Umesh Nerlige Ramappa
2023-03-31 8:57 ` Tvrtko Ursulin
2023-03-30 0:41 ` [Intel-gfx] [PATCH 7/9] drm/i915/pmu: Use a helper to convert to MHz Umesh Nerlige Ramappa
2023-03-30 13:13 ` Tvrtko Ursulin
2023-03-30 0:41 ` [Intel-gfx] [PATCH 8/9] drm/i915/pmu: Split reading engine and other events into helpers Umesh Nerlige Ramappa
2023-03-30 13:26 ` Tvrtko Ursulin [this message]
2023-03-30 0:41 ` [Intel-gfx] [PATCH 9/9] drm/i915/pmu: Enable legacy PMU events for MTL Umesh Nerlige Ramappa
2023-03-30 13:38 ` Tvrtko Ursulin
2023-03-30 18:31 ` Umesh Nerlige Ramappa
2023-03-31 13:02 ` Tvrtko Ursulin
2023-04-20 20:12 ` Umesh Nerlige Ramappa
2023-04-03 19:16 ` Umesh Nerlige Ramappa
2023-03-30 1:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add MTL PMU support for multi-gt Patchwork
2023-03-30 1:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-30 1:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-30 19:50 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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