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* [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync
@ 2020-01-15 19:08 Ville Syrjala
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc Ville Syrjala
                   ` (7 more replies)
  0 siblings, 8 replies; 16+ messages in thread
From: Ville Syrjala @ 2020-01-15 19:08 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The post-fastset "does anyone still need a full modeset?" for
port sync looks busted. The outer loop bails out of a full modeset
is still needed by the current crtc which, and then we skip forcing
a full modeset on the related crtcs. That's totally the opposite
of what we want.

The MST path has the logic mostly the other way around so it
looks correct. To fix the port sync case let's follow the MST
logic for both. So, if the current crtc already needs a modeset
we do nothing. otherwise we check if any of the related crtcs
needs a modeset, and if so we force a full modeset for the
current crtc.

And while at let's change the else if to a plain if to so
we don't have needless coupling between the MST and port sync
checks.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Fixes: 05a8e45136ca ("drm/i915/display: Use external dependency loop for port sync")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 43 ++++++++------------
 1 file changed, 17 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index dd03987cc24f..b397816ce253 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14469,37 +14469,23 @@ static int intel_atomic_check_crtcs(struct intel_atomic_state *state)
 	return 0;
 }
 
-static bool intel_cpu_transcoder_needs_modeset(struct intel_atomic_state *state,
-					       enum transcoder transcoder)
+static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
+					       u8 transcoders)
 {
-	struct intel_crtc_state *new_crtc_state;
+	const struct intel_crtc_state *new_crtc_state;
 	struct intel_crtc *crtc;
 	int i;
 
-	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i)
-		if (new_crtc_state->cpu_transcoder == transcoder)
-			return needs_modeset(new_crtc_state);
+	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
+		if (new_crtc_state->hw.enable &&
+		    transcoders & BIT(new_crtc_state->cpu_transcoder) &&
+		    needs_modeset(new_crtc_state))
+			return true;
+	}
 
 	return false;
 }
 
-static void
-intel_modeset_synced_crtcs(struct intel_atomic_state *state,
-			   u8 transcoders)
-{
-	struct intel_crtc_state *new_crtc_state;
-	struct intel_crtc *crtc;
-	int i;
-
-	for_each_new_intel_crtc_in_state(state, crtc,
-					 new_crtc_state, i) {
-		if (transcoders & BIT(new_crtc_state->cpu_transcoder)) {
-			new_crtc_state->uapi.mode_changed = true;
-			new_crtc_state->update_pipe = false;
-		}
-	}
-}
-
 static int
 intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
 {
@@ -14655,15 +14641,20 @@ static int intel_atomic_check(struct drm_device *dev,
 		if (intel_dp_mst_is_slave_trans(new_crtc_state)) {
 			enum transcoder master = new_crtc_state->mst_master_transcoder;
 
-			if (intel_cpu_transcoder_needs_modeset(state, master)) {
+			if (intel_cpu_transcoders_need_modeset(state, BIT(master))) {
 				new_crtc_state->uapi.mode_changed = true;
 				new_crtc_state->update_pipe = false;
 			}
-		} else if (is_trans_port_sync_mode(new_crtc_state)) {
+		}
+
+		if (is_trans_port_sync_mode(new_crtc_state)) {
 			u8 trans = new_crtc_state->sync_mode_slaves_mask |
 				   BIT(new_crtc_state->master_transcoder);
 
-			intel_modeset_synced_crtcs(state, trans);
+			if (intel_cpu_transcoders_need_modeset(state, trans)) {
+				new_crtc_state->uapi.mode_changed = true;
+				new_crtc_state->update_pipe = false;
+			}
 		}
 	}
 
-- 
2.24.1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
@ 2020-01-15 19:08 ` Ville Syrjala
  2020-01-16  0:14   ` Souza, Jose
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries Ville Syrjala
                   ` (6 subsequent siblings)
  7 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2020-01-15 19:08 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we don't call intel_crtc_prepare_cleared_state() for crtcs
that are going to be entirely disabled (uapi.enable==false). That
means such crtcs will leave state junk lying around in their states
and we have to sprinkle hw.enable checks all over before we can
look at the states. Let's change that a bit so that we aways do
the state clearing, even for fully disabled crtcs.

Note that we still keep some parts of the old state (see
intel_crtc_prepare_cleared_state() for the details) so probably
can't trust things 100% when hw.enable==false. But at least there's
less chance now that we end up looking at stale junk.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b397816ce253..e68af024e13c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14607,15 +14607,13 @@ static int intel_atomic_check(struct drm_device *dev,
 			continue;
 		}
 
-		if (!new_crtc_state->uapi.enable) {
-			intel_crtc_copy_uapi_to_hw_state(new_crtc_state);
-			continue;
-		}
-
 		ret = intel_crtc_prepare_cleared_state(new_crtc_state);
 		if (ret)
 			goto fail;
 
+		if (!new_crtc_state->hw.enable)
+			continue;
+
 		ret = intel_modeset_pipe_config(new_crtc_state);
 		if (ret)
 			goto fail;
-- 
2.24.1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc Ville Syrjala
@ 2020-01-15 19:08 ` Ville Syrjala
  2020-01-16  0:19   ` Souza, Jose
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask Ville Syrjala
                   ` (5 subsequent siblings)
  7 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2020-01-15 19:08 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's use the pipe rather than the silly 'i' iterator from
for_each_oldnew_intel_crtc_in_state() for indexing the ddb
entries array. Maybe one day we can assume c99 and hide the
'i' entirely from sight.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++---------
 1 file changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index e68af024e13c..64a377d61ce0 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15106,15 +15106,17 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 	int i;
 
 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+		enum pipe pipe = crtc->pipe;
+
 		if (!new_crtc_state->hw.active)
 			continue;
 
 		/* ignore allocations for crtc's that have been turned off. */
 		if (!needs_modeset(new_crtc_state)) {
-			entries[i] = old_crtc_state->wm.skl.ddb;
-			update_pipes |= BIT(crtc->pipe);
+			entries[pipe] = old_crtc_state->wm.skl.ddb;
+			update_pipes |= BIT(pipe);
 		} else {
-			modeset_pipes |= BIT(crtc->pipe);
+			modeset_pipes |= BIT(pipe);
 		}
 	}
 
@@ -15140,10 +15142,10 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 				continue;
 
 			if (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
-							entries, num_pipes, i))
+							entries, num_pipes, pipe))
 				continue;
 
-			entries[i] = new_crtc_state->wm.skl.ddb;
+			entries[pipe] = new_crtc_state->wm.skl.ddb;
 			update_pipes &= ~BIT(pipe);
 
 			intel_update_crtc(crtc, state, old_crtc_state,
@@ -15178,9 +15180,9 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 			continue;
 
 		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
-						    entries, num_pipes, i));
+						    entries, num_pipes, pipe));
 
-		entries[i] = new_crtc_state->wm.skl.ddb;
+		entries[pipe] = new_crtc_state->wm.skl.ddb;
 		modeset_pipes &= ~BIT(pipe);
 
 		if (is_trans_port_sync_mode(new_crtc_state)) {
@@ -15213,9 +15215,9 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
 			continue;
 
 		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
-						    entries, num_pipes, i));
+						    entries, num_pipes, pipe));
 
-		entries[i] = new_crtc_state->wm.skl.ddb;
+		entries[pipe] = new_crtc_state->wm.skl.ddb;
 		modeset_pipes &= ~BIT(pipe);
 
 		intel_update_crtc(crtc, state, old_crtc_state, new_crtc_state);
-- 
2.24.1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc Ville Syrjala
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries Ville Syrjala
@ 2020-01-15 19:08 ` Ville Syrjala
  2020-01-16  0:19   ` Souza, Jose
  2020-01-16  0:37   ` Manasi Navare
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope Ville Syrjala
                   ` (4 subsequent siblings)
  7 siblings, 2 replies; 16+ messages in thread
From: Ville Syrjala @ 2020-01-15 19:08 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

sync_mode_slaves_mask is a bitmask so use PIPE_CONF_CHECK_X() for it
so we get the mismatch printed in hex instead of decimal.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 64a377d61ce0..97cf8457c956 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13695,7 +13695,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_INFOFRAME(hdmi);
 	PIPE_CONF_CHECK_INFOFRAME(drm);
 
-	PIPE_CONF_CHECK_I(sync_mode_slaves_mask);
+	PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
 	PIPE_CONF_CHECK_I(master_transcoder);
 
 	PIPE_CONF_CHECK_I(dsc.compression_enable);
-- 
2.24.1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
                   ` (2 preceding siblings ...)
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask Ville Syrjala
@ 2020-01-15 19:08 ` Ville Syrjala
  2020-01-16  0:20   ` Souza, Jose
  2020-01-15 19:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync Patchwork
                   ` (3 subsequent siblings)
  7 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjala @ 2020-01-15 19:08 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's not pollute the function scope with variables when they're
only needed inside some loops.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 97cf8457c956..76c17341df2b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13070,7 +13070,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 {
 	struct drm_crtc *crtc = pipe_config->uapi.crtc;
 	struct drm_atomic_state *state = pipe_config->uapi.state;
-	struct intel_encoder *encoder;
 	struct drm_connector *connector;
 	struct drm_connector_state *connector_state;
 	int base_bpp, ret;
@@ -13113,11 +13112,12 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 			       &pipe_config->pipe_src_h);
 
 	for_each_new_connector_in_state(state, connector, connector_state, i) {
+		struct intel_encoder *encoder =
+			to_intel_encoder(connector_state->best_encoder);
+
 		if (connector_state->crtc != crtc)
 			continue;
 
-		encoder = to_intel_encoder(connector_state->best_encoder);
-
 		if (!check_single_encoder_cloning(state, to_intel_crtc(crtc), encoder)) {
 			DRM_DEBUG_KMS("rejecting invalid cloning configuration\n");
 			return -EINVAL;
@@ -13167,6 +13167,9 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 	 * a chance to reject the mode entirely.
 	 */
 	for_each_new_connector_in_state(state, connector, connector_state, i) {
+		struct intel_encoder *encoder =
+			to_intel_encoder(connector_state->best_encoder);
+
 		if (connector_state->crtc != crtc)
 			continue;
 
@@ -13178,7 +13181,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 			return ret;
 		}
 
-		encoder = to_intel_encoder(connector_state->best_encoder);
 		ret = encoder->compute_config(encoder, pipe_config,
 					      connector_state);
 		if (ret < 0) {
-- 
2.24.1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
                   ` (3 preceding siblings ...)
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope Ville Syrjala
@ 2020-01-15 19:48 ` Patchwork
  2020-01-15 19:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-15 19:48 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync
URL   : https://patchwork.freedesktop.org/series/72083/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7751 -> Patchwork_16116
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/index.html

Known issues
------------

  Here are the changes found in Patchwork_16116 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_parallel@basic:
    - fi-tgl-y:           [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +2 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-tgl-y/igt@gem_exec_parallel@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-tgl-y/igt@gem_exec_parallel@basic.html

  * igt@gem_exec_suspend@basic-s0:
    - fi-cml-s:           [PASS][3] -> [FAIL][4] ([fdo#103375])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-cml-s/igt@gem_exec_suspend@basic-s0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-cml-s/igt@gem_exec_suspend@basic-s0.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-icl-guc:         [PASS][5] -> [DMESG-WARN][6] ([i915#109])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-icl-guc/igt@i915_module_load@reload-with-fault-injection.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-icl-guc/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@live_blt:
    - fi-ivb-3770:        [PASS][7] -> [DMESG-FAIL][8] ([i915#563])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-kbl-x1275:       [PASS][9] -> [INCOMPLETE][10] ([CI#80] / [i915#504])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-kbl-x1275/igt@i915_selftest@live_gem_contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-kbl-x1275/igt@i915_selftest@live_gem_contexts.html
    - fi-cml-s:           [PASS][11] -> [DMESG-FAIL][12] ([i915#877])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-cml-s/igt@i915_selftest@live_gem_contexts.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-cml-s/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
    - fi-icl-dsi:         [PASS][13] -> [DMESG-WARN][14] ([i915#109])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-icl-dsi/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-icl-dsi/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html

  
#### Possible fixes ####

  * igt@gem_close_race@basic-threads:
    - fi-byt-j1900:       [TIMEOUT][15] ([fdo#112271] / [i915#816]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-byt-j1900/igt@gem_close_race@basic-threads.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-byt-j1900/igt@gem_close_race@basic-threads.html

  * igt@gem_exec_gttfill@basic:
    - {fi-ehl-1}:         [INCOMPLETE][17] ([i915#937]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-ehl-1/igt@gem_exec_gttfill@basic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-ehl-1/igt@gem_exec_gttfill@basic.html

  * igt@i915_getparams_basic@basic-subslice-total:
    - fi-tgl-y:           [DMESG-WARN][19] ([i915#402]) -> [PASS][20] +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-tgl-y/igt@i915_getparams_basic@basic-subslice-total.html

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-skl-6770hq:      [DMESG-WARN][21] ([i915#889]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-skl-6770hq/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@module-reload:
    - fi-skl-6770hq:      [INCOMPLETE][23] ([i915#151]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-skl-6770hq/igt@i915_pm_rpm@module-reload.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][25] ([fdo#111096] / [i915#323]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Warnings ####

  * igt@i915_module_load@reload-with-fault-injection:
    - fi-cfl-8700k:       [DMESG-WARN][27] ([i915#889]) -> [INCOMPLETE][28] ([i915#505])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/fi-cfl-8700k/igt@i915_module_load@reload-with-fault-injection.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [CI#80]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/80
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#504]: https://gitlab.freedesktop.org/drm/intel/issues/504
  [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
  [i915#563]: https://gitlab.freedesktop.org/drm/intel/issues/563
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889
  [i915#937]: https://gitlab.freedesktop.org/drm/intel/issues/937


Participating hosts (46 -> 38)
------------------------------

  Additional (3): fi-hsw-peppy fi-blb-e6850 fi-byt-n2820 
  Missing    (11): fi-kbl-soraka fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-cfl-guc fi-gdg-551 fi-byt-clapper fi-bsw-nick fi-skl-6600u fi-kbl-r 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7751 -> Patchwork_16116

  CI-20190529: 20190529
  CI_DRM_7751: bffb5bf41a2e3d84ee5043dcccad49578656a012 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16116: 1060deea422567275d6c7d950283e5bca8d7b321 @ git://anongit.freedesktop.org/gfx-ci/linux


== Kernel 32bit build ==

Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/Patchwork_16116/build_32bit.log

  CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready  (#1)
  Building modules, stage 2.
  MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2


== Linux commits ==

1060deea4225 drm/i915: Move encoder variable to tighter scope
0799ff52fcba drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask
12fcf2727c3b drm/i915: Prefer to use the pipe to index the ddb entries
7a9734cbdc58 drm/i915: Clear most of crtc state when disabling the crtc
a7a6e4ad3544 drm/i915: Fix post-fastset modeset check for port sync

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: warning for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
                   ` (4 preceding siblings ...)
  2020-01-15 19:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync Patchwork
@ 2020-01-15 19:48 ` Patchwork
  2020-01-16  0:05 ` [Intel-gfx] [PATCH 1/5] " Souza, Jose
  2020-01-18  8:05 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] " Patchwork
  7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-15 19:48 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync
URL   : https://patchwork.freedesktop.org/series/72083/
State : warning

== Summary ==

CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready  (#1)
  Building modules, stage 2.
  MODPOST 122 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:93: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1282: recipe for target 'modules' failed
make: *** [modules] Error 2

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/build_32bit.log
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
                   ` (5 preceding siblings ...)
  2020-01-15 19:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
@ 2020-01-16  0:05 ` Souza, Jose
  2020-01-16 10:56   ` Ville Syrjälä
  2020-01-18  8:05 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] " Patchwork
  7 siblings, 1 reply; 16+ messages in thread
From: Souza, Jose @ 2020-01-16  0:05 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx

On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The post-fastset "does anyone still need a full modeset?" for
> port sync looks busted. The outer loop bails out of a full modeset
> is still needed by the current crtc which, and then we skip forcing
> a full modeset on the related crtcs. That's totally the opposite
> of what we want.

Ops yeah, it is always doing a full modeset.

> 
> The MST path has the logic mostly the other way around so it
> looks correct. To fix the port sync case let's follow the MST
> logic for both. So, if the current crtc already needs a modeset
> we do nothing. otherwise we check if any of the related crtcs
> needs a modeset, and if so we force a full modeset for the
> current crtc.
> 
> And while at let's change the else if to a plain if to so
> we don't have needless coupling between the MST and port sync
> checks.
> 
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Fixes: 05a8e45136ca ("drm/i915/display: Use external dependency loop
> for port sync")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 43 ++++++++--------
> ----
>  1 file changed, 17 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index dd03987cc24f..b397816ce253 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14469,37 +14469,23 @@ static int intel_atomic_check_crtcs(struct
> intel_atomic_state *state)
>  	return 0;
>  }
>  
> -static bool intel_cpu_transcoder_needs_modeset(struct
> intel_atomic_state *state,
> -					       enum transcoder
> transcoder)
> +static bool intel_cpu_transcoders_need_modeset(struct
> intel_atomic_state *state,
> +					       u8 transcoders)
>  {
> -	struct intel_crtc_state *new_crtc_state;
> +	const struct intel_crtc_state *new_crtc_state;
>  	struct intel_crtc *crtc;
>  	int i;
>  
> -	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i)
> -		if (new_crtc_state->cpu_transcoder == transcoder)
> -			return needs_modeset(new_crtc_state);
> +	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i) {
> +		if (new_crtc_state->hw.enable &&

The intel_pipe_config_compare() will force a modeset for MST and port
sync but this hw.enable could skip modeset in future features when one
of the pipes are going from enabled to disabled.

Removing it:

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> +		    transcoders & BIT(new_crtc_state->cpu_transcoder)
> &&
> +		    needs_modeset(new_crtc_state))
> +			return true;
> +	}
>  
>  	return false;
>  }
>  
> -static void
> -intel_modeset_synced_crtcs(struct intel_atomic_state *state,
> -			   u8 transcoders)
> -{
> -	struct intel_crtc_state *new_crtc_state;
> -	struct intel_crtc *crtc;
> -	int i;
> -
> -	for_each_new_intel_crtc_in_state(state, crtc,
> -					 new_crtc_state, i) {
> -		if (transcoders & BIT(new_crtc_state->cpu_transcoder))
> {
> -			new_crtc_state->uapi.mode_changed = true;
> -			new_crtc_state->update_pipe = false;
> -		}
> -	}
> -}
> -
>  static int
>  intel_modeset_all_tiles(struct intel_atomic_state *state, int
> tile_grp_id)
>  {
> @@ -14655,15 +14641,20 @@ static int intel_atomic_check(struct
> drm_device *dev,
>  		if (intel_dp_mst_is_slave_trans(new_crtc_state)) {
>  			enum transcoder master = new_crtc_state-
> >mst_master_transcoder;
>  
> -			if (intel_cpu_transcoder_needs_modeset(state,
> master)) {
> +			if (intel_cpu_transcoders_need_modeset(state,
> BIT(master))) {
>  				new_crtc_state->uapi.mode_changed =
> true;
>  				new_crtc_state->update_pipe = false;
>  			}
> -		} else if (is_trans_port_sync_mode(new_crtc_state)) {
> +		}
> +
> +		if (is_trans_port_sync_mode(new_crtc_state)) {
>  			u8 trans = new_crtc_state-
> >sync_mode_slaves_mask |
>  				   BIT(new_crtc_state-
> >master_transcoder);
>  
> -			intel_modeset_synced_crtcs(state, trans);
> +			if (intel_cpu_transcoders_need_modeset(state,
> trans)) {
> +				new_crtc_state->uapi.mode_changed =
> true;
> +				new_crtc_state->update_pipe = false;
> +			}
>  		}
>  	}
>  
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc Ville Syrjala
@ 2020-01-16  0:14   ` Souza, Jose
  0 siblings, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-01-16  0:14 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx

On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Currently we don't call intel_crtc_prepare_cleared_state() for crtcs
> that are going to be entirely disabled (uapi.enable==false). That
> means such crtcs will leave state junk lying around in their states
> and we have to sprinkle hw.enable checks all over before we can
> look at the states. Let's change that a bit so that we aways do
> the state clearing, even for fully disabled crtcs.
> 
> Note that we still keep some parts of the old state (see
> intel_crtc_prepare_cleared_state() for the details) so probably
> can't trust things 100% when hw.enable==false. But at least there's
> less chance now that we end up looking at stale junk.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b397816ce253..e68af024e13c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14607,15 +14607,13 @@ static int intel_atomic_check(struct
> drm_device *dev,
>  			continue;
>  		}
>  
> -		if (!new_crtc_state->uapi.enable) {
> -			intel_crtc_copy_uapi_to_hw_state(new_crtc_state
> );
> -			continue;
> -		}
> -
>  		ret = intel_crtc_prepare_cleared_state(new_crtc_state);
>  		if (ret)
>  			goto fail;
>  
> +		if (!new_crtc_state->hw.enable)
> +			continue;
> +
>  		ret = intel_modeset_pipe_config(new_crtc_state);
>  		if (ret)
>  			goto fail;
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries Ville Syrjala
@ 2020-01-16  0:19   ` Souza, Jose
  0 siblings, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-01-16  0:19 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx

On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's use the pipe rather than the silly 'i' iterator from
> for_each_oldnew_intel_crtc_in_state() for indexing the ddb
> entries array. Maybe one day we can assume c99 and hide the
> 'i' entirely from sight.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>


> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 20 +++++++++++-------
> --
>  1 file changed, 11 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index e68af024e13c..64a377d61ce0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15106,15 +15106,17 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
>  	int i;
>  
>  	for_each_oldnew_intel_crtc_in_state(state, crtc,
> old_crtc_state, new_crtc_state, i) {
> +		enum pipe pipe = crtc->pipe;
> +
>  		if (!new_crtc_state->hw.active)
>  			continue;
>  
>  		/* ignore allocations for crtc's that have been turned
> off. */
>  		if (!needs_modeset(new_crtc_state)) {
> -			entries[i] = old_crtc_state->wm.skl.ddb;
> -			update_pipes |= BIT(crtc->pipe);
> +			entries[pipe] = old_crtc_state->wm.skl.ddb;
> +			update_pipes |= BIT(pipe);
>  		} else {
> -			modeset_pipes |= BIT(crtc->pipe);
> +			modeset_pipes |= BIT(pipe);
>  		}
>  	}
>  
> @@ -15140,10 +15142,10 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
>  				continue;
>  
>  			if
> (skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
> -							entries,
> num_pipes, i))
> +							entries,
> num_pipes, pipe))
>  				continue;
>  
> -			entries[i] = new_crtc_state->wm.skl.ddb;
> +			entries[pipe] = new_crtc_state->wm.skl.ddb;
>  			update_pipes &= ~BIT(pipe);
>  
>  			intel_update_crtc(crtc, state, old_crtc_state,
> @@ -15178,9 +15180,9 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
>  			continue;
>  
>  		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state-
> >wm.skl.ddb,
> -						    entries, num_pipes,
> i));
> +						    entries, num_pipes,
> pipe));
>  
> -		entries[i] = new_crtc_state->wm.skl.ddb;
> +		entries[pipe] = new_crtc_state->wm.skl.ddb;
>  		modeset_pipes &= ~BIT(pipe);
>  
>  		if (is_trans_port_sync_mode(new_crtc_state)) {
> @@ -15213,9 +15215,9 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
>  			continue;
>  
>  		WARN_ON(skl_ddb_allocation_overlaps(&new_crtc_state-
> >wm.skl.ddb,
> -						    entries, num_pipes,
> i));
> +						    entries, num_pipes,
> pipe));
>  
> -		entries[i] = new_crtc_state->wm.skl.ddb;
> +		entries[pipe] = new_crtc_state->wm.skl.ddb;
>  		modeset_pipes &= ~BIT(pipe);
>  
>  		intel_update_crtc(crtc, state, old_crtc_state,
> new_crtc_state);
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask Ville Syrjala
@ 2020-01-16  0:19   ` Souza, Jose
  2020-01-16  0:37   ` Manasi Navare
  1 sibling, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-01-16  0:19 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx

On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> sync_mode_slaves_mask is a bitmask so use PIPE_CONF_CHECK_X() for it
> so we get the mismatch printed in hex instead of decimal.
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 64a377d61ce0..97cf8457c956 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13695,7 +13695,7 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
>  	PIPE_CONF_CHECK_INFOFRAME(hdmi);
>  	PIPE_CONF_CHECK_INFOFRAME(drm);
>  
> -	PIPE_CONF_CHECK_I(sync_mode_slaves_mask);
> +	PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
>  	PIPE_CONF_CHECK_I(master_transcoder);
>  
>  	PIPE_CONF_CHECK_I(dsc.compression_enable);
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^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope Ville Syrjala
@ 2020-01-16  0:20   ` Souza, Jose
  0 siblings, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-01-16  0:20 UTC (permalink / raw)
  To: ville.syrjala, intel-gfx

On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's not pollute the function scope with variables when they're
> only needed inside some loops.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 97cf8457c956..76c17341df2b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13070,7 +13070,6 @@ intel_modeset_pipe_config(struct
> intel_crtc_state *pipe_config)
>  {
>  	struct drm_crtc *crtc = pipe_config->uapi.crtc;
>  	struct drm_atomic_state *state = pipe_config->uapi.state;
> -	struct intel_encoder *encoder;
>  	struct drm_connector *connector;
>  	struct drm_connector_state *connector_state;
>  	int base_bpp, ret;
> @@ -13113,11 +13112,12 @@ intel_modeset_pipe_config(struct
> intel_crtc_state *pipe_config)
>  			       &pipe_config->pipe_src_h);
>  
>  	for_each_new_connector_in_state(state, connector,
> connector_state, i) {
> +		struct intel_encoder *encoder =
> +			to_intel_encoder(connector_state-
> >best_encoder);
> +
>  		if (connector_state->crtc != crtc)
>  			continue;
>  
> -		encoder = to_intel_encoder(connector_state-
> >best_encoder);
> -
>  		if (!check_single_encoder_cloning(state,
> to_intel_crtc(crtc), encoder)) {
>  			DRM_DEBUG_KMS("rejecting invalid cloning
> configuration\n");
>  			return -EINVAL;
> @@ -13167,6 +13167,9 @@ intel_modeset_pipe_config(struct
> intel_crtc_state *pipe_config)
>  	 * a chance to reject the mode entirely.
>  	 */
>  	for_each_new_connector_in_state(state, connector,
> connector_state, i) {
> +		struct intel_encoder *encoder =
> +			to_intel_encoder(connector_state-
> >best_encoder);
> +
>  		if (connector_state->crtc != crtc)
>  			continue;
>  
> @@ -13178,7 +13181,6 @@ intel_modeset_pipe_config(struct
> intel_crtc_state *pipe_config)
>  			return ret;
>  		}
>  
> -		encoder = to_intel_encoder(connector_state-
> >best_encoder);
>  		ret = encoder->compute_config(encoder, pipe_config,
>  					      connector_state);
>  		if (ret < 0) {
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^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask
  2020-01-15 19:08 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask Ville Syrjala
  2020-01-16  0:19   ` Souza, Jose
@ 2020-01-16  0:37   ` Manasi Navare
  1 sibling, 0 replies; 16+ messages in thread
From: Manasi Navare @ 2020-01-16  0:37 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

On Wed, Jan 15, 2020 at 09:08:12PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> sync_mode_slaves_mask is a bitmask so use PIPE_CONF_CHECK_X() for it
> so we get the mismatch printed in hex instead of decimal.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Yes makes sense also tested this on the 8K tiled display,

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Tested-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 64a377d61ce0..97cf8457c956 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13695,7 +13695,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
>  	PIPE_CONF_CHECK_INFOFRAME(hdmi);
>  	PIPE_CONF_CHECK_INFOFRAME(drm);
>  
> -	PIPE_CONF_CHECK_I(sync_mode_slaves_mask);
> +	PIPE_CONF_CHECK_X(sync_mode_slaves_mask);
>  	PIPE_CONF_CHECK_I(master_transcoder);
>  
>  	PIPE_CONF_CHECK_I(dsc.compression_enable);
> -- 
> 2.24.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync
  2020-01-16  0:05 ` [Intel-gfx] [PATCH 1/5] " Souza, Jose
@ 2020-01-16 10:56   ` Ville Syrjälä
  2020-01-16 18:15     ` Souza, Jose
  0 siblings, 1 reply; 16+ messages in thread
From: Ville Syrjälä @ 2020-01-16 10:56 UTC (permalink / raw)
  To: Souza, Jose; +Cc: intel-gfx

On Thu, Jan 16, 2020 at 12:05:43AM +0000, Souza, Jose wrote:
> On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > The post-fastset "does anyone still need a full modeset?" for
> > port sync looks busted. The outer loop bails out of a full modeset
> > is still needed by the current crtc which, and then we skip forcing
> > a full modeset on the related crtcs. That's totally the opposite
> > of what we want.
> 
> Ops yeah, it is always doing a full modeset.
> 
> > 
> > The MST path has the logic mostly the other way around so it
> > looks correct. To fix the port sync case let's follow the MST
> > logic for both. So, if the current crtc already needs a modeset
> > we do nothing. otherwise we check if any of the related crtcs
> > needs a modeset, and if so we force a full modeset for the
> > current crtc.
> > 
> > And while at let's change the else if to a plain if to so
> > we don't have needless coupling between the MST and port sync
> > checks.
> > 
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > Fixes: 05a8e45136ca ("drm/i915/display: Use external dependency loop
> > for port sync")
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 43 ++++++++--------
> > ----
> >  1 file changed, 17 insertions(+), 26 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index dd03987cc24f..b397816ce253 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -14469,37 +14469,23 @@ static int intel_atomic_check_crtcs(struct
> > intel_atomic_state *state)
> >  	return 0;
> >  }
> >  
> > -static bool intel_cpu_transcoder_needs_modeset(struct
> > intel_atomic_state *state,
> > -					       enum transcoder
> > transcoder)
> > +static bool intel_cpu_transcoders_need_modeset(struct
> > intel_atomic_state *state,
> > +					       u8 transcoders)
> >  {
> > -	struct intel_crtc_state *new_crtc_state;
> > +	const struct intel_crtc_state *new_crtc_state;
> >  	struct intel_crtc *crtc;
> >  	int i;
> >  
> > -	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> > i)
> > -		if (new_crtc_state->cpu_transcoder == transcoder)
> > -			return needs_modeset(new_crtc_state);
> > +	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> > i) {
> > +		if (new_crtc_state->hw.enable &&
> 
> The intel_pipe_config_compare() will force a modeset for MST and port
> sync but this hw.enable could skip modeset in future features when one
> of the pipes are going from enabled to disabled.

We can't trust what's in .cpu_transcoder when enable==false. It can
be some stale junk left over from the previous state. Well, until
the next patch at least.

If the disabled pipe was the master then the mst/port sync master
transcoder will change and the fastset check won't pass on any of the
slaves. So the enable check is fine for that case.

If the disabled pipe was one of the port sync slaves the relevant
bitmask will change for the master, again making the fastset check
fail. And thus this code here will force a modeset for all the
other slaves.

So can't see how having the check could be a problem.

> 
> Removing it:
> 
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> 
> > +		    transcoders & BIT(new_crtc_state->cpu_transcoder)
> > &&
> > +		    needs_modeset(new_crtc_state))
> > +			return true;
> > +	}
> >  
> >  	return false;
> >  }
> >  
> > -static void
> > -intel_modeset_synced_crtcs(struct intel_atomic_state *state,
> > -			   u8 transcoders)
> > -{
> > -	struct intel_crtc_state *new_crtc_state;
> > -	struct intel_crtc *crtc;
> > -	int i;
> > -
> > -	for_each_new_intel_crtc_in_state(state, crtc,
> > -					 new_crtc_state, i) {
> > -		if (transcoders & BIT(new_crtc_state->cpu_transcoder))
> > {
> > -			new_crtc_state->uapi.mode_changed = true;
> > -			new_crtc_state->update_pipe = false;
> > -		}
> > -	}
> > -}
> > -
> >  static int
> >  intel_modeset_all_tiles(struct intel_atomic_state *state, int
> > tile_grp_id)
> >  {
> > @@ -14655,15 +14641,20 @@ static int intel_atomic_check(struct
> > drm_device *dev,
> >  		if (intel_dp_mst_is_slave_trans(new_crtc_state)) {
> >  			enum transcoder master = new_crtc_state-
> > >mst_master_transcoder;
> >  
> > -			if (intel_cpu_transcoder_needs_modeset(state,
> > master)) {
> > +			if (intel_cpu_transcoders_need_modeset(state,
> > BIT(master))) {
> >  				new_crtc_state->uapi.mode_changed =
> > true;
> >  				new_crtc_state->update_pipe = false;
> >  			}
> > -		} else if (is_trans_port_sync_mode(new_crtc_state)) {
> > +		}
> > +
> > +		if (is_trans_port_sync_mode(new_crtc_state)) {
> >  			u8 trans = new_crtc_state-
> > >sync_mode_slaves_mask |
> >  				   BIT(new_crtc_state-
> > >master_transcoder);
> >  
> > -			intel_modeset_synced_crtcs(state, trans);
> > +			if (intel_cpu_transcoders_need_modeset(state,
> > trans)) {
> > +				new_crtc_state->uapi.mode_changed =
> > true;
> > +				new_crtc_state->update_pipe = false;
> > +			}
> >  		}
> >  	}
> >  

-- 
Ville Syrjälä
Intel
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^ permalink raw reply	[flat|nested] 16+ messages in thread

* Re: [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync
  2020-01-16 10:56   ` Ville Syrjälä
@ 2020-01-16 18:15     ` Souza, Jose
  0 siblings, 0 replies; 16+ messages in thread
From: Souza, Jose @ 2020-01-16 18:15 UTC (permalink / raw)
  To: ville.syrjala; +Cc: intel-gfx

On Thu, 2020-01-16 at 12:56 +0200, Ville Syrjälä wrote:
> On Thu, Jan 16, 2020 at 12:05:43AM +0000, Souza, Jose wrote:
> > On Wed, 2020-01-15 at 21:08 +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > The post-fastset "does anyone still need a full modeset?" for
> > > port sync looks busted. The outer loop bails out of a full
> > > modeset
> > > is still needed by the current crtc which, and then we skip
> > > forcing
> > > a full modeset on the related crtcs. That's totally the opposite
> > > of what we want.
> > 
> > Ops yeah, it is always doing a full modeset.
> > 
> > > The MST path has the logic mostly the other way around so it
> > > looks correct. To fix the port sync case let's follow the MST
> > > logic for both. So, if the current crtc already needs a modeset
> > > we do nothing. otherwise we check if any of the related crtcs
> > > needs a modeset, and if so we force a full modeset for the
> > > current crtc.
> > > 
> > > And while at let's change the else if to a plain if to so
> > > we don't have needless coupling between the MST and port sync
> > > checks.
> > > 
> > > Cc: José Roberto de Souza <jose.souza@intel.com>
> > > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > > Fixes: 05a8e45136ca ("drm/i915/display: Use external dependency
> > > loop
> > > for port sync")
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_display.c | 43 ++++++++----
> > > ----
> > > ----
> > >  1 file changed, 17 insertions(+), 26 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index dd03987cc24f..b397816ce253 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -14469,37 +14469,23 @@ static int
> > > intel_atomic_check_crtcs(struct
> > > intel_atomic_state *state)
> > >  	return 0;
> > >  }
> > >  
> > > -static bool intel_cpu_transcoder_needs_modeset(struct
> > > intel_atomic_state *state,
> > > -					       enum transcoder
> > > transcoder)
> > > +static bool intel_cpu_transcoders_need_modeset(struct
> > > intel_atomic_state *state,
> > > +					       u8 transcoders)
> > >  {
> > > -	struct intel_crtc_state *new_crtc_state;
> > > +	const struct intel_crtc_state *new_crtc_state;
> > >  	struct intel_crtc *crtc;
> > >  	int i;
> > >  
> > > -	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> > > i)
> > > -		if (new_crtc_state->cpu_transcoder == transcoder)
> > > -			return needs_modeset(new_crtc_state);
> > > +	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> > > i) {
> > > +		if (new_crtc_state->hw.enable &&
> > 
> > The intel_pipe_config_compare() will force a modeset for MST and
> > port
> > sync but this hw.enable could skip modeset in future features when
> > one
> > of the pipes are going from enabled to disabled.
> 
> We can't trust what's in .cpu_transcoder when enable==false. It can
> be some stale junk left over from the previous state. Well, until
> the next patch at least.
> 
> If the disabled pipe was the master then the mst/port sync master
> transcoder will change and the fastset check won't pass on any of the
> slaves. So the enable check is fine for that case.
> 
> If the disabled pipe was one of the port sync slaves the relevant
> bitmask will change for the master, again making the fastset check
> fail. And thus this code here will force a modeset for all the
> other slaves.
> 
> So can't see how having the check could be a problem.

I know this will not affect MST and port sync, I was thinking in future
users of this function but okay, we can leave that to be worked when
such users shows up.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> > Removing it:
> > 
> > Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> > 
> > > +		    transcoders & BIT(new_crtc_state->cpu_transcoder)
> > > &&
> > > +		    needs_modeset(new_crtc_state))
> > > +			return true;
> > > +	}
> > >  
> > >  	return false;
> > >  }
> > >  
> > > -static void
> > > -intel_modeset_synced_crtcs(struct intel_atomic_state *state,
> > > -			   u8 transcoders)
> > > -{
> > > -	struct intel_crtc_state *new_crtc_state;
> > > -	struct intel_crtc *crtc;
> > > -	int i;
> > > -
> > > -	for_each_new_intel_crtc_in_state(state, crtc,
> > > -					 new_crtc_state, i) {
> > > -		if (transcoders & BIT(new_crtc_state->cpu_transcoder))
> > > {
> > > -			new_crtc_state->uapi.mode_changed = true;
> > > -			new_crtc_state->update_pipe = false;
> > > -		}
> > > -	}
> > > -}
> > > -
> > >  static int
> > >  intel_modeset_all_tiles(struct intel_atomic_state *state, int
> > > tile_grp_id)
> > >  {
> > > @@ -14655,15 +14641,20 @@ static int intel_atomic_check(struct
> > > drm_device *dev,
> > >  		if (intel_dp_mst_is_slave_trans(new_crtc_state)) {
> > >  			enum transcoder master = new_crtc_state-
> > > > mst_master_transcoder;
> > >  
> > > -			if (intel_cpu_transcoder_needs_modeset(state,
> > > master)) {
> > > +			if (intel_cpu_transcoders_need_modeset(state,
> > > BIT(master))) {
> > >  				new_crtc_state->uapi.mode_changed =
> > > true;
> > >  				new_crtc_state->update_pipe = false;
> > >  			}
> > > -		} else if (is_trans_port_sync_mode(new_crtc_state)) {
> > > +		}
> > > +
> > > +		if (is_trans_port_sync_mode(new_crtc_state)) {
> > >  			u8 trans = new_crtc_state-
> > > > sync_mode_slaves_mask |
> > >  				   BIT(new_crtc_state-
> > > > master_transcoder);
> > >  
> > > -			intel_modeset_synced_crtcs(state, trans);
> > > +			if (intel_cpu_transcoders_need_modeset(state,
> > > trans)) {
> > > +				new_crtc_state->uapi.mode_changed =
> > > true;
> > > +				new_crtc_state->update_pipe = false;
> > > +			}
> > >  		}
> > >  	}
> > >  
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^ permalink raw reply	[flat|nested] 16+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync
  2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
                   ` (6 preceding siblings ...)
  2020-01-16  0:05 ` [Intel-gfx] [PATCH 1/5] " Souza, Jose
@ 2020-01-18  8:05 ` Patchwork
  7 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2020-01-18  8:05 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync
URL   : https://patchwork.freedesktop.org/series/72083/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7751_full -> Patchwork_16116_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_16116_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vcs1-dirty-create:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb1/igt@gem_ctx_isolation@vcs1-dirty-create.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb5/igt@gem_ctx_isolation@vcs1-dirty-create.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-snb:          [PASS][3] -> [FAIL][4] ([i915#490])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-snb7/igt@gem_eio@in-flight-contexts-1us.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-snb6/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_await@wide-all:
    - shard-tglb:         [PASS][5] -> [INCOMPLETE][6] ([fdo#111736] / [i915#472])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb7/igt@gem_exec_await@wide-all.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb3/igt@gem_exec_await@wide-all.html

  * igt@gem_exec_create@forked:
    - shard-glk:          [PASS][7] -> [TIMEOUT][8] ([fdo#112271] / [i915#940])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-glk5/igt@gem_exec_create@forked.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-glk2/igt@gem_exec_create@forked.html

  * igt@gem_exec_parallel@basic:
    - shard-tglb:         [PASS][9] -> [INCOMPLETE][10] ([i915#472] / [i915#476])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb7/igt@gem_exec_parallel@basic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb8/igt@gem_exec_parallel@basic.html

  * igt@gem_exec_schedule@pi-common-bsd:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([i915#677])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb6/igt@gem_exec_schedule@pi-common-bsd.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb4/igt@gem_exec_schedule@pi-common-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#109276]) +24 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd2:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#111677] / [i915#472])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb4/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd2.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd2.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#112146]) +7 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [PASS][19] -> [INCOMPLETE][20] ([i915#463] / [i915#472])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb8/igt@gem_exec_schedule@smoketest-all.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb7/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_exec_schedule@smoketest-bsd2:
    - shard-tglb:         [PASS][21] -> [INCOMPLETE][22] ([i915#472] / [i915#707])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb5/igt@gem_exec_schedule@smoketest-bsd2.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb6/igt@gem_exec_schedule@smoketest-bsd2.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
    - shard-skl:          [PASS][23] -> [TIMEOUT][24] ([fdo#112271] / [i915#530])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl4/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl3/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-hsw:          [PASS][25] -> [TIMEOUT][26] ([fdo#112271] / [i915#530])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-hsw7/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-hsw5/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-tglb:         [PASS][27] -> [FAIL][28] ([i915#520])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb1/igt@gem_persistent_relocs@forked-thrashing.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb5/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_ppgtt@blt-vs-render-ctxn:
    - shard-tglb:         [PASS][29] -> [INCOMPLETE][30] ([i915#470] / [i915#472] / [i915#475])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb1/igt@gem_ppgtt@blt-vs-render-ctxn.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb6/igt@gem_ppgtt@blt-vs-render-ctxn.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [PASS][31] -> [FAIL][32] ([i915#644])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-glk9/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_sync@basic-store-all:
    - shard-tglb:         [PASS][33] -> [INCOMPLETE][34] ([i915#472])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb1/igt@gem_sync@basic-store-all.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb4/igt@gem_sync@basic-store-all.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [PASS][35] -> [FAIL][36] ([i915#454])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb6/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_suspend@debugfs-reader:
    - shard-skl:          [PASS][37] -> [INCOMPLETE][38] ([i915#69]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl1/igt@i915_suspend@debugfs-reader.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl10/igt@i915_suspend@debugfs-reader.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][39] -> [DMESG-WARN][40] ([i915#180]) +3 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-skl:          [PASS][41] -> [FAIL][42] ([IGT#5])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][43] -> [FAIL][44] ([i915#79])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
    - shard-glk:          [PASS][45] -> [FAIL][46] ([i915#79])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][47] -> [DMESG-WARN][48] ([i915#180]) +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-tglb:         [PASS][49] -> [FAIL][50] ([i915#49])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_plane@pixel-format-pipe-b-planes:
    - shard-skl:          [PASS][51] -> [DMESG-WARN][52] ([i915#109])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl4/igt@kms_plane@pixel-format-pipe-b-planes.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl3/igt@kms_plane@pixel-format-pipe-b-planes.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][53] -> [SKIP][54] ([fdo#109642] / [fdo#111068])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb4/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [PASS][55] -> [SKIP][56] ([fdo#109441])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb1/igt@kms_psr@psr2_cursor_render.html

  * igt@perf_pmu@busy-vcs1:
    - shard-iclb:         [PASS][57] -> [SKIP][58] ([fdo#112080]) +10 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb1/igt@perf_pmu@busy-vcs1.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb8/igt@perf_pmu@busy-vcs1.html

  * igt@perf_pmu@enable-race-vcs0:
    - shard-tglb:         [PASS][59] -> [INCOMPLETE][60] ([i915#472] / [i915#480])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb5/igt@perf_pmu@enable-race-vcs0.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb8/igt@perf_pmu@enable-race-vcs0.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@vecs0-mixed-process:
    - shard-apl:          [FAIL][61] ([i915#679]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl4/igt@gem_ctx_persistence@vecs0-mixed-process.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-apl6/igt@gem_ctx_persistence@vecs0-mixed-process.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][63] ([fdo#110854]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb6/igt@gem_exec_balancer@smoke.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb1/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@pi-shared-iova-bsd:
    - shard-iclb:         [SKIP][65] ([i915#677]) -> [PASS][66] +1 similar issue
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@gem_exec_schedule@pi-shared-iova-bsd.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb6/igt@gem_exec_schedule@pi-shared-iova-bsd.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [SKIP][67] ([fdo#112146]) -> [PASS][68] +5 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-contexts-bsd1:
    - shard-tglb:         [INCOMPLETE][69] ([fdo#111606] / [fdo#111677] / [i915#472]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb3/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb4/igt@gem_exec_schedule@preempt-queue-contexts-bsd1.html

  * igt@gem_exec_schedule@preempt-queue-contexts-chain-render:
    - shard-tglb:         [INCOMPLETE][71] ([fdo#111677] / [i915#472]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb6/igt@gem_exec_schedule@preempt-queue-contexts-chain-render.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb1/igt@gem_exec_schedule@preempt-queue-contexts-chain-render.html

  * igt@gem_exec_schedule@smoketest-vebox:
    - shard-tglb:         [INCOMPLETE][73] ([i915#472] / [i915#707]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb3/igt@gem_exec_schedule@smoketest-vebox.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb7/igt@gem_exec_schedule@smoketest-vebox.html

  * igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing:
    - shard-kbl:          [TIMEOUT][75] ([fdo#112271] / [i915#530]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl1/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-kbl2/igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible-thrash-inactive:
    - shard-skl:          [TIMEOUT][77] ([fdo#112271] / [i915#530]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl6/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl7/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
    - shard-snb:          [TIMEOUT][79] ([fdo#112271] / [i915#530]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-snb7/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-snb4/igt@gem_persistent_relocs@forked-interruptible-thrash-inactive.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-iclb:         [FAIL][81] ([i915#520]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb1/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-kbl:          [INCOMPLETE][83] ([fdo#103665] / [i915#530]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl3/igt@gem_persistent_relocs@forked-thrashing.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-kbl3/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-apl:          [FAIL][85] ([i915#644]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_sync@basic-store-each:
    - shard-tglb:         [INCOMPLETE][87] ([i915#472]) -> [PASS][88] +1 similar issue
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb6/igt@gem_sync@basic-store-each.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb1/igt@gem_sync@basic-store-each.html

  * igt@gem_workarounds@suspend-resume:
    - shard-apl:          [DMESG-WARN][89] ([i915#180]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-apl6/igt@gem_workarounds@suspend-resume.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-apl7/igt@gem_workarounds@suspend-resume.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-skl:          [INCOMPLETE][91] ([i915#300]) -> [PASS][92]
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - shard-tglb:         [FAIL][93] ([i915#49]) -> [PASS][94] +1 similar issue
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb4/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-kbl:          [DMESG-WARN][95] ([i915#56]) -> [PASS][96]
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-kbl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
    - shard-skl:          [DMESG-WARN][97] ([IGT#6]) -> [PASS][98]
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-skl2/igt@kms_plane_multiple@atomic-pipe-b-tiling-y.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-skl8/igt@kms_plane_multiple@atomic-pipe-b-tiling-y.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][99] ([fdo#109642] / [fdo#111068]) -> [PASS][100]
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@kms_psr2_su@frontbuffer.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [SKIP][101] ([fdo#109441]) -> [PASS][102] +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [FAIL][103] ([i915#31]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl6/igt@kms_setmode@basic.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-kbl2/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [DMESG-WARN][105] ([i915#180]) -> [PASS][106] +4 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  * igt@perf_pmu@busy-check-all-vcs1:
    - shard-iclb:         [SKIP][107] ([fdo#112080]) -> [PASS][108] +15 similar issues
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb6/igt@perf_pmu@busy-check-all-vcs1.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb1/igt@perf_pmu@busy-check-all-vcs1.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][109] ([fdo#109276]) -> [PASS][110] +27 similar issues
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb8/igt@prime_busy@hang-bsd2.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb1/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][111] ([IGT#28]) -> [SKIP][112] ([fdo#109276] / [fdo#112080])
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_eio@kms:
    - shard-snb:          [INCOMPLETE][113] ([i915#82]) -> [DMESG-WARN][114] ([i915#444])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-snb5/igt@gem_eio@kms.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-snb5/igt@gem_eio@kms.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-tglb:         [SKIP][115] ([i915#468]) -> [FAIL][116] ([i915#454])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7751/shard-tglb3/igt@i915_pm_dc@dc6-dpms.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/shard-tglb4/igt@i915_pm_dc@dc6-dpms.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [IGT#5]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/5
  [IGT#6]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/6
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#300]: https://gitlab.freedesktop.org/drm/intel/issues/300
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#444]: https://gitlab.freedesktop.org/drm/intel/issues/444
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#463]: https://gitlab.freedesktop.org/drm/intel/issues/463
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#470]: https://gitlab.freedesktop.org/drm/intel/issues/470
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#475]: https://gitlab.freedesktop.org/drm/intel/issues/475
  [i915#476]: https://gitlab.freedesktop.org/drm/intel/issues/476
  [i915#480]: https://gitlab.freedesktop.org/drm/intel/issues/480
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#490]: https://gitlab.freedesktop.org/drm/intel/issues/490
  [i915#520]: https://gitlab.freedesktop.org/drm/intel/issues/520
  [i915#530]: https://gitlab.freedesktop.org/drm/intel/issues/530
  [i915#56]: https://gitlab.freedesktop.org/drm/intel/issues/56
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#707]: https://gitlab.freedesktop.org/drm/intel/issues/707
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
  [i915#940]: https://gitlab.freedesktop.org/drm/intel/issues/940


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7751 -> Patchwork_16116

  CI-20190529: 20190529
  CI_DRM_7751: bffb5bf41a2e3d84ee5043dcccad49578656a012 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5367: 94af6de4f07487b93c4f5008f3ed04b5fc045200 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16116: 1060deea422567275d6c7d950283e5bca8d7b321 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16116/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2020-01-18  8:05 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-01-15 19:08 [Intel-gfx] [PATCH 1/5] drm/i915: Fix post-fastset modeset check for port sync Ville Syrjala
2020-01-15 19:08 ` [Intel-gfx] [PATCH 2/5] drm/i915: Clear most of crtc state when disabling the crtc Ville Syrjala
2020-01-16  0:14   ` Souza, Jose
2020-01-15 19:08 ` [Intel-gfx] [PATCH 3/5] drm/i915: Prefer to use the pipe to index the ddb entries Ville Syrjala
2020-01-16  0:19   ` Souza, Jose
2020-01-15 19:08 ` [Intel-gfx] [PATCH 4/5] drm/i915: Use PIPE_CONF_CHECK_X() for sync_mode_slaves_mask Ville Syrjala
2020-01-16  0:19   ` Souza, Jose
2020-01-16  0:37   ` Manasi Navare
2020-01-15 19:08 ` [Intel-gfx] [PATCH 5/5] drm/i915: Move encoder variable to tighter scope Ville Syrjala
2020-01-16  0:20   ` Souza, Jose
2020-01-15 19:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Fix post-fastset modeset check for port sync Patchwork
2020-01-15 19:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: warning " Patchwork
2020-01-16  0:05 ` [Intel-gfx] [PATCH 1/5] " Souza, Jose
2020-01-16 10:56   ` Ville Syrjälä
2020-01-16 18:15     ` Souza, Jose
2020-01-18  8:05 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] " Patchwork

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