* [Intel-gfx] [PATCH v3] drm/i915/gem: Don't leak non-persistent requests on changing engines @ 2020-02-11 14:48 Chris Wilson 2020-02-11 19:40 ` Tvrtko Ursulin 2020-02-13 18:07 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5) Patchwork 0 siblings, 2 replies; 3+ messages in thread From: Chris Wilson @ 2020-02-11 14:48 UTC (permalink / raw) To: intel-gfx If we have a set of active engines marked as being non-persistent, we lose track of those if the user replaces those engines with I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is that non-persistent requests are terminated if they are no longer being tracked by the user's context (in order to prevent a lost request causing an untracked and so unstoppable GPU hang), we need to apply the same context cancellation upon changing engines. v2: Track stale engines[] so we only reap at context closure. v3: Tvrtko spotted races with closing contexts and set-engines, so add a veneer of kill-everything paranoia to clean up after losing a race. Fixes: a0e047156cde ("drm/i915/gem: Make context persistence optional") Testcase: igt/gem_ctx_peristence/replace Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 122 ++++++++++++++++-- .../gpu/drm/i915/gem/i915_gem_context_types.h | 13 +- drivers/gpu/drm/i915/i915_sw_fence.c | 17 ++- drivers/gpu/drm/i915/i915_sw_fence.h | 2 +- 4 files changed, 141 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index cfaf5bbdbcab..3e82739bdbc0 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -270,7 +270,8 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) if (!e) return ERR_PTR(-ENOMEM); - init_rcu_head(&e->rcu); + e->ctx = ctx; + for_each_engine(engine, gt, id) { struct intel_context *ce; @@ -450,7 +451,7 @@ static struct intel_engine_cs *active_engine(struct intel_context *ce) return engine; } -static void kill_context(struct i915_gem_context *ctx) +static void kill_engines(struct i915_gem_engines *engines) { struct i915_gem_engines_iter it; struct intel_context *ce; @@ -462,7 +463,7 @@ static void kill_context(struct i915_gem_context *ctx) * However, we only care about pending requests, so only include * engines on which there are incomplete requests. */ - for_each_gem_engine(ce, __context_engines_static(ctx), it) { + for_each_gem_engine(ce, engines, it) { struct intel_engine_cs *engine; if (intel_context_set_banned(ce)) @@ -484,8 +485,37 @@ static void kill_context(struct i915_gem_context *ctx) * the context from the GPU, we have to resort to a full * reset. We hope the collateral damage is worth it. */ - __reset_context(ctx, engine); + __reset_context(engines->ctx, engine); + } +} + +static void kill_stale_engines(struct i915_gem_context *ctx) +{ + struct i915_gem_engines *pos, *next; + unsigned long flags; + + spin_lock_irqsave(&ctx->stale.lock, flags); + list_for_each_entry_safe(pos, next, &ctx->stale.engines, link) { + if (!i915_sw_fence_await(&pos->fence)) + continue; + + spin_unlock_irqrestore(&ctx->stale.lock, flags); + + kill_engines(pos); + + spin_lock_irqsave(&ctx->stale.lock, flags); + list_safe_reset_next(pos, next, link); + list_del_init(&pos->link); /* decouple from FENCE_COMPLETE */ + + i915_sw_fence_complete(&pos->fence); } + spin_unlock_irqrestore(&ctx->stale.lock, flags); +} + +static void kill_context(struct i915_gem_context *ctx) +{ + kill_stale_engines(ctx); + kill_engines(__context_engines_static(ctx)); } static void set_closed_name(struct i915_gem_context *ctx) @@ -602,6 +632,9 @@ __create_context(struct drm_i915_private *i915) ctx->sched.priority = I915_USER_PRIORITY(I915_PRIORITY_NORMAL); mutex_init(&ctx->mutex); + spin_lock_init(&ctx->stale.lock); + INIT_LIST_HEAD(&ctx->stale.engines); + mutex_init(&ctx->engines_mutex); e = default_engines(ctx); if (IS_ERR(e)) { @@ -1529,6 +1562,77 @@ static const i915_user_extension_fn set_engines__extensions[] = { [I915_CONTEXT_ENGINES_EXT_BOND] = set_engines__bond, }; +static int engines_notify(struct i915_sw_fence *fence, + enum i915_sw_fence_notify state) +{ + struct i915_gem_engines *engines = + container_of(fence, typeof(*engines), fence); + + switch (state) { + case FENCE_COMPLETE: + if (!list_empty(&engines->link)) { + struct i915_gem_context *ctx = engines->ctx; + unsigned long flags; + + spin_lock_irqsave(&ctx->stale.lock, flags); + list_del(&engines->link); + spin_unlock_irqrestore(&ctx->stale.lock, flags); + } + break; + + case FENCE_FREE: + init_rcu_head(&engines->rcu); + call_rcu(&engines->rcu, free_engines_rcu); + break; + } + + return NOTIFY_DONE; +} + +static void engines_idle_release(struct i915_gem_engines *engines) +{ + struct i915_gem_engines_iter it; + struct intel_context *ce; + unsigned long flags; + + GEM_BUG_ON(!engines); + i915_sw_fence_init(&engines->fence, engines_notify); + + INIT_LIST_HEAD(&engines->link); + spin_lock_irqsave(&engines->ctx->stale.lock, flags); + if (!i915_gem_context_is_closed(engines->ctx)) + list_add(&engines->link, &engines->ctx->stale.engines); + spin_unlock_irqrestore(&engines->ctx->stale.lock, flags); + if (list_empty(&engines->link)) /* raced, already closed */ + goto kill; + + for_each_gem_engine(ce, engines, it) { + struct dma_fence *fence; + int err; + + if (!ce->timeline) + continue; + + fence = i915_active_fence_get(&ce->timeline->last_request); + if (!fence) + continue; + + err = i915_sw_fence_await_dma_fence(&engines->fence, + fence, 0, + GFP_KERNEL); + + dma_fence_put(fence); + if (err < 0) + goto kill; + } + goto out; + +kill: + kill_engines(engines); +out: + i915_sw_fence_commit(&engines->fence); +} + static int set_engines(struct i915_gem_context *ctx, const struct drm_i915_gem_context_param *args) @@ -1571,7 +1675,8 @@ set_engines(struct i915_gem_context *ctx, if (!set.engines) return -ENOMEM; - init_rcu_head(&set.engines->rcu); + set.engines->ctx = ctx; + for (n = 0; n < num_engines; n++) { struct i915_engine_class_instance ci; struct intel_engine_cs *engine; @@ -1631,7 +1736,8 @@ set_engines(struct i915_gem_context *ctx, set.engines = rcu_replace_pointer(ctx->engines, set.engines, 1); mutex_unlock(&ctx->engines_mutex); - call_rcu(&set.engines->rcu, free_engines_rcu); + /* Keep track of old engine sets for kill_context() */ + engines_idle_release(set.engines); return 0; } @@ -1646,7 +1752,6 @@ __copy_engines(struct i915_gem_engines *e) if (!copy) return ERR_PTR(-ENOMEM); - init_rcu_head(©->rcu); for (n = 0; n < e->num_engines; n++) { if (e->engines[n]) copy->engines[n] = intel_context_get(e->engines[n]); @@ -1890,7 +1995,8 @@ static int clone_engines(struct i915_gem_context *dst, if (!clone) goto err_unlock; - init_rcu_head(&clone->rcu); + clone->ctx = dst; + for (n = 0; n < e->num_engines; n++) { struct intel_engine_cs *engine; diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h index 017ca803ab47..8d996dde8046 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h @@ -20,6 +20,7 @@ #include "gt/intel_context_types.h" #include "i915_scheduler.h" +#include "i915_sw_fence.h" struct pid; @@ -30,7 +31,12 @@ struct intel_timeline; struct intel_ring; struct i915_gem_engines { - struct rcu_head rcu; + union { + struct rcu_head rcu; + struct list_head link; + }; + struct i915_sw_fence fence; + struct i915_gem_context *ctx; unsigned int num_engines; struct intel_context *engines[]; }; @@ -173,6 +179,11 @@ struct i915_gem_context { * context in messages. */ char name[TASK_COMM_LEN + 8]; + + struct { + struct spinlock lock; + struct list_head engines; + } stale; }; #endif /* __I915_GEM_CONTEXT_TYPES_H__ */ diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c b/drivers/gpu/drm/i915/i915_sw_fence.c index 51ba97daf2a0..a3d38e089b6e 100644 --- a/drivers/gpu/drm/i915/i915_sw_fence.c +++ b/drivers/gpu/drm/i915/i915_sw_fence.c @@ -211,10 +211,21 @@ void i915_sw_fence_complete(struct i915_sw_fence *fence) __i915_sw_fence_complete(fence, NULL); } -void i915_sw_fence_await(struct i915_sw_fence *fence) +bool i915_sw_fence_await(struct i915_sw_fence *fence) { - debug_fence_assert(fence); - WARN_ON(atomic_inc_return(&fence->pending) <= 1); + int pending; + + /* + * It is only safe to add a new await to the fence while it has + * not yet been signaled (i.e. there are still existing signalers). + */ + pending = atomic_read(&fence->pending); + do { + if (pending < 1) + return false; + } while (!atomic_try_cmpxchg(&fence->pending, &pending, pending + 1)); + + return true; } void __i915_sw_fence_init(struct i915_sw_fence *fence, diff --git a/drivers/gpu/drm/i915/i915_sw_fence.h b/drivers/gpu/drm/i915/i915_sw_fence.h index 19e806ce43bc..30a863353ee6 100644 --- a/drivers/gpu/drm/i915/i915_sw_fence.h +++ b/drivers/gpu/drm/i915/i915_sw_fence.h @@ -91,7 +91,7 @@ int i915_sw_fence_await_reservation(struct i915_sw_fence *fence, unsigned long timeout, gfp_t gfp); -void i915_sw_fence_await(struct i915_sw_fence *fence); +bool i915_sw_fence_await(struct i915_sw_fence *fence); void i915_sw_fence_complete(struct i915_sw_fence *fence); static inline bool i915_sw_fence_signaled(const struct i915_sw_fence *fence) -- 2.25.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [Intel-gfx] [PATCH v3] drm/i915/gem: Don't leak non-persistent requests on changing engines 2020-02-11 14:48 [Intel-gfx] [PATCH v3] drm/i915/gem: Don't leak non-persistent requests on changing engines Chris Wilson @ 2020-02-11 19:40 ` Tvrtko Ursulin 2020-02-13 18:07 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5) Patchwork 1 sibling, 0 replies; 3+ messages in thread From: Tvrtko Ursulin @ 2020-02-11 19:40 UTC (permalink / raw) To: Chris Wilson, intel-gfx On 11/02/2020 14:48, Chris Wilson wrote: > If we have a set of active engines marked as being non-persistent, we > lose track of those if the user replaces those engines with > I915_CONTEXT_PARAM_ENGINES. As part of our uABI contract is that > non-persistent requests are terminated if they are no longer being > tracked by the user's context (in order to prevent a lost request > causing an untracked and so unstoppable GPU hang), we need to apply the > same context cancellation upon changing engines. > > v2: Track stale engines[] so we only reap at context closure. > v3: Tvrtko spotted races with closing contexts and set-engines, so add a > veneer of kill-everything paranoia to clean up after losing a race. > > Fixes: a0e047156cde ("drm/i915/gem: Make context persistence optional") > Testcase: igt/gem_ctx_peristence/replace > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 122 ++++++++++++++++-- > .../gpu/drm/i915/gem/i915_gem_context_types.h | 13 +- > drivers/gpu/drm/i915/i915_sw_fence.c | 17 ++- > drivers/gpu/drm/i915/i915_sw_fence.h | 2 +- > 4 files changed, 141 insertions(+), 13 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index cfaf5bbdbcab..3e82739bdbc0 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -270,7 +270,8 @@ static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx) > if (!e) > return ERR_PTR(-ENOMEM); > > - init_rcu_head(&e->rcu); > + e->ctx = ctx; > + > for_each_engine(engine, gt, id) { > struct intel_context *ce; > > @@ -450,7 +451,7 @@ static struct intel_engine_cs *active_engine(struct intel_context *ce) > return engine; > } > > -static void kill_context(struct i915_gem_context *ctx) > +static void kill_engines(struct i915_gem_engines *engines) > { > struct i915_gem_engines_iter it; > struct intel_context *ce; > @@ -462,7 +463,7 @@ static void kill_context(struct i915_gem_context *ctx) > * However, we only care about pending requests, so only include > * engines on which there are incomplete requests. > */ > - for_each_gem_engine(ce, __context_engines_static(ctx), it) { > + for_each_gem_engine(ce, engines, it) { > struct intel_engine_cs *engine; > > if (intel_context_set_banned(ce)) > @@ -484,8 +485,37 @@ static void kill_context(struct i915_gem_context *ctx) > * the context from the GPU, we have to resort to a full > * reset. We hope the collateral damage is worth it. > */ > - __reset_context(ctx, engine); > + __reset_context(engines->ctx, engine); > + } > +} > + > +static void kill_stale_engines(struct i915_gem_context *ctx) > +{ > + struct i915_gem_engines *pos, *next; > + unsigned long flags; > + > + spin_lock_irqsave(&ctx->stale.lock, flags); > + list_for_each_entry_safe(pos, next, &ctx->stale.engines, link) { > + if (!i915_sw_fence_await(&pos->fence)) > + continue; > + > + spin_unlock_irqrestore(&ctx->stale.lock, flags); > + > + kill_engines(pos); > + > + spin_lock_irqsave(&ctx->stale.lock, flags); > + list_safe_reset_next(pos, next, link); > + list_del_init(&pos->link); /* decouple from FENCE_COMPLETE */ > + > + i915_sw_fence_complete(&pos->fence); > } > + spin_unlock_irqrestore(&ctx->stale.lock, flags); > +} > + > +static void kill_context(struct i915_gem_context *ctx) > +{ > + kill_stale_engines(ctx); > + kill_engines(__context_engines_static(ctx)); > } > > static void set_closed_name(struct i915_gem_context *ctx) > @@ -602,6 +632,9 @@ __create_context(struct drm_i915_private *i915) > ctx->sched.priority = I915_USER_PRIORITY(I915_PRIORITY_NORMAL); > mutex_init(&ctx->mutex); > > + spin_lock_init(&ctx->stale.lock); > + INIT_LIST_HEAD(&ctx->stale.engines); > + > mutex_init(&ctx->engines_mutex); > e = default_engines(ctx); > if (IS_ERR(e)) { > @@ -1529,6 +1562,77 @@ static const i915_user_extension_fn set_engines__extensions[] = { > [I915_CONTEXT_ENGINES_EXT_BOND] = set_engines__bond, > }; > > +static int engines_notify(struct i915_sw_fence *fence, > + enum i915_sw_fence_notify state) > +{ > + struct i915_gem_engines *engines = > + container_of(fence, typeof(*engines), fence); > + > + switch (state) { > + case FENCE_COMPLETE: > + if (!list_empty(&engines->link)) { > + struct i915_gem_context *ctx = engines->ctx; > + unsigned long flags; > + > + spin_lock_irqsave(&ctx->stale.lock, flags); > + list_del(&engines->link); > + spin_unlock_irqrestore(&ctx->stale.lock, flags); > + } > + break; > + > + case FENCE_FREE: > + init_rcu_head(&engines->rcu); > + call_rcu(&engines->rcu, free_engines_rcu); > + break; > + } > + > + return NOTIFY_DONE; > +} > + > +static void engines_idle_release(struct i915_gem_engines *engines) > +{ > + struct i915_gem_engines_iter it; > + struct intel_context *ce; > + unsigned long flags; > + > + GEM_BUG_ON(!engines); > + i915_sw_fence_init(&engines->fence, engines_notify); > + > + INIT_LIST_HEAD(&engines->link); > + spin_lock_irqsave(&engines->ctx->stale.lock, flags); > + if (!i915_gem_context_is_closed(engines->ctx)) > + list_add(&engines->link, &engines->ctx->stale.engines); > + spin_unlock_irqrestore(&engines->ctx->stale.lock, flags); > + if (list_empty(&engines->link)) /* raced, already closed */ > + goto kill; > + > + for_each_gem_engine(ce, engines, it) { > + struct dma_fence *fence; > + int err; > + > + if (!ce->timeline) > + continue; > + > + fence = i915_active_fence_get(&ce->timeline->last_request); > + if (!fence) > + continue; > + > + err = i915_sw_fence_await_dma_fence(&engines->fence, > + fence, 0, > + GFP_KERNEL); > + > + dma_fence_put(fence); > + if (err < 0) > + goto kill; > + } > + goto out; > + > +kill: > + kill_engines(engines); > +out: > + i915_sw_fence_commit(&engines->fence); > +} > + > static int > set_engines(struct i915_gem_context *ctx, > const struct drm_i915_gem_context_param *args) > @@ -1571,7 +1675,8 @@ set_engines(struct i915_gem_context *ctx, > if (!set.engines) > return -ENOMEM; > > - init_rcu_head(&set.engines->rcu); > + set.engines->ctx = ctx; > + > for (n = 0; n < num_engines; n++) { > struct i915_engine_class_instance ci; > struct intel_engine_cs *engine; > @@ -1631,7 +1736,8 @@ set_engines(struct i915_gem_context *ctx, > set.engines = rcu_replace_pointer(ctx->engines, set.engines, 1); > mutex_unlock(&ctx->engines_mutex); > > - call_rcu(&set.engines->rcu, free_engines_rcu); > + /* Keep track of old engine sets for kill_context() */ > + engines_idle_release(set.engines); > > return 0; > } > @@ -1646,7 +1752,6 @@ __copy_engines(struct i915_gem_engines *e) > if (!copy) > return ERR_PTR(-ENOMEM); > > - init_rcu_head(©->rcu); > for (n = 0; n < e->num_engines; n++) { > if (e->engines[n]) > copy->engines[n] = intel_context_get(e->engines[n]); > @@ -1890,7 +1995,8 @@ static int clone_engines(struct i915_gem_context *dst, > if (!clone) > goto err_unlock; > > - init_rcu_head(&clone->rcu); > + clone->ctx = dst; > + > for (n = 0; n < e->num_engines; n++) { > struct intel_engine_cs *engine; > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h > index 017ca803ab47..8d996dde8046 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h > @@ -20,6 +20,7 @@ > #include "gt/intel_context_types.h" > > #include "i915_scheduler.h" > +#include "i915_sw_fence.h" > > struct pid; > > @@ -30,7 +31,12 @@ struct intel_timeline; > struct intel_ring; > > struct i915_gem_engines { > - struct rcu_head rcu; > + union { > + struct rcu_head rcu; > + struct list_head link; > + }; > + struct i915_sw_fence fence; > + struct i915_gem_context *ctx; > unsigned int num_engines; > struct intel_context *engines[]; > }; > @@ -173,6 +179,11 @@ struct i915_gem_context { > * context in messages. > */ > char name[TASK_COMM_LEN + 8]; > + > + struct { > + struct spinlock lock; > + struct list_head engines; > + } stale; > }; > > #endif /* __I915_GEM_CONTEXT_TYPES_H__ */ > diff --git a/drivers/gpu/drm/i915/i915_sw_fence.c b/drivers/gpu/drm/i915/i915_sw_fence.c > index 51ba97daf2a0..a3d38e089b6e 100644 > --- a/drivers/gpu/drm/i915/i915_sw_fence.c > +++ b/drivers/gpu/drm/i915/i915_sw_fence.c > @@ -211,10 +211,21 @@ void i915_sw_fence_complete(struct i915_sw_fence *fence) > __i915_sw_fence_complete(fence, NULL); > } > > -void i915_sw_fence_await(struct i915_sw_fence *fence) > +bool i915_sw_fence_await(struct i915_sw_fence *fence) > { > - debug_fence_assert(fence); > - WARN_ON(atomic_inc_return(&fence->pending) <= 1); > + int pending; > + > + /* > + * It is only safe to add a new await to the fence while it has > + * not yet been signaled (i.e. there are still existing signalers). > + */ > + pending = atomic_read(&fence->pending); > + do { > + if (pending < 1) > + return false; > + } while (!atomic_try_cmpxchg(&fence->pending, &pending, pending + 1)); > + > + return true; > } > > void __i915_sw_fence_init(struct i915_sw_fence *fence, > diff --git a/drivers/gpu/drm/i915/i915_sw_fence.h b/drivers/gpu/drm/i915/i915_sw_fence.h > index 19e806ce43bc..30a863353ee6 100644 > --- a/drivers/gpu/drm/i915/i915_sw_fence.h > +++ b/drivers/gpu/drm/i915/i915_sw_fence.h > @@ -91,7 +91,7 @@ int i915_sw_fence_await_reservation(struct i915_sw_fence *fence, > unsigned long timeout, > gfp_t gfp); > > -void i915_sw_fence_await(struct i915_sw_fence *fence); > +bool i915_sw_fence_await(struct i915_sw_fence *fence); > void i915_sw_fence_complete(struct i915_sw_fence *fence); > > static inline bool i915_sw_fence_signaled(const struct i915_sw_fence *fence) > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5) 2020-02-11 14:48 [Intel-gfx] [PATCH v3] drm/i915/gem: Don't leak non-persistent requests on changing engines Chris Wilson 2020-02-11 19:40 ` Tvrtko Ursulin @ 2020-02-13 18:07 ` Patchwork 1 sibling, 0 replies; 3+ messages in thread From: Patchwork @ 2020-02-13 18:07 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5) URL : https://patchwork.freedesktop.org/series/73023/ State : success == Summary == CI Bug Log - changes from CI_DRM_7916_full -> Patchwork_16522_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_16522_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_eio@kms: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([i915#198]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl8/igt@gem_eio@kms.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl3/igt@gem_eio@kms.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#112146]) +6 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html * igt@gem_exec_suspend@basic-s3: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#69]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl7/igt@gem_exec_suspend@basic-s3.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl2/igt@gem_exec_suspend@basic-s3.html * igt@gem_workarounds@suspend-resume-context: - shard-kbl: [PASS][7] -> [FAIL][8] ([fdo#103375]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-kbl7/igt@gem_workarounds@suspend-resume-context.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-kbl7/igt@gem_workarounds@suspend-resume-context.html * igt@i915_pm_dc@dc6-psr: - shard-iclb: [PASS][9] -> [FAIL][10] ([i915#454]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb7/igt@i915_pm_dc@dc6-psr.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb4/igt@i915_pm_dc@dc6-psr.html * igt@i915_selftest@live_gtt: - shard-kbl: [PASS][11] -> [TIMEOUT][12] ([fdo#112271]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-kbl7/igt@i915_selftest@live_gtt.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-kbl4/igt@i915_selftest@live_gtt.html * igt@kms_color@pipe-c-ctm-max: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#168]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl2/igt@kms_color@pipe-c-ctm-max.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl5/igt@kms_color@pipe-c-ctm-max.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#72]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +5 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +4 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][21] -> [FAIL][22] ([i915#173]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb7/igt@kms_psr@no_drrs.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb3/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_setmode@basic: - shard-hsw: [PASS][25] -> [FAIL][26] ([i915#31]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-hsw7/igt@kms_setmode@basic.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-hsw8/igt@kms_setmode@basic.html * igt@perf_pmu@busy-vcs1: - shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#112080]) +11 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb1/igt@perf_pmu@busy-vcs1.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb6/igt@perf_pmu@busy-vcs1.html * igt@prime_busy@hang-bsd2: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109276]) +26 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb4/igt@prime_busy@hang-bsd2.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb6/igt@prime_busy@hang-bsd2.html #### Possible fixes #### * igt@gem_busy@busy-vcs1: - shard-iclb: [SKIP][31] ([fdo#112080]) -> [PASS][32] +14 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb7/igt@gem_busy@busy-vcs1.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb4/igt@gem_busy@busy-vcs1.html * {igt@gem_ctx_persistence@engines-mixed-process@vecs0}: - shard-iclb: [FAIL][33] ([i915#679]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb3/igt@gem_ctx_persistence@engines-mixed-process@vecs0.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb5/igt@gem_ctx_persistence@engines-mixed-process@vecs0.html * {igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd}: - shard-skl: [FAIL][35] ([i915#679]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl10/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl3/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd.html * {igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1}: - shard-skl: [INCOMPLETE][37] -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl10/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl3/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1.html - shard-tglb: [FAIL][39] ([i915#679]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-tglb8/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1.html * {igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd2}: - shard-tglb: [INCOMPLETE][41] -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-tglb8/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd2.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd2.html * {igt@gem_ctx_persistence@replace-hostile@bcs0}: - shard-skl: [FAIL][43] ([i915#1154]) -> [PASS][44] +7 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl8/igt@gem_ctx_persistence@replace-hostile@bcs0.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl7/igt@gem_ctx_persistence@replace-hostile@bcs0.html * {igt@gem_ctx_persistence@replace-hostile@vcs0}: - shard-kbl: [FAIL][45] ([i915#1154]) -> [PASS][46] +9 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-kbl2/igt@gem_ctx_persistence@replace-hostile@vcs0.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-kbl6/igt@gem_ctx_persistence@replace-hostile@vcs0.html * {igt@gem_ctx_persistence@replace@vcs0}: - shard-apl: [FAIL][47] ([i915#1154]) -> [PASS][48] +7 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-apl4/igt@gem_ctx_persistence@replace@vcs0.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-apl4/igt@gem_ctx_persistence@replace@vcs0.html - shard-iclb: [FAIL][49] ([i915#1154]) -> [PASS][50] +7 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb8/igt@gem_ctx_persistence@replace@vcs0.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb4/igt@gem_ctx_persistence@replace@vcs0.html - shard-glk: [FAIL][51] ([i915#1154]) -> [PASS][52] +7 similar issues [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-glk9/igt@gem_ctx_persistence@replace@vcs0.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-glk5/igt@gem_ctx_persistence@replace@vcs0.html * {igt@gem_ctx_persistence@replace@vecs0}: - shard-tglb: [FAIL][53] ([i915#1154]) -> [PASS][54] +9 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-tglb7/igt@gem_ctx_persistence@replace@vecs0.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-tglb6/igt@gem_ctx_persistence@replace@vecs0.html * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [SKIP][55] ([fdo#110841]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_async@concurrent-writes-bsd: - shard-iclb: [SKIP][57] ([fdo#112146]) -> [PASS][58] +4 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb4/igt@gem_exec_async@concurrent-writes-bsd.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb7/igt@gem_exec_async@concurrent-writes-bsd.html * igt@gem_exec_balancer@smoke: - shard-iclb: [SKIP][59] ([fdo#110854]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb5/igt@gem_exec_balancer@smoke.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb2/igt@gem_exec_balancer@smoke.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [SKIP][61] ([i915#677]) -> [PASS][62] +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb2/igt@gem_exec_schedule@pi-distinct-iova-bsd.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb3/igt@gem_exec_schedule@pi-distinct-iova-bsd.html * igt@gem_partial_pwrite_pread@write-uncached: - shard-hsw: [FAIL][63] ([i915#694]) -> [PASS][64] +1 similar issue [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-hsw8/igt@gem_partial_pwrite_pread@write-uncached.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-hsw7/igt@gem_partial_pwrite_pread@write-uncached.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-apl: [FAIL][65] ([i915#644]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-apl4/igt@gem_ppgtt@flink-and-close-vma-leak.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html * igt@gem_softpin@noreloc-s3: - shard-kbl: [DMESG-WARN][67] ([i915#180]) -> [PASS][68] +1 similar issue [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-kbl4/igt@gem_softpin@noreloc-s3.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-kbl1/igt@gem_softpin@noreloc-s3.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [FAIL][69] ([i915#454]) -> [PASS][70] [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb5/igt@i915_pm_dc@dc6-dpms.html * igt@i915_pm_rps@waitboost: - shard-iclb: [FAIL][71] ([i915#413]) -> [PASS][72] [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb1/igt@i915_pm_rps@waitboost.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb5/igt@i915_pm_rps@waitboost.html * igt@kms_busy@basic-modeset-pipe-b: - shard-snb: [SKIP][73] ([fdo#109271]) -> [PASS][74] +6 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-snb6/igt@kms_busy@basic-modeset-pipe-b.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-snb5/igt@kms_busy@basic-modeset-pipe-b.html * igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding: - shard-skl: [FAIL][75] ([i915#54]) -> [PASS][76] [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding.html * igt@kms_flip@2x-flip-vs-expired-vblank: - shard-glk: [FAIL][77] ([i915#79]) -> [PASS][78] [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [FAIL][79] ([i915#79]) -> [PASS][80] [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@plain-flip-fb-recreate-interruptible: - shard-skl: [FAIL][81] ([i915#34]) -> [PASS][82] [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl3/igt@kms_flip@plain-flip-fb-recreate-interruptible.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible.html * {igt@kms_hdr@bpc-switch}: - shard-skl: [FAIL][83] ([i915#1188]) -> [PASS][84] [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl1/igt@kms_hdr@bpc-switch.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl7/igt@kms_hdr@bpc-switch.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][85] ([fdo#108145]) -> [PASS][86] [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [FAIL][87] ([fdo#108145] / [i915#265]) -> [PASS][88] [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@prime_mmap_coherency@ioctl-errors: - shard-hsw: [FAIL][89] ([i915#831]) -> [PASS][90] [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-hsw6/igt@prime_mmap_coherency@ioctl-errors.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-hsw6/igt@prime_mmap_coherency@ioctl-errors.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [SKIP][91] ([fdo#109276]) -> [PASS][92] +26 similar issues [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html #### Warnings #### * igt@gem_ctx_isolation@vcs1-nonpriv: - shard-iclb: [SKIP][93] ([fdo#112080]) -> [FAIL][94] ([IGT#28]) [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html * igt@gem_ctx_isolation@vcs1-nonpriv-switch: - shard-iclb: [FAIL][95] ([IGT#28]) -> [SKIP][96] ([fdo#112080]) [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-iclb3/igt@gem_ctx_isolation@vcs1-nonpriv-switch.html * igt@gem_tiled_blits@interruptible: - shard-hsw: [FAIL][97] ([i915#694]) -> [FAIL][98] ([i915#818]) [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-hsw6/igt@gem_tiled_blits@interruptible.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-hsw2/igt@gem_tiled_blits@interruptible.html * igt@gem_tiled_blits@normal: - shard-hsw: [FAIL][99] ([i915#818]) -> [FAIL][100] ([i915#694]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7916/shard-hsw7/igt@gem_tiled_blits@normal.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/shard-hsw2/igt@gem_tiled_blits@normal.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28 [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854 [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080 [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146 [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271 [i915#1154]: https://gitlab.freedesktop.org/drm/intel/issues/1154 [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188 [i915#168]: https://gitlab.freedesktop.org/drm/intel/issues/168 [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173 [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180 [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198 [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265 [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31 [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34 [i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413 [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454 [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54 [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644 [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677 [i915#679]: https://gitlab.freedesktop.org/drm/intel/issues/679 [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69 [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694 [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 [i915#818]: https://gitlab.freedesktop.org/drm/intel/issues/818 [i915#831]: https://gitlab.freedesktop.org/drm/intel/issues/831 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7916 -> Patchwork_16522 CI-20190529: 20190529 CI_DRM_7916: 6006a0cd15fdd07655be7c06729dd60b5135e42f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5435: 2b6d4476dde53c363b8808ed9f0dd5547ac78641 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16522: 77877209af363700507bb38fb8e01660928c2507 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16522/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2020-02-13 18:07 UTC | newest] Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-02-11 14:48 [Intel-gfx] [PATCH v3] drm/i915/gem: Don't leak non-persistent requests on changing engines Chris Wilson 2020-02-11 19:40 ` Tvrtko Ursulin 2020-02-13 18:07 ` [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Don't leak non-persistent requests on changing engines (rev5) Patchwork
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