Series: | drm/i915/edp: enable MSO... maybe |
URL: | https://patchwork.freedesktop.org/series/86264/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19490/index.html |
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19490/index.html
Here are the unknown changes that may have been introduced in Patchwork_19490:
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
Here are the changes found in Patchwork_19490 that come from known issues:
igt@gem_exec_suspend@basic-s0:
igt@prime_self_import@basic-with_one_bo_two_files:
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Additional (1): fi-rkl-11500t
Missing (4): fi-ctg-p8600 fi-jsl-1 fi-ilk-m540 fi-hsw-4200u
CI-20190529: 20190529
CI_DRM_9680: 9e03236ed9687144929d42404341384cc1e501b7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5971: abef2b7d6ff30f3b948b3e5d39653debb73083f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19490: bd3f4b5b85f2a3abb47628cb20fc3f78a175a744 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bd3f4b5b85f2 drm/i915/edp: enable eDP MSO during link training
71e3f6cc9bb0 drm/i915/edp: modify fixed and downclock modes for MSO
9dc3d6e92e32 drm/i915/mso: add state check
9d1a79172ddc drm/i915/mso: add state readout for platforms that support it
c029913bde03 drm/i915/reg: add stream splitter configuration definitions
c4c351191d45 drm/i915/edp: read sink MSO configuration for eDP 1.4+
bfa476b06b47 drm/i915/edp: always add fixed mode to probed modes in ->get_modes()
73683b3c4888 drm/i915/edp: reject modes with dimensions other than fixed mode
6414c2a8c228 drm/dp: add MSO related DPCD registers