* [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes
@ 2021-08-11 21:23 Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() Juston Li
` (4 more replies)
0 siblings, 5 replies; 9+ messages in thread
From: Juston Li @ 2021-08-11 21:23 UTC (permalink / raw)
To: intel-gfx; +Cc: seanpaul, anshuman.gupta, ramalingam.c, rodrigo.vivi, Juston Li
Fixes to get HDCP2.2 over MST working on MST docking stations with
certain behaviors that cause the current flow to fail.
Tested with Dell WD-19 and Lenovo ThinkPad USB Type-C Dock Gen 2.
These fixes should make the flow more robust to handle behaviors that as
far as I can tell are unclear in the HDCP spec:
RxInfo contains repeater topology information needed for MST. The
behavior on these docks is that this can only be read during
RepeaterAuth_Send_ReceiverID_List when the RxStatus READY bit is set
otherwise the dock will return NACK. It seems these docks treat
reading this range at any other time as invalid when the READY bit
isn't set possibly because it could be stale. The HDCP spec also states
the READY bit is cleared after RxInfo is read.
These fixes address this behavior by only reading RxInfo once during the
AKE flow and reusing that data.
Changes since v3:
- Don't change the offset define for Send_ReceiverID_List
When reading, update message offset to account for RxInfo being read
Changes since v2:
- Remove no longer used variables in _intel_hdcp2_enable()
Changes since v1:
- Fix subject line for 3/3
Juston Li (3):
drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
drm/i915/hdcp: read RxInfo once when reading
RepeaterAuth_Send_ReceiverID_List
drm/i915/hdcp: reuse rx_info for mst stream type1 capability check
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 78 +++++--------------
drivers/gpu/drm/i915/display/intel_hdcp.c | 49 +++++-------
3 files changed, 43 insertions(+), 86 deletions(-)
--
2.31.1
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH v4 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
2021-08-11 21:23 [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes Juston Li
@ 2021-08-11 21:23 ` Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List Juston Li
` (3 subsequent siblings)
4 siblings, 0 replies; 9+ messages in thread
From: Juston Li @ 2021-08-11 21:23 UTC (permalink / raw)
To: intel-gfx; +Cc: seanpaul, anshuman.gupta, ramalingam.c, rodrigo.vivi, Juston Li
Update cp_irq_count_cached when reading messages rather than when
writing a message to make sure the value is up to date and not
stale from a previously handled CP_IRQ.
AKE flow doesn't always respond to a read with a ACK write msg.
E.g. AKE_Send_Pairing_Info will "timeout" because we received
a CP_IRQ for reading AKE_Send_H_Prime but no write occurred between that
and reading AKE_Send_Pairing_Info so cp_irq_count_cached is stale
causing the wait to return right away rather than waiting for a new
CP_IRQ.
Signed-off-by: Juston Li <juston.li@intel.com>
Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index d697d169e8c1..1d0096654776 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -446,8 +446,6 @@ static
int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
void *buf, size_t size)
{
- struct intel_dp *dp = &dig_port->dp;
- struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
unsigned int offset;
u8 *byte = buf;
ssize_t ret, bytes_to_write, len;
@@ -463,8 +461,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
bytes_to_write = size - 1;
byte++;
- hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
-
while (bytes_to_write) {
len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
@@ -530,6 +526,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
u8 msg_id, void *buf, size_t size)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_dp *dp = &dig_port->dp;
+ struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
unsigned int offset;
u8 *byte = buf;
ssize_t ret, bytes_to_recv, len;
@@ -546,6 +544,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
if (ret < 0)
return ret;
+ hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
+
if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
ret = get_receiver_id_list_size(dig_port);
if (ret < 0)
--
2.31.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List
2021-08-11 21:23 [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() Juston Li
@ 2021-08-11 21:23 ` Juston Li
2021-08-12 7:43 ` Anshuman Gupta
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check Juston Li
` (2 subsequent siblings)
4 siblings, 1 reply; 9+ messages in thread
From: Juston Li @ 2021-08-11 21:23 UTC (permalink / raw)
To: intel-gfx; +Cc: seanpaul, anshuman.gupta, ramalingam.c, rodrigo.vivi, Juston Li
When reading RepeaterAuth_Send_ReceiverID_List, RxInfo is read by itself
once to retrieve the DEVICE_COUNT to calculate the size of the
ReceiverID list then read a second time as a part of reading ReceiverID
list.
On some MST docking stations, RxInfo can only be read after the RxStatus
READY bit is set otherwise the read will return -EIO. The spec states that
the READY bit should be cleared as soon as RxInfo has been read.
In this case, the first RxInfo read succeeds but after the READY bit is
cleared, the second read fails.
Fix it by reading RxInfo once and storing it before reading the rest of
RepeaterAuth_Send_ReceiverID_List once we know the size.
Modify get_receiver_id_list_size() to read and store RxInfo in the
message buffer and also parse DEVICE_COUNT so we know the size of
RepeaterAuth_Send_ReceiverID_List.
Afterwards, retrieve the rest of the message at the offset for
seq_num_V.
Changes in v5:
- Don't change the offset define for Send_ReceiverID_List
When reading, update message offset to account for RxInfo being read
Changes in v4:
- rebase and edit commit message
Changes in v3:
- remove comment
Changes in v2:
- remove unnecessary moving of drm_i915_private from patch 1
Signed-off-by: Juston Li <juston.li@intel.com>
Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 31 ++++++++++----------
1 file changed, 16 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 1d0096654776..fbfb3c4d16bb 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -496,11 +496,10 @@ get_rxinfo_hdcp_1_dev_downstream(struct intel_digital_port *dig_port, bool *hdcp
}
static
-ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port)
+ssize_t get_receiver_id_list_rx_info(struct intel_digital_port *dig_port, u32 *dev_cnt, u8 *byte)
{
- u8 rx_info[HDCP_2_2_RXINFO_LEN];
- u32 dev_cnt;
ssize_t ret;
+ u8 *rx_info = byte;
ret = drm_dp_dpcd_read(&dig_port->dp.aux,
DP_HDCP_2_2_REG_RXINFO_OFFSET,
@@ -508,15 +507,11 @@ ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port)
if (ret != HDCP_2_2_RXINFO_LEN)
return ret >= 0 ? -EIO : ret;
- dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
+ *dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
- if (dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
- dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
-
- ret = sizeof(struct hdcp2_rep_send_receiverid_list) -
- HDCP_2_2_RECEIVER_IDS_MAX_LEN +
- (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN);
+ if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
+ *dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
return ret;
}
@@ -534,6 +529,7 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
const struct hdcp2_dp_msg_data *hdcp2_msg_data;
ktime_t msg_end = ktime_set(0, 0);
bool msg_expired;
+ u32 dev_cnt;
hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id);
if (!hdcp2_msg_data)
@@ -546,17 +542,22 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
+ /* DP adaptation msgs has no msg_id */
+ byte++;
+
if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
- ret = get_receiver_id_list_size(dig_port);
+ ret = get_receiver_id_list_rx_info(dig_port, &dev_cnt, byte);
if (ret < 0)
return ret;
- size = ret;
+ byte += ret;
+ size = sizeof(struct hdcp2_rep_send_receiverid_list) -
+ HDCP_2_2_RXINFO_LEN - HDCP_2_2_RECEIVER_IDS_MAX_LEN +
+ (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN);
+ offset += HDCP_2_2_RXINFO_LEN;
}
- bytes_to_recv = size - 1;
- /* DP adaptation msgs has no msg_id */
- byte++;
+ bytes_to_recv = size - 1;
while (bytes_to_recv) {
len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ?
--
2.31.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check
2021-08-11 21:23 [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List Juston Li
@ 2021-08-11 21:23 ` Juston Li
2021-08-12 7:10 ` Anshuman Gupta
2021-08-11 23:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5) Patchwork
2021-08-12 1:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 1 reply; 9+ messages in thread
From: Juston Li @ 2021-08-11 21:23 UTC (permalink / raw)
To: intel-gfx; +Cc: seanpaul, anshuman.gupta, ramalingam.c, rodrigo.vivi, Juston Li
On some MST docking stations, rx_info can only be read after
RepeaterAuth_Send_ReceiverID_List and the RxStatus READY bit is set
otherwise the read will return -EIO.
This behavior causes the mst stream type1 capability test to fail to
read rx_info and determine if the topology supports type1 and fallback
to type0.
To fix this, check for type1 capability when we receive rx_info within
the AKE flow when we read RepeaterAuth_Send_ReceiverID_List instead
of an explicit read just for type1 capability checking.
This does require moving where we set stream_types to after
hdcp2_authenticate_sink() when we get rx_info but this occurs before we
do hdcp2_propagate_stream_management_info.
Also, legacy HDCP 2.0/2.1 are not type 1 capable either so check for
that as well.
Changes since v2:
- Remove no longer used variables in _intel_hdcp2_enable()
Signed-off-by: Juston Li <juston.li@intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 +
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 39 ---------------
drivers/gpu/drm/i915/display/intel_hdcp.c | 49 ++++++++-----------
3 files changed, 23 insertions(+), 67 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index dbdfe54d0340..c8b687ff0374 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -516,6 +516,8 @@ struct intel_hdcp {
enum transcoder cpu_transcoder;
/* Only used for DP MST stream encryption */
enum transcoder stream_transcoder;
+
+ bool topology_type1_capable;
};
struct intel_connector {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index fbfb3c4d16bb..540a669e01dd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -478,23 +478,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
return size;
}
-static int
-get_rxinfo_hdcp_1_dev_downstream(struct intel_digital_port *dig_port, bool *hdcp_1_x)
-{
- u8 rx_info[HDCP_2_2_RXINFO_LEN];
- int ret;
-
- ret = drm_dp_dpcd_read(&dig_port->dp.aux,
- DP_HDCP_2_2_REG_RXINFO_OFFSET,
- (void *)rx_info, HDCP_2_2_RXINFO_LEN);
-
- if (ret != HDCP_2_2_RXINFO_LEN)
- return ret >= 0 ? -EIO : ret;
-
- *hdcp_1_x = HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) ? true : false;
- return 0;
-}
-
static
ssize_t get_receiver_id_list_rx_info(struct intel_digital_port *dig_port, u32 *dev_cnt, u8 *byte)
{
@@ -665,27 +648,6 @@ int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port,
return 0;
}
-static
-int intel_dp_mst_streams_type1_capable(struct intel_connector *connector,
- bool *capable)
-{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
- struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- int ret;
- bool hdcp_1_x;
-
- ret = get_rxinfo_hdcp_1_dev_downstream(dig_port, &hdcp_1_x);
- if (ret) {
- drm_dbg_kms(&i915->drm,
- "[%s:%d] failed to read RxInfo ret=%d\n",
- connector->base.name, connector->base.base.id, ret);
- return ret;
- }
-
- *capable = !hdcp_1_x;
- return 0;
-}
-
static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
.write_an_aksv = intel_dp_hdcp_write_an_aksv,
.read_bksv = intel_dp_hdcp_read_bksv,
@@ -834,7 +796,6 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
.stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption,
.check_2_2_link = intel_dp_mst_hdcp2_check_link,
.hdcp_2_2_capable = intel_dp_hdcp2_capable,
- .streams_type1_capable = intel_dp_mst_streams_type1_capable,
.protocol = HDCP_PROTOCOL_DP,
};
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ebc2e32aec0b..1a2a98e2c6e3 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -33,21 +33,6 @@ static int intel_conn_to_vcpi(struct intel_connector *connector)
return connector->port ? connector->port->vcpi.vcpi : 0;
}
-static bool
-intel_streams_type1_capable(struct intel_connector *connector)
-{
- const struct intel_hdcp_shim *shim = connector->hdcp.shim;
- bool capable = false;
-
- if (!shim)
- return capable;
-
- if (shim->streams_type1_capable)
- shim->streams_type1_capable(connector, &capable);
-
- return capable;
-}
-
/*
* intel_hdcp_required_content_stream selects the most highest common possible HDCP
* content_type for all streams in DP MST topology because security f/w doesn't
@@ -86,7 +71,7 @@ intel_hdcp_required_content_stream(struct intel_digital_port *dig_port)
if (conn_dig_port != dig_port)
continue;
- if (!enforce_type0 && !intel_streams_type1_capable(connector))
+ if (!enforce_type0 && !connector->hdcp.topology_type1_capable)
enforce_type0 = true;
data->streams[data->k].stream_id = intel_conn_to_vcpi(connector);
@@ -1632,6 +1617,14 @@ int hdcp2_authenticate_repeater_topology(struct intel_connector *connector)
return -EINVAL;
}
+ /*
+ * A topology is not Type 1 capable if it contains a downstream device
+ * that is HDCP 1.x or Legacy HDCP 2.0/2.1 compliant.
+ */
+ hdcp->topology_type1_capable =
+ !HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) &&
+ !HDCP_2_2_HDCP_2_0_REP_CONNECTED(rx_info[1]);
+
/* Converting and Storing the seq_num_v to local variable as DWORD */
seq_num_v =
drm_hdcp_be24_to_cpu((const u8 *)msgs.recvid_list.seq_num_v);
@@ -1871,11 +1864,23 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
{
struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
+ struct hdcp_port_data *data = &dig_port->hdcp_port_data;
+ struct intel_hdcp *hdcp = &connector->hdcp;
int ret = 0, i, tries = 3;
for (i = 0; i < tries && !dig_port->hdcp_auth_status; i++) {
ret = hdcp2_authenticate_sink(connector);
if (!ret) {
+ /* Stream which requires encryption */
+ if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
+ data->k = 1;
+ data->streams[0].stream_type = hdcp->content_type;
+ } else {
+ ret = intel_hdcp_required_content_stream(dig_port);
+ if (ret)
+ return ret;
+ }
+
ret = hdcp2_propagate_stream_management_info(connector);
if (ret) {
drm_dbg_kms(&i915->drm,
@@ -1921,9 +1926,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
static int _intel_hdcp2_enable(struct intel_connector *connector)
{
- struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
- struct hdcp_port_data *data = &dig_port->hdcp_port_data;
struct intel_hdcp *hdcp = &connector->hdcp;
int ret;
@@ -1931,16 +1934,6 @@ static int _intel_hdcp2_enable(struct intel_connector *connector)
connector->base.name, connector->base.base.id,
hdcp->content_type);
- /* Stream which requires encryption */
- if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
- data->k = 1;
- data->streams[0].stream_type = hdcp->content_type;
- } else {
- ret = intel_hdcp_required_content_stream(dig_port);
- if (ret)
- return ret;
- }
-
ret = hdcp2_authenticate_and_encrypt(connector);
if (ret) {
drm_dbg_kms(&i915->drm, "HDCP2 Type%d Enabling Failed. (%d)\n",
--
2.31.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5)
2021-08-11 21:23 [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes Juston Li
` (2 preceding siblings ...)
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check Juston Li
@ 2021-08-11 23:26 ` Patchwork
2021-08-12 1:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2021-08-11 23:26 UTC (permalink / raw)
To: Juston Li; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3035 bytes --]
== Series Details ==
Series: drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5)
URL : https://patchwork.freedesktop.org/series/93570/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10470 -> Patchwork_20799
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/index.html
Known issues
------------
Here are the changes found in Patchwork_20799 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4: [PASS][1] -> [FAIL][2] ([i915#1888])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [PASS][3] -> [INCOMPLETE][4] ([i915#2940])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/fi-bsw-kefka/igt@i915_selftest@live@execlists.html
* igt@i915_selftest@live@gt_lrc:
- fi-rkl-guc: [PASS][5] -> [DMESG-WARN][6] ([i915#3958])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> [FAIL][7] ([fdo#109271] / [i915#1436])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/fi-bsw-kefka/igt@runner@aborted.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
[i915#3958]: https://gitlab.freedesktop.org/drm/intel/issues/3958
Participating hosts (40 -> 35)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan bat-jsl-1 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_10470 -> Patchwork_20799
CI-20190529: 20190529
CI_DRM_10470: 8ef1164291b6c56baccf77f4be6e99a86821c684 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6170: d4ff2b4ab88d62a1888cb0316e70a1729fe4a685 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20799: 45d13b2bb17d4d11983ffac7d34f3d3673f25516 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
45d13b2bb17d drm/i915/hdcp: reuse rx_info for mst stream type1 capability check
bd453d677d29 drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List
6fe4807b3fca drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/index.html
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^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5)
2021-08-11 21:23 [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes Juston Li
` (3 preceding siblings ...)
2021-08-11 23:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5) Patchwork
@ 2021-08-12 1:27 ` Patchwork
4 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2021-08-12 1:27 UTC (permalink / raw)
To: Juston Li; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30267 bytes --]
== Series Details ==
Series: drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5)
URL : https://patchwork.freedesktop.org/series/93570/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_10470_full -> Patchwork_20799_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_20799_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@legacy-engines-hang@render:
- shard-tglb: [PASS][1] -> [FAIL][2] ([i915#2410])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-tglb7/igt@gem_ctx_persistence@legacy-engines-hang@render.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-tglb6/igt@gem_ctx_persistence@legacy-engines-hang@render.html
* igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099]) +5 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-snb5/igt@gem_ctx_persistence@legacy-engines-hostile-preempt.html
* igt@gem_eio@in-flight-suspend:
- shard-kbl: [PASS][4] -> [DMESG-WARN][5] ([i915#180]) +3 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-kbl6/igt@gem_eio@in-flight-suspend.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl7/igt@gem_eio@in-flight-suspend.html
* igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][6] -> [TIMEOUT][7] ([i915#2369] / [i915#2481] / [i915#3070])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb6/igt@gem_eio@unwedge-stress.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb6/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-glk: [PASS][8] -> [FAIL][9] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-glk7/igt@gem_exec_fair@basic-none-solo@rcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-glk1/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][10] -> [FAIL][11] ([i915#2842])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb2/igt@gem_exec_fair@basic-pace@vcs1.html
- shard-kbl: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-kbl2/igt@gem_exec_fair@basic-pace@vcs1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl1/igt@gem_exec_fair@basic-pace@vcs1.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][15] -> [FAIL][16] ([i915#2849])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_whisper@basic-queues-forked-all:
- shard-iclb: [PASS][17] -> [INCOMPLETE][18] ([i915#1895])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb4/igt@gem_exec_whisper@basic-queues-forked-all.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb5/igt@gem_exec_whisper@basic-queues-forked-all.html
* igt@i915_pm_rpm@basic-rte:
- shard-apl: NOTRUN -> [FAIL][19] ([i915#579])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@i915_pm_rpm@basic-rte.html
* igt@i915_suspend@debugfs-reader:
- shard-apl: NOTRUN -> [DMESG-WARN][20] ([i915#180])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl8/igt@i915_suspend@debugfs-reader.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-glk: [PASS][21] -> [FAIL][22] ([i915#2521])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-glk9/igt@kms_async_flips@alternate-sync-async-flip.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-glk4/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-apl: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#3777])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
- shard-skl: NOTRUN -> [SKIP][24] ([fdo#109271] / [i915#3886])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl7/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][25] ([fdo#109271] / [i915#3886]) +9 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#3886]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html
* igt@kms_cdclk@mode-transition:
- shard-apl: NOTRUN -> [SKIP][27] ([fdo#109271]) +246 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_cdclk@mode-transition.html
* igt@kms_chamelium@hdmi-edid-change-during-suspend:
- shard-apl: NOTRUN -> [SKIP][28] ([fdo#109271] / [fdo#111827]) +20 similar issues
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_chamelium@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium@hdmi-hpd-after-suspend:
- shard-skl: NOTRUN -> [SKIP][29] ([fdo#109271] / [fdo#111827])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl7/igt@kms_chamelium@hdmi-hpd-after-suspend.html
* igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
- shard-kbl: NOTRUN -> [SKIP][30] ([fdo#109271] / [fdo#111827]) +6 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html
* igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
- shard-snb: NOTRUN -> [SKIP][31] ([fdo#109271] / [fdo#111827]) +26 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-snb5/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html
* igt@kms_content_protection@srm:
- shard-apl: NOTRUN -> [TIMEOUT][32] ([i915#1319])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_content_protection@srm.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][33] -> [FAIL][34] ([i915#2346])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@pipe-d-torture-bo:
- shard-kbl: NOTRUN -> [SKIP][35] ([fdo#109271] / [i915#533]) +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_cursor_legacy@pipe-d-torture-bo.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [PASS][36] -> [INCOMPLETE][37] ([i915#155] / [i915#180] / [i915#636])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-kbl2/igt@kms_fbcon_fbt@fbc-suspend.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [PASS][38] -> [FAIL][39] ([i915#79])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@modeset-vs-vblank-race-interruptible@b-hdmi-a1:
- shard-glk: [PASS][40] -> [FAIL][41] ([i915#407])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-glk9/igt@kms_flip@modeset-vs-vblank-race-interruptible@b-hdmi-a1.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-glk4/igt@kms_flip@modeset-vs-vblank-race-interruptible@b-hdmi-a1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1:
- shard-skl: [PASS][42] -> [FAIL][43] ([i915#2122]) +1 similar issue
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile:
- shard-snb: NOTRUN -> [SKIP][44] ([fdo#109271]) +512 similar issues
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-snb5/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile.html
* igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt:
- shard-iclb: [PASS][45] -> [FAIL][46] ([i915#2546])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271]) +17 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-badstride:
- shard-apl: NOTRUN -> [FAIL][48] ([i915#2546])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl3/igt@kms_frontbuffer_tracking@fbc-badstride.html
- shard-kbl: NOTRUN -> [FAIL][49] ([i915#2546])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-badstride.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][50] -> [FAIL][51] ([i915#1188]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl1/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- shard-apl: NOTRUN -> [SKIP][52] ([fdo#109271] / [i915#533]) +3 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [PASS][53] -> [DMESG-WARN][54] ([i915#180]) +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-skl: NOTRUN -> [FAIL][55] ([fdo#108145] / [i915#265]) +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
- shard-apl: NOTRUN -> [FAIL][56] ([fdo#108145] / [i915#265]) +1 similar issue
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl3/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
- shard-kbl: NOTRUN -> [FAIL][57] ([fdo#108145] / [i915#265])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
- shard-apl: NOTRUN -> [FAIL][58] ([i915#265])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
- shard-kbl: NOTRUN -> [FAIL][59] ([i915#265])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5:
- shard-skl: NOTRUN -> [SKIP][60] ([fdo#109271] / [i915#658])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
- shard-kbl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#658]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-5.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area-2:
- shard-apl: NOTRUN -> [SKIP][62] ([fdo#109271] / [i915#658]) +5 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl7/igt@kms_psr2_sf@plane-move-sf-dmg-area-2.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][63] -> [SKIP][64] ([fdo#109642] / [fdo#111068] / [i915#658])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb2/igt@kms_psr2_su@page_flip.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb4/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][65] -> [SKIP][66] ([fdo#109441]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_sysfs_edid_timing:
- shard-apl: NOTRUN -> [FAIL][67] ([IGT#2])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl2/igt@kms_sysfs_edid_timing.html
* igt@tools_test@sysfs_l3_parity:
- shard-kbl: NOTRUN -> [SKIP][68] ([fdo#109271]) +92 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@tools_test@sysfs_l3_parity.html
#### Possible fixes ####
* igt@fbdev@nullptr:
- {shard-rkl}: [SKIP][69] ([i915#2582]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@fbdev@nullptr.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@fbdev@nullptr.html
* igt@feature_discovery@psr1:
- {shard-rkl}: [SKIP][71] ([i915#658]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@feature_discovery@psr1.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@feature_discovery@psr1.html
* igt@gem_ctx_persistence@legacy-engines-hang@render:
- shard-skl: [FAIL][73] ([i915#2410]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl4/igt@gem_ctx_persistence@legacy-engines-hang@render.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl9/igt@gem_ctx_persistence@legacy-engines-hang@render.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [FAIL][75] ([i915#2846]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-glk1/igt@gem_exec_fair@basic-deadline.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-glk3/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][77] ([i915#2842]) -> [PASS][78] +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [FAIL][79] ([i915#2842]) -> [PASS][80] +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-glk1/igt@gem_exec_fair@basic-none@rcs0.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-tglb: [FAIL][81] ([i915#2842]) -> [PASS][82] +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-tglb5/igt@gem_exec_fair@basic-pace@vecs0.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-tglb3/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- {shard-rkl}: [FAIL][83] ([i915#2842]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@gem_exec_fair@basic-throttle@rcs0.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_suspend@basic-s4-devices:
- {shard-rkl}: [INCOMPLETE][85] ([i915#3189] / [i915#3810]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@gem_exec_suspend@basic-s4-devices.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_pm_backlight@fade:
- {shard-rkl}: [SKIP][87] ([i915#3012]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@i915_pm_backlight@fade.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@i915_pm_backlight@fade.html
* igt@i915_pm_rpm@system-suspend-devices:
- {shard-rkl}: [SKIP][89] ([i915#3844] / [i915#579]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-6/igt@i915_pm_rpm@system-suspend-devices.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-2/igt@i915_pm_rpm@system-suspend-devices.html
* igt@i915_selftest@live@gt_pm:
- {shard-rkl}: [DMESG-FAIL][91] ([i915#1021]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@i915_selftest@live@gt_pm.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-1/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@slpc:
- {shard-rkl}: [INCOMPLETE][93] -> [PASS][94]
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@i915_selftest@live@slpc.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-1/igt@i915_selftest@live@slpc.html
* igt@kms_big_fb@linear-16bpp-rotate-180:
- {shard-rkl}: [SKIP][95] ([i915#3638]) -> [PASS][96] +2 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@kms_big_fb@linear-16bpp-rotate-180.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_big_fb@linear-16bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- {shard-rkl}: [SKIP][97] ([i915#3721]) -> [PASS][98] +5 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}: [FAIL][99] ([i915#3678]) -> [PASS][100] +5 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_ccs@pipe-b-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_color@pipe-c-ctm-0-75:
- shard-skl: [DMESG-WARN][101] ([i915#1982]) -> [PASS][102] +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl3/igt@kms_color@pipe-c-ctm-0-75.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl2/igt@kms_color@pipe-c-ctm-0-75.html
* igt@kms_color@pipe-c-ctm-blue-to-red:
- {shard-rkl}: [SKIP][103] ([i915#1149] / [i915#1849]) -> [PASS][104] +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@kms_color@pipe-c-ctm-blue-to-red.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_color@pipe-c-ctm-blue-to-red.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-random:
- shard-skl: [FAIL][105] ([i915#3444]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl2/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
* igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen:
- {shard-rkl}: [SKIP][107] ([fdo#112022]) -> [PASS][108] +8 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_cursor_crc@pipe-a-cursor-128x42-offscreen.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][109] ([i915#180]) -> [PASS][110] +2 similar issues
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
- shard-apl: [DMESG-WARN][111] ([i915#180]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-apl8/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-apl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- {shard-rkl}: [SKIP][113] ([fdo#111825]) -> [PASS][114] +1 similar issue
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [FAIL][115] ([i915#2346] / [i915#533]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled:
- {shard-rkl}: [SKIP][117] ([fdo#111314]) -> [PASS][118] +7 similar issues
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [FAIL][119] ([i915#2122]) -> [PASS][120] +3 similar issues
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_frontbuffer_tracking@basic:
- {shard-rkl}: [SKIP][121] ([i915#1849] / [i915#3180]) -> [PASS][122] +1 similar issue
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@kms_frontbuffer_tracking@basic.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt:
- {shard-rkl}: [SKIP][123] ([i915#1849]) -> [PASS][124] +31 similar issues
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-gtt.html
* igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
- {shard-rkl}: [SKIP][125] ([i915#3558]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@kms_plane_multiple@atomic-pipe-b-tiling-none.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_plane_multiple@atomic-pipe-b-tiling-none.html
* igt@kms_psr@psr2_sprite_plane_onoff:
- shard-iclb: [SKIP][127] ([fdo#109441]) -> [PASS][128] +1 similar issue
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb5/igt@kms_psr@psr2_sprite_plane_onoff.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb2/igt@kms_psr@psr2_sprite_plane_onoff.html
* igt@kms_psr@sprite_mmap_cpu:
- {shard-rkl}: [SKIP][129] ([i915#1072]) -> [PASS][130] +2 similar issues
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@kms_psr@sprite_mmap_cpu.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_psr@sprite_mmap_cpu.html
* igt@kms_vblank@crtc-id:
- {shard-rkl}: [SKIP][131] ([i915#1845]) -> [PASS][132] +23 similar issues
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-1/igt@kms_vblank@crtc-id.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@kms_vblank@crtc-id.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-skl: [INCOMPLETE][133] ([i915#198] / [i915#2828]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@perf@polling:
- shard-skl: [FAIL][135] ([i915#1542]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl3/igt@perf@polling.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl2/igt@perf@polling.html
* igt@sysfs_timeslice_duration@timeout@rcs0:
- {shard-rkl}: [FAIL][137] ([i915#3259]) -> [PASS][138] +3 similar issues
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-rkl-5/igt@sysfs_timeslice_duration@timeout@rcs0.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-rkl-6/igt@sysfs_timeslice_duration@timeout@rcs0.html
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][139] ([i915#658]) -> [SKIP][140] ([i915#588])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb5/igt@i915_pm_dc@dc3co-vpb-simulation.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: [FAIL][141] ([i915#3743]) -> [FAIL][142] ([i915#3722]) +1 similar issue
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-skl1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-skl4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4:
- shard-iclb: [SKIP][143] ([i915#2920]) -> [SKIP][144] ([i915#658]) +2 similar issues
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb8/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area-4.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1:
- shard-iclb: [SKIP][145] ([i915#658]) -> [SKIP][146] ([i915#2920]) +2 similar issues
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-1.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#3363] / [i915#602]) -> ([FAIL][154], [FAIL][155], [FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160], [FAIL][161]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#2292] / [i915#3002] / [i915#3363] / [i915#92])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10470/shard-kbl3/igt@runner@
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20799/index.html
[-- Attachment #2: Type: text/html, Size: 33214 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check Juston Li
@ 2021-08-12 7:10 ` Anshuman Gupta
2021-08-12 18:27 ` Li, Juston
0 siblings, 1 reply; 9+ messages in thread
From: Anshuman Gupta @ 2021-08-12 7:10 UTC (permalink / raw)
To: Juston Li; +Cc: intel-gfx, seanpaul, ramalingam.c, rodrigo.vivi
On 2021-08-11 at 14:23:14 -0700, Juston Li wrote:
> On some MST docking stations, rx_info can only be read after
> RepeaterAuth_Send_ReceiverID_List and the RxStatus READY bit is set
> otherwise the read will return -EIO.
>
> This behavior causes the mst stream type1 capability test to fail to
> read rx_info and determine if the topology supports type1 and fallback
> to type0.
>
> To fix this, check for type1 capability when we receive rx_info within
> the AKE flow when we read RepeaterAuth_Send_ReceiverID_List instead
> of an explicit read just for type1 capability checking.
>
> This does require moving where we set stream_types to after
> hdcp2_authenticate_sink() when we get rx_info but this occurs before we
> do hdcp2_propagate_stream_management_info.
>
> Also, legacy HDCP 2.0/2.1 are not type 1 capable either so check for
> that as well.
>
> Changes since v2:
> - Remove no longer used variables in _intel_hdcp2_enable()
>
> Signed-off-by: Juston Li <juston.li@intel.com>
> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> ---
> .../drm/i915/display/intel_display_types.h | 2 +
> drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 39 ---------------
> drivers/gpu/drm/i915/display/intel_hdcp.c | 49 ++++++++-----------
> 3 files changed, 23 insertions(+), 67 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index dbdfe54d0340..c8b687ff0374 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -516,6 +516,8 @@ struct intel_hdcp {
> enum transcoder cpu_transcoder;
> /* Only used for DP MST stream encryption */
> enum transcoder stream_transcoder;
> +
> + bool topology_type1_capable;
Topology is not going to be change for each connector in mst topology.
IMHO dig_port should contain this, prefix by mst as this is specific
to mst usages.
> };
>
> struct intel_connector {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index fbfb3c4d16bb..540a669e01dd 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -478,23 +478,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
> return size;
> }
>
> -static int
> -get_rxinfo_hdcp_1_dev_downstream(struct intel_digital_port *dig_port, bool *hdcp_1_x)
> -{
> - u8 rx_info[HDCP_2_2_RXINFO_LEN];
> - int ret;
> -
> - ret = drm_dp_dpcd_read(&dig_port->dp.aux,
> - DP_HDCP_2_2_REG_RXINFO_OFFSET,
> - (void *)rx_info, HDCP_2_2_RXINFO_LEN);
> -
> - if (ret != HDCP_2_2_RXINFO_LEN)
> - return ret >= 0 ? -EIO : ret;
> -
> - *hdcp_1_x = HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) ? true : false;
> - return 0;
> -}
> -
> static
> ssize_t get_receiver_id_list_rx_info(struct intel_digital_port *dig_port, u32 *dev_cnt, u8 *byte)
> {
> @@ -665,27 +648,6 @@ int intel_dp_hdcp2_capable(struct intel_digital_port *dig_port,
> return 0;
> }
>
> -static
> -int intel_dp_mst_streams_type1_capable(struct intel_connector *connector,
> - bool *capable)
> -{
> - struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> - struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> - int ret;
> - bool hdcp_1_x;
> -
> - ret = get_rxinfo_hdcp_1_dev_downstream(dig_port, &hdcp_1_x);
> - if (ret) {
> - drm_dbg_kms(&i915->drm,
> - "[%s:%d] failed to read RxInfo ret=%d\n",
> - connector->base.name, connector->base.base.id, ret);
> - return ret;
> - }
> -
> - *capable = !hdcp_1_x;
> - return 0;
> -}
> -
> static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
> .write_an_aksv = intel_dp_hdcp_write_an_aksv,
> .read_bksv = intel_dp_hdcp_read_bksv,
> @@ -834,7 +796,6 @@ static const struct intel_hdcp_shim intel_dp_mst_hdcp_shim = {
> .stream_2_2_encryption = intel_dp_mst_hdcp2_stream_encryption,
> .check_2_2_link = intel_dp_mst_hdcp2_check_link,
> .hdcp_2_2_capable = intel_dp_hdcp2_capable,
> - .streams_type1_capable = intel_dp_mst_streams_type1_capable,
> .protocol = HDCP_PROTOCOL_DP,
> };
>
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index ebc2e32aec0b..1a2a98e2c6e3 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -33,21 +33,6 @@ static int intel_conn_to_vcpi(struct intel_connector *connector)
> return connector->port ? connector->port->vcpi.vcpi : 0;
> }
>
> -static bool
> -intel_streams_type1_capable(struct intel_connector *connector)
> -{
> - const struct intel_hdcp_shim *shim = connector->hdcp.shim;
> - bool capable = false;
> -
> - if (!shim)
> - return capable;
> -
> - if (shim->streams_type1_capable)
> - shim->streams_type1_capable(connector, &capable);
> -
> - return capable;
> -}
> -
> /*
> * intel_hdcp_required_content_stream selects the most highest common possible HDCP
> * content_type for all streams in DP MST topology because security f/w doesn't
> @@ -86,7 +71,7 @@ intel_hdcp_required_content_stream(struct intel_digital_port *dig_port)
> if (conn_dig_port != dig_port)
> continue;
>
> - if (!enforce_type0 && !intel_streams_type1_capable(connector))
> + if (!enforce_type0 && !connector->hdcp.topology_type1_capable)
> enforce_type0 = true;
>
> data->streams[data->k].stream_id = intel_conn_to_vcpi(connector);
> @@ -1632,6 +1617,14 @@ int hdcp2_authenticate_repeater_topology(struct intel_connector *connector)
> return -EINVAL;
> }
>
> + /*
> + * A topology is not Type 1 capable if it contains a downstream device
> + * that is HDCP 1.x or Legacy HDCP 2.0/2.1 compliant.
> + */
> + hdcp->topology_type1_capable =
> + !HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) &&
> + !HDCP_2_2_HDCP_2_0_REP_CONNECTED(rx_info[1]);
> +
> /* Converting and Storing the seq_num_v to local variable as DWORD */
> seq_num_v =
> drm_hdcp_be24_to_cpu((const u8 *)msgs.recvid_list.seq_num_v);
> @@ -1871,11 +1864,23 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
> {
> struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct hdcp_port_data *data = &dig_port->hdcp_port_data;
> + struct intel_hdcp *hdcp = &connector->hdcp;
> int ret = 0, i, tries = 3;
>
> for (i = 0; i < tries && !dig_port->hdcp_auth_status; i++) {
> ret = hdcp2_authenticate_sink(connector);
> if (!ret) {
> + /* Stream which requires encryption */
> + if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
> + data->k = 1;
> + data->streams[0].stream_type = hdcp->content_type;
> + } else {
> + ret = intel_hdcp_required_content_stream(dig_port);
> + if (ret)
> + return ret;
> + }
> +
It will be good to use helper function to init streams here.
Thanks,
Anshuman Gupta.
> ret = hdcp2_propagate_stream_management_info(connector);
> if (ret) {
> drm_dbg_kms(&i915->drm,
> @@ -1921,9 +1926,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
>
> static int _intel_hdcp2_enable(struct intel_connector *connector)
> {
> - struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> struct drm_i915_private *i915 = to_i915(connector->base.dev);
> - struct hdcp_port_data *data = &dig_port->hdcp_port_data;
> struct intel_hdcp *hdcp = &connector->hdcp;
> int ret;
>
> @@ -1931,16 +1934,6 @@ static int _intel_hdcp2_enable(struct intel_connector *connector)
> connector->base.name, connector->base.base.id,
> hdcp->content_type);
>
> - /* Stream which requires encryption */
> - if (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
> - data->k = 1;
> - data->streams[0].stream_type = hdcp->content_type;
> - } else {
> - ret = intel_hdcp_required_content_stream(dig_port);
> - if (ret)
> - return ret;
> - }
> -
> ret = hdcp2_authenticate_and_encrypt(connector);
> if (ret) {
> drm_dbg_kms(&i915->drm, "HDCP2 Type%d Enabling Failed. (%d)\n",
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List Juston Li
@ 2021-08-12 7:43 ` Anshuman Gupta
0 siblings, 0 replies; 9+ messages in thread
From: Anshuman Gupta @ 2021-08-12 7:43 UTC (permalink / raw)
To: Juston Li; +Cc: intel-gfx, seanpaul, ramalingam.c, rodrigo.vivi
On 2021-08-11 at 14:23:13 -0700, Juston Li wrote:
> When reading RepeaterAuth_Send_ReceiverID_List, RxInfo is read by itself
> once to retrieve the DEVICE_COUNT to calculate the size of the
> ReceiverID list then read a second time as a part of reading ReceiverID
> list.
>
> On some MST docking stations, RxInfo can only be read after the RxStatus
> READY bit is set otherwise the read will return -EIO. The spec states that
> the READY bit should be cleared as soon as RxInfo has been read.
>
> In this case, the first RxInfo read succeeds but after the READY bit is
> cleared, the second read fails.
>
> Fix it by reading RxInfo once and storing it before reading the rest of
> RepeaterAuth_Send_ReceiverID_List once we know the size.
>
> Modify get_receiver_id_list_size() to read and store RxInfo in the
> message buffer and also parse DEVICE_COUNT so we know the size of
> RepeaterAuth_Send_ReceiverID_List.
>
> Afterwards, retrieve the rest of the message at the offset for
> seq_num_V.
>
> Changes in v5:
> - Don't change the offset define for Send_ReceiverID_List
> When reading, update message offset to account for RxInfo being read
v5 looks good to me
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
>
> Changes in v4:
> - rebase and edit commit message
>
> Changes in v3:
> - remove comment
>
> Changes in v2:
> - remove unnecessary moving of drm_i915_private from patch 1
>
> Signed-off-by: Juston Li <juston.li@intel.com>
> Acked-by: Anshuman Gupta <anshuman.gupta@intel.com>
> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 31 ++++++++++----------
> 1 file changed, 16 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> index 1d0096654776..fbfb3c4d16bb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> @@ -496,11 +496,10 @@ get_rxinfo_hdcp_1_dev_downstream(struct intel_digital_port *dig_port, bool *hdcp
> }
>
> static
> -ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port)
> +ssize_t get_receiver_id_list_rx_info(struct intel_digital_port *dig_port, u32 *dev_cnt, u8 *byte)
> {
> - u8 rx_info[HDCP_2_2_RXINFO_LEN];
> - u32 dev_cnt;
> ssize_t ret;
> + u8 *rx_info = byte;
>
> ret = drm_dp_dpcd_read(&dig_port->dp.aux,
> DP_HDCP_2_2_REG_RXINFO_OFFSET,
> @@ -508,15 +507,11 @@ ssize_t get_receiver_id_list_size(struct intel_digital_port *dig_port)
> if (ret != HDCP_2_2_RXINFO_LEN)
> return ret >= 0 ? -EIO : ret;
>
> - dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
> + *dev_cnt = (HDCP_2_2_DEV_COUNT_HI(rx_info[0]) << 4 |
> HDCP_2_2_DEV_COUNT_LO(rx_info[1]));
>
> - if (dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
> - dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
> -
> - ret = sizeof(struct hdcp2_rep_send_receiverid_list) -
> - HDCP_2_2_RECEIVER_IDS_MAX_LEN +
> - (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN);
> + if (*dev_cnt > HDCP_2_2_MAX_DEVICE_COUNT)
> + *dev_cnt = HDCP_2_2_MAX_DEVICE_COUNT;
>
> return ret;
> }
> @@ -534,6 +529,7 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
> const struct hdcp2_dp_msg_data *hdcp2_msg_data;
> ktime_t msg_end = ktime_set(0, 0);
> bool msg_expired;
> + u32 dev_cnt;
>
> hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id);
> if (!hdcp2_msg_data)
> @@ -546,17 +542,22 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
>
> hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
>
> + /* DP adaptation msgs has no msg_id */
> + byte++;
> +
> if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
> - ret = get_receiver_id_list_size(dig_port);
> + ret = get_receiver_id_list_rx_info(dig_port, &dev_cnt, byte);
> if (ret < 0)
> return ret;
>
> - size = ret;
> + byte += ret;
> + size = sizeof(struct hdcp2_rep_send_receiverid_list) -
> + HDCP_2_2_RXINFO_LEN - HDCP_2_2_RECEIVER_IDS_MAX_LEN +
> + (dev_cnt * HDCP_2_2_RECEIVER_ID_LEN);
> + offset += HDCP_2_2_RXINFO_LEN;
> }
> - bytes_to_recv = size - 1;
>
> - /* DP adaptation msgs has no msg_id */
> - byte++;
> + bytes_to_recv = size - 1;
>
> while (bytes_to_recv) {
> len = bytes_to_recv > DP_AUX_MAX_PAYLOAD_BYTES ?
> --
> 2.31.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check
2021-08-12 7:10 ` Anshuman Gupta
@ 2021-08-12 18:27 ` Li, Juston
0 siblings, 0 replies; 9+ messages in thread
From: Li, Juston @ 2021-08-12 18:27 UTC (permalink / raw)
To: Gupta, Anshuman; +Cc: seanpaul, Vivi, Rodrigo, intel-gfx, C, Ramalingam
On Thu, 2021-08-12 at 12:40 +0530, Anshuman Gupta wrote:
> On 2021-08-11 at 14:23:14 -0700, Juston Li wrote:
> > On some MST docking stations, rx_info can only be read after
> > RepeaterAuth_Send_ReceiverID_List and the RxStatus READY bit is set
> > otherwise the read will return -EIO.
> >
> > This behavior causes the mst stream type1 capability test to fail
> > to
> > read rx_info and determine if the topology supports type1 and
> > fallback
> > to type0.
> >
> > To fix this, check for type1 capability when we receive rx_info
> > within
> > the AKE flow when we read RepeaterAuth_Send_ReceiverID_List instead
> > of an explicit read just for type1 capability checking.
> >
> > This does require moving where we set stream_types to after
> > hdcp2_authenticate_sink() when we get rx_info but this occurs
> > before we
> > do hdcp2_propagate_stream_management_info.
> >
> > Also, legacy HDCP 2.0/2.1 are not type 1 capable either so check
> > for
> > that as well.
> >
> > Changes since v2:
> > - Remove no longer used variables in _intel_hdcp2_enable()
> >
> > Signed-off-by: Juston Li <juston.li@intel.com>
> > Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> > .../drm/i915/display/intel_display_types.h | 2 +
> > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 39 ---------------
> > drivers/gpu/drm/i915/display/intel_hdcp.c | 49 ++++++++-------
> > ----
> > 3 files changed, 23 insertions(+), 67 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index dbdfe54d0340..c8b687ff0374 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -516,6 +516,8 @@ struct intel_hdcp {
> > enum transcoder cpu_transcoder;
> > /* Only used for DP MST stream encryption */
> > enum transcoder stream_transcoder;
> > +
> > + bool topology_type1_capable;
> Topology is not going to be change for each connector in mst
> topology.
> IMHO dig_port should contain this, prefix by mst as this is specific
> to mst usages.
Sure, will move to intel_digital_port and I settled on renaming it
hdcp_mst_type1_capable
> > };
> >
> > struct intel_connector {
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > index fbfb3c4d16bb..540a669e01dd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
> > @@ -478,23 +478,6 @@ int intel_dp_hdcp2_write_msg(struct
> > intel_digital_port *dig_port,
> > return size;
> > }
> >
> > -static int
> > -get_rxinfo_hdcp_1_dev_downstream(struct intel_digital_port
> > *dig_port, bool *hdcp_1_x)
> > -{
> > - u8 rx_info[HDCP_2_2_RXINFO_LEN];
> > - int ret;
> > -
> > - ret = drm_dp_dpcd_read(&dig_port->dp.aux,
> > - DP_HDCP_2_2_REG_RXINFO_OFFSET,
> > - (void *)rx_info,
> > HDCP_2_2_RXINFO_LEN);
> > -
> > - if (ret != HDCP_2_2_RXINFO_LEN)
> > - return ret >= 0 ? -EIO : ret;
> > -
> > - *hdcp_1_x = HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) ?
> > true : false;
> > - return 0;
> > -}
> > -
> > static
> > ssize_t get_receiver_id_list_rx_info(struct intel_digital_port
> > *dig_port, u32 *dev_cnt, u8 *byte)
> > {
> > @@ -665,27 +648,6 @@ int intel_dp_hdcp2_capable(struct
> > intel_digital_port *dig_port,
> > return 0;
> > }
> >
> > -static
> > -int intel_dp_mst_streams_type1_capable(struct intel_connector
> > *connector,
> > - bool *capable)
> > -{
> > - struct intel_digital_port *dig_port =
> > intel_attached_dig_port(connector);
> > - struct drm_i915_private *i915 = to_i915(dig_port-
> > >base.base.dev);
> > - int ret;
> > - bool hdcp_1_x;
> > -
> > - ret = get_rxinfo_hdcp_1_dev_downstream(dig_port,
> > &hdcp_1_x);
> > - if (ret) {
> > - drm_dbg_kms(&i915->drm,
> > - "[%s:%d] failed to read RxInfo
> > ret=%d\n",
> > - connector->base.name, connector-
> > >base.base.id, ret);
> > - return ret;
> > - }
> > -
> > - *capable = !hdcp_1_x;
> > - return 0;
> > -}
> > -
> > static const struct intel_hdcp_shim intel_dp_hdcp_shim = {
> > .write_an_aksv = intel_dp_hdcp_write_an_aksv,
> > .read_bksv = intel_dp_hdcp_read_bksv,
> > @@ -834,7 +796,6 @@ static const struct intel_hdcp_shim
> > intel_dp_mst_hdcp_shim = {
> > .stream_2_2_encryption =
> > intel_dp_mst_hdcp2_stream_encryption,
> > .check_2_2_link = intel_dp_mst_hdcp2_check_link,
> > .hdcp_2_2_capable = intel_dp_hdcp2_capable,
> > - .streams_type1_capable =
> > intel_dp_mst_streams_type1_capable,
> > .protocol = HDCP_PROTOCOL_DP,
> > };
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > index ebc2e32aec0b..1a2a98e2c6e3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> > @@ -33,21 +33,6 @@ static int intel_conn_to_vcpi(struct
> > intel_connector *connector)
> > return connector->port ? connector->port->vcpi.vcpi : 0;
> > }
> >
> > -static bool
> > -intel_streams_type1_capable(struct intel_connector *connector)
> > -{
> > - const struct intel_hdcp_shim *shim = connector->hdcp.shim;
> > - bool capable = false;
> > -
> > - if (!shim)
> > - return capable;
> > -
> > - if (shim->streams_type1_capable)
> > - shim->streams_type1_capable(connector, &capable);
> > -
> > - return capable;
> > -}
> > -
> > /*
> > * intel_hdcp_required_content_stream selects the most highest
> > common possible HDCP
> > * content_type for all streams in DP MST topology because
> > security f/w doesn't
> > @@ -86,7 +71,7 @@ intel_hdcp_required_content_stream(struct
> > intel_digital_port *dig_port)
> > if (conn_dig_port != dig_port)
> > continue;
> >
> > - if (!enforce_type0 &&
> > !intel_streams_type1_capable(connector))
> > + if (!enforce_type0 && !connector-
> > >hdcp.topology_type1_capable)
> > enforce_type0 = true;
> >
> > data->streams[data->k].stream_id =
> > intel_conn_to_vcpi(connector);
> > @@ -1632,6 +1617,14 @@ int
> > hdcp2_authenticate_repeater_topology(struct intel_connector
> > *connector)
> > return -EINVAL;
> > }
> >
> > + /*
> > + * A topology is not Type 1 capable if it contains a
> > downstream device
> > + * that is HDCP 1.x or Legacy HDCP 2.0/2.1 compliant.
> > + */
> > + hdcp->topology_type1_capable =
> > + !HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) &&
> > + !HDCP_2_2_HDCP_2_0_REP_CONNECTED(rx_info[1]);
> > +
> > /* Converting and Storing the seq_num_v to local variable
> > as DWORD */
> > seq_num_v =
> > drm_hdcp_be24_to_cpu((const u8
> > *)msgs.recvid_list.seq_num_v);
> > @@ -1871,11 +1864,23 @@ static int
> > hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
> > {
> > struct intel_digital_port *dig_port =
> > intel_attached_dig_port(connector);
> > struct drm_i915_private *i915 = to_i915(connector-
> > >base.dev);
> > + struct hdcp_port_data *data = &dig_port->hdcp_port_data;
> > + struct intel_hdcp *hdcp = &connector->hdcp;
> > int ret = 0, i, tries = 3;
> >
> > for (i = 0; i < tries && !dig_port->hdcp_auth_status; i++)
> > {
> > ret = hdcp2_authenticate_sink(connector);
> > if (!ret) {
> > + /* Stream which requires encryption */
> > + if
> > (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
> > + data->k = 1;
> > + data->streams[0].stream_type =
> > hdcp->content_type;
> > + } else {
> > + ret =
> > intel_hdcp_required_content_stream(dig_port);
> > + if (ret)
> > + return ret;
> > + }
> > +
> It will be good to use helper function to init streams here.
Sure, will move this to a helper function.
Also fix shouldn't return here, should break and let loop retry.
Thanks!
> Thanks,
> Anshuman Gupta.
> > ret =
> > hdcp2_propagate_stream_management_info(connector);
> > if (ret) {
> > drm_dbg_kms(&i915->drm,
> > @@ -1921,9 +1926,7 @@ static int
> > hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
> >
> > static int _intel_hdcp2_enable(struct intel_connector *connector)
> > {
> > - struct intel_digital_port *dig_port =
> > intel_attached_dig_port(connector);
> > struct drm_i915_private *i915 = to_i915(connector-
> > >base.dev);
> > - struct hdcp_port_data *data = &dig_port->hdcp_port_data;
> > struct intel_hdcp *hdcp = &connector->hdcp;
> > int ret;
> >
> > @@ -1931,16 +1934,6 @@ static int _intel_hdcp2_enable(struct
> > intel_connector *connector)
> > connector->base.name, connector->base.base.id,
> > hdcp->content_type);
> >
> > - /* Stream which requires encryption */
> > - if
> > (!intel_encoder_is_mst(intel_attached_encoder(connector))) {
> > - data->k = 1;
> > - data->streams[0].stream_type = hdcp->content_type;
> > - } else {
> > - ret = intel_hdcp_required_content_stream(dig_port);
> > - if (ret)
> > - return ret;
> > - }
> > -
> > ret = hdcp2_authenticate_and_encrypt(connector);
> > if (ret) {
> > drm_dbg_kms(&i915->drm, "HDCP2 Type%d Enabling
> > Failed. (%d)\n",
> > --
> > 2.31.1
> >
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-08-12 18:27 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-11 21:23 [Intel-gfx] [PATCH v4 0/3] drm/i915/hdcp: HDCP2.2 MST dock fixes Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 1/3] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() Juston Li
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 2/3] drm/i915/hdcp: read RxInfo once when reading RepeaterAuth_Send_ReceiverID_List Juston Li
2021-08-12 7:43 ` Anshuman Gupta
2021-08-11 21:23 ` [Intel-gfx] [PATCH v4 3/3] drm/i915/hdcp: reuse rx_info for mst stream type1 capability check Juston Li
2021-08-12 7:10 ` Anshuman Gupta
2021-08-12 18:27 ` Li, Juston
2021-08-11 23:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/hdcp: HDCP2.2 MST dock fixes (rev5) Patchwork
2021-08-12 1:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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