From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 00/10] gmbus/dp aux irqfication Date: Sat, 1 Dec 2012 21:15:14 +0100 Message-ID: <20121201201514.GG4384@phenom.ffwll.local> References: <1354366429-2324-1-git-send-email-daniel.vetter@ffwll.ch> <275ffc$7lm2dh@fmsmga002.fm.intel.com> <6c3329$7epj5k@orsmga002.jf.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ea0-f177.google.com (mail-ea0-f177.google.com [209.85.215.177]) by gabe.freedesktop.org (Postfix) with ESMTP id AC70FE6127 for ; Sat, 1 Dec 2012 12:13:48 -0800 (PST) Received: by mail-ea0-f177.google.com with SMTP id c10so638005eaa.36 for ; Sat, 01 Dec 2012 12:13:48 -0800 (PST) Content-Disposition: inline In-Reply-To: <6c3329$7epj5k@orsmga002.jf.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Chris Wilson Cc: Daniel Vetter , Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Sat, Dec 01, 2012 at 06:01:37PM +0000, Chris Wilson wrote: > On Sat, 01 Dec 2012 16:47:46 +0000, Chris Wilson wrote: > > On Sat, 1 Dec 2012 13:53:39 +0100, Daniel Vetter wrote: > > > Hi all, > > > > > > Irq-drive gmbus/dp aux transfer, simply because we can (and at least in the case > > > of gmbus, it's quite a bit faster than the msleep(1) loop - we now reliably > > > transfer at full wire speed insteaf of sometimes 2-3x slower). > > > > > > Compared to the older version I've floated on irc way back and which Chris has > > > carried around in his wip branchs (and inflicted upon tons of unsuspecting bug > > > reporters) there are a few differences: > > > - handle the hpd vs. setup race - even the current code enables hpd processing > > > before the fbdev is set up, which is too early. > > > - fix the gen4 gmbus support, was totally busted. > > > - tested on hsw (although all the relevant bits are a 100% match with cpt/ivb). > > > - disable dp aux irq on vlv - too complicated to get at the docs (moved again, > > > old access revoked) and I don't have the hw. > > > > > > While reviewing this patch series I've also noticed two small things in the irq > > > handling code in general, patches for that at the beginning of the series. > > > > > > Comment&review highgly welcome. > > > > gm45 appears to be functioning big time, good start. The init sequence > > looks less convoluted and better understood now, so I am reasonably > > happy with this series. Will report back later after more testing. > > ilk: [ 0.698644] [drm:intel_dp_aux_wait_done] *ERROR* dp aux hw did > not signal timeout (has irq: 1)! and slow Should be fixed now. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch