From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 06/22] drm/i915: add power context allocation and setup on VLV Date: Tue, 5 Feb 2013 20:01:15 +0200 Message-ID: <20130205180115.GZ9135@intel.com> References: <1359809786-26434-1-git-send-email-jbarnes@virtuousgeek.org> <1359809786-26434-7-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 524BAE62D1 for ; Tue, 5 Feb 2013 10:01:22 -0800 (PST) Content-Disposition: inline In-Reply-To: <1359809786-26434-7-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Sat, Feb 02, 2013 at 01:56:10PM +0100, Jesse Barnes wrote: > The Gunit has a separate reg for this, so allocate some stolen space for > the power context and initialize the reg. AFAIK the BIOS is responsible for setting up the PCBR register. The register can also be locked preventing further updates, so if the BIOS actually has done what it's supposed to, this code will fail. So should we just instead read out the PCBR and remove the range from the stolen mem pool? > = > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > drivers/gpu/drm/i915/i915_gem_stolen.c | 41 ++++++++++++++++++++++++++= ++++++ > drivers/gpu/drm/i915/i915_reg.h | 1 + > 3 files changed, 44 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_= drv.h > index f4ae73d..34f01a9 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -928,6 +928,8 @@ typedef struct drm_i915_private { > struct drm_mm_node *compressed_fb; > struct drm_mm_node *compressed_llb; > = > + struct drm_mm_node *vlv_pctx; > + > unsigned long last_gpu_reset; > = > /* list of fbdev register on this device */ > diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i91= 5/i915_gem_stolen.c > index f21ae17..ac11a41 100644 > --- a/drivers/gpu/drm/i915/i915_gem_stolen.c > +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c > @@ -171,11 +171,49 @@ void i915_gem_stolen_cleanup_compression(struct drm= _device *dev) > dev_priv->cfb_size =3D 0; > } > = > +static void i915_setup_pctx(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv =3D dev->dev_private; > + struct drm_mm_node *pctx; > + unsigned long pctx_paddr; > + int pctx_size =3D 24*1024; > + > + pctx =3D drm_mm_search_free(&dev_priv->mm.stolen, pctx_size, 4096, 0); > + if (pctx) > + pctx =3D drm_mm_get_block(pctx, pctx_size, 4096); > + if (!pctx) > + goto err; > + > + pctx_paddr =3D dev_priv->mm.stolen_base + pctx->start; > + if (!pctx_paddr) > + goto err_free_pctx; > + > + dev_priv->vlv_pctx =3D pctx; > + I915_WRITE(VLV_PCBR, pctx_paddr); > + > + return; > + > +err_free_pctx: > + drm_mm_put_block(pctx); > +err: > + DRM_DEBUG("not enough stolen space for PCTX, disabling\n"); > +} > + > +static void i915_cleanup_pctx(struct drm_device *dev) > +{ > + struct drm_i915_private *dev_priv =3D dev->dev_private; > + > + I915_WRITE(VLV_PCBR, 0); > + drm_mm_put_block(dev_priv->vlv_pctx); > +} > + > void i915_gem_cleanup_stolen(struct drm_device *dev) > { > struct drm_i915_private *dev_priv =3D dev->dev_private; > = > i915_gem_stolen_cleanup_compression(dev); > + if (IS_VALLEYVIEW(dev) && i915_powersave) > + i915_cleanup_pctx(dev); > drm_mm_takedown(&dev_priv->mm.stolen); > } > = > @@ -193,6 +231,9 @@ int i915_gem_init_stolen(struct drm_device *dev) > /* Basic memrange allocator for stolen space */ > drm_mm_init(&dev_priv->mm.stolen, 0, dev_priv->mm.gtt->stolen_size); > = > + if (IS_VALLEYVIEW(dev) && i915_powersave) > + i915_setup_pctx(dev); > + > return 0; > } > = > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index 286bab3..c785750 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -561,6 +561,7 @@ > #define ISR 0x020ac > #define VLV_GUNIT_CLOCK_GATE 0x182060 > #define GCFG_DIS (1<<8) > +#define VLV_PCBR 0x182120 > #define VLV_IIR_RW 0x182084 > #define VLV_IER 0x1820a0 > #define VLV_IIR 0x1820a4 > -- = > 1.7.9.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC