From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chris Wilson Subject: Re: [PATCH 4/7] drm/i915: don't enable the plane too early in i9xx_crtc_mode_set Date: Fri, 12 Apr 2013 15:05:01 +0100 Message-ID: <20130412140501.GJ1408@cantiga.alporthouse.com> References: <1365690550-5716-1-git-send-email-daniel.vetter@ffwll.ch> <1365690550-5716-4-git-send-email-daniel.vetter@ffwll.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 5DBF1E5F04 for ; Fri, 12 Apr 2013 07:05:34 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1365690550-5716-4-git-send-email-daniel.vetter@ffwll.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org Errors-To: intel-gfx-bounces+gcfxdi-intel-gfx=m.gmane.org@lists.freedesktop.org To: Daniel Vetter Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org On Thu, Apr 11, 2013 at 04:29:07PM +0200, Daniel Vetter wrote: > This is horrible lore and we should be able to get rid of it now > that the lvds/pfit handling code actually does the right thing. > > Signed-off-by: Daniel Vetter I'd prefer 4 & 5 squashed, specially as 5 will then introduce a WARN, but Reviewed-by: Chris Wilson -Chris -- Chris Wilson, Intel Open Source Technology Centre