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From: Anusha Srivatsa <anusha.srivatsa@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/tgl: Implement Wa_1606931601
Date: Fri, 24 Jan 2020 13:29:41 -0800	[thread overview]
Message-ID: <20200124212941.7988-1-anusha.srivatsa@intel.com> (raw)

Disable Early Read and Src Swap by setting the bit 14
and 15 in the chicken register.

BSpec: 46045,52890

v2: Follow the Bspec implementation for the WA.

Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +++++
 drivers/gpu/drm/i915/i915_reg.h             | 1 +
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 5a7db279f702..c1c970b15395 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -593,6 +593,11 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine,
 	wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
 	       IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 :
 			    FF_MODE2_TDS_TIMER_MASK);
+
+	/* Wa_1606931601:tgl */
+	WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2,
+			  GEN11_EARLY_READ_SRC0_DISABLE);
+
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b93c4c18f05c..c8b51ccfa5e6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9146,6 +9146,7 @@ enum {
 #define   DOP_CLOCK_GATING_DISABLE	(1 << 0)
 #define   PUSH_CONSTANT_DEREF_DISABLE	(1 << 8)
 #define   GEN11_TDL_CLOCK_GATING_FIX_DISABLE	(1 << 1)
+#define   GEN11_EARLY_READ_SRC0_DISABLE	(1 << 14)
 
 #define HSW_ROW_CHICKEN3		_MMIO(0xe49c)
 #define  HSW_ROW_CHICKEN3_L3_GLOBAL_ATOMICS_DISABLE    (1 << 6)
-- 
2.23.0

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             reply	other threads:[~2020-01-24 21:46 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-24 21:29 Anusha Srivatsa [this message]
2020-01-24 23:40 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Implement Wa_1606931601 (rev2) Patchwork
2020-01-27 13:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2020-02-11 23:44 [Intel-gfx] [PATCH] drm/i915/tgl: Implement Wa_1606931601 Anusha Srivatsa
2020-01-31 23:17 Anusha Srivatsa
2020-02-08  7:00 ` Matt Atwood
2020-01-29 22:42 Anusha Srivatsa
2020-01-30 20:42 ` Matt Roper
2020-01-31  0:16   ` Srivatsa, Anusha
2020-01-22 23:40 Anusha Srivatsa
2020-01-23 17:50 ` Matt Roper
2020-01-24 19:36   ` Srivatsa, Anusha

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