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* [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late()
@ 2020-02-03  7:47 Manasi Navare
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config() Manasi Navare
                   ` (5 more replies)
  0 siblings, 6 replies; 12+ messages in thread
From: Manasi Navare @ 2020-02-03  7:47 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Add an optional secondary encoder state compute hook. This gets
called after the normak .compute_config() has been called for
all the encoders in the state. Thus in the new hook we can rely
on all derived state populated by .compute_config() to be already
set up. Should be useful for MST and port sync master/slave
transcoder selection.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c  | 39 +++++++++++++++++++
 .../drm/i915/display/intel_display_types.h    |  3 ++
 2 files changed, 42 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b0af37fb6d4a..2a2c9dd563e5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13522,6 +13522,35 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 	return 0;
 }
 
+static int
+intel_modeset_pipe_config_late(struct intel_crtc_state *crtc_state)
+{
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(crtc_state->uapi.state);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	struct drm_connector_state *conn_state;
+	struct drm_connector *connector;
+	int i;
+
+	for_each_new_connector_in_state(&state->base, connector,
+					conn_state, i) {
+		struct intel_encoder *encoder =
+			to_intel_encoder(conn_state->best_encoder);
+		int ret;
+
+		if (conn_state->crtc != &crtc->base ||
+		    !encoder->compute_config_late)
+			continue;
+
+		ret = encoder->compute_config_late(encoder, crtc_state,
+						   conn_state);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 bool intel_fuzzy_clock_check(int clock1, int clock2)
 {
 	int diff;
@@ -14929,6 +14958,16 @@ static int intel_atomic_check(struct drm_device *dev,
 		ret = intel_modeset_pipe_config(new_crtc_state);
 		if (ret)
 			goto fail;
+	}
+
+	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
+					    new_crtc_state, i) {
+		if (!needs_modeset(new_crtc_state))
+			continue;
+
+		ret = intel_modeset_pipe_config_late(new_crtc_state);
+		if (ret)
+			goto fail;
 
 		intel_crtc_check_fastset(old_crtc_state, new_crtc_state);
 	}
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 7c6133a9c51b..96d84d027556 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -141,6 +141,9 @@ struct intel_encoder {
 	int (*compute_config)(struct intel_encoder *,
 			      struct intel_crtc_state *,
 			      struct drm_connector_state *);
+	int (*compute_config_late)(struct intel_encoder *,
+				   struct intel_crtc_state *,
+				   struct drm_connector_state *);
 	void (*update_prepare)(struct intel_atomic_state *,
 			       struct intel_encoder *,
 			       struct intel_crtc *);
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config()
  2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
@ 2020-02-03  7:47 ` Manasi Navare
  2020-02-05 14:25   ` Ville Syrjälä
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset Manasi Navare
                   ` (4 subsequent siblings)
  5 siblings, 1 reply; 12+ messages in thread
From: Manasi Navare @ 2020-02-03  7:47 UTC (permalink / raw)
  To: intel-gfx

This patch pushes out the computation of master and slave
transcoders in crtc states after encoder's compute_config hook.
This ensures that the assigned master slave crtcs have exact same
mode and timings which is a requirement for Port sync mode
to be enabled.

v2:
* Correct indentation
* Rename to intel_ddi_port_sync_transcoders (Ville)
* remove unwanted debug (Ville)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     | 109 +++++++++++++
 drivers/gpu/drm/i915/display/intel_display.c | 159 +------------------
 2 files changed, 110 insertions(+), 158 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index aa066fb9eb00..eb970797cd68 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4448,6 +4448,114 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
 	return 0;
 }
 
+static bool mode_equal(const struct drm_display_mode *mode1,
+		       const struct drm_display_mode *mode2)
+{
+	return drm_mode_match(mode1, mode2,
+			      DRM_MODE_MATCH_TIMINGS |
+			      DRM_MODE_MATCH_FLAGS |
+			      DRM_MODE_MATCH_3D_FLAGS) &&
+		mode1->clock == mode2->clock; /* we want an exact match */
+}
+
+static bool m_n_equal(const struct intel_link_m_n *m_n_1,
+		      const struct intel_link_m_n *m_n_2)
+{
+	return m_n_1->tu == m_n_2->tu &&
+		m_n_1->gmch_m == m_n_2->gmch_m &&
+		m_n_1->gmch_n == m_n_2->gmch_n &&
+		m_n_1->link_m == m_n_2->link_m &&
+		m_n_1->link_n == m_n_2->link_n;
+}
+
+static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state1,
+				       const struct intel_crtc_state *crtc_state2)
+{
+	return crtc_state1->hw.active && crtc_state2->hw.active &&
+		crtc_state1->output_types == crtc_state2->output_types &&
+		crtc_state1->output_format == crtc_state2->output_format &&
+		crtc_state1->lane_count == crtc_state2->lane_count &&
+		crtc_state1->port_clock == crtc_state2->port_clock &&
+		mode_equal(&crtc_state1->hw.adjusted_mode,
+			   &crtc_state2->hw.adjusted_mode) &&
+		m_n_equal(&crtc_state1->dp_m_n, &crtc_state2->dp_m_n);
+}
+
+static u8
+intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
+				int tile_group_id)
+{
+	struct drm_connector *connector;
+	struct drm_connector_state *conn_state;
+	struct drm_i915_private *dev_priv = to_i915(ref_crtc_state->uapi.crtc->dev);
+	struct intel_atomic_state *state =
+		to_intel_atomic_state(ref_crtc_state->uapi.state);
+	u8 transcoders = 0;
+	int i;
+
+	if (INTEL_GEN(dev_priv) < 11)
+		return 0;
+
+	if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))
+		return 0;
+
+	for_each_new_connector_in_state(&state->base, connector, conn_state, i) {
+		struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);
+		struct intel_crtc_state *crtc_state = NULL;
+
+		if (!crtc)
+			continue;
+
+		if (!(connector->has_tile &&
+		      connector->tile_group->id ==
+		      tile_group_id))
+			continue;
+
+		crtc_state = intel_atomic_get_new_crtc_state(state,
+							     crtc);
+		if (!crtcs_port_sync_compatible(ref_crtc_state,
+						crtc_state))
+			continue;
+
+		transcoders |= BIT(crtc_state->cpu_transcoder);
+	}
+
+	return transcoders;
+}
+
+static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
+					 struct intel_crtc_state *crtc_state,
+					 struct drm_connector_state *conn_state)
+{
+	struct drm_connector *connector = conn_state->connector;
+	u8 port_sync_transcoders = 0;
+
+	DRM_DEBUG_KMS("[ENCODER:%d:%s] [CRTC:%d:%s]",
+		      encoder->base.base.id, encoder->base.name,
+		      crtc_state->uapi.crtc->base.id, crtc_state->uapi.crtc->name);
+
+	if (connector->has_tile)
+		port_sync_transcoders = intel_ddi_port_sync_transcoders(crtc_state,
+									connector->tile_group->id);
+
+	/*
+	 * EDP Transcoders cannot be ensalved
+	 * make them a master always when present
+	 */
+	if (port_sync_transcoders & BIT(TRANSCODER_EDP))
+		crtc_state->master_transcoder = TRANSCODER_EDP;
+	else
+		crtc_state->master_transcoder = ffs(port_sync_transcoders) - 1;
+
+	if (crtc_state->master_transcoder == crtc_state->cpu_transcoder) {
+		crtc_state->master_transcoder = INVALID_TRANSCODER;
+		crtc_state->sync_mode_slaves_mask =
+			port_sync_transcoders & ~BIT(crtc_state->cpu_transcoder);
+	}
+
+	return 0;
+}
+
 static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
 {
 	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
@@ -4757,6 +4865,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
 	encoder->hotplug = intel_ddi_hotplug;
 	encoder->compute_output_type = intel_ddi_compute_output_type;
 	encoder->compute_config = intel_ddi_compute_config;
+	encoder->compute_config_late = intel_ddi_compute_config_late;
 	encoder->enable = intel_enable_ddi;
 	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
 	encoder->pre_enable = intel_ddi_pre_enable;
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2a2c9dd563e5..a943787167de 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12564,126 +12564,6 @@ static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state)
 	return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
 }
 
-static bool
-intel_atomic_is_master_connector(struct intel_crtc_state *crtc_state)
-{
-	struct drm_crtc *crtc = crtc_state->uapi.crtc;
-	struct drm_atomic_state *state = crtc_state->uapi.state;
-	struct drm_connector *connector;
-	struct drm_connector_state *connector_state;
-	int i;
-
-	for_each_new_connector_in_state(state, connector, connector_state, i) {
-		if (connector_state->crtc != crtc)
-			continue;
-		if (connector->has_tile &&
-		    connector->tile_h_loc == connector->num_h_tile - 1 &&
-		    connector->tile_v_loc == connector->num_v_tile - 1)
-			return true;
-	}
-
-	return false;
-}
-
-static void reset_port_sync_mode_state(struct intel_crtc_state *crtc_state)
-{
-	crtc_state->master_transcoder = INVALID_TRANSCODER;
-	crtc_state->sync_mode_slaves_mask = 0;
-}
-
-static int icl_compute_port_sync_crtc_state(struct drm_connector *connector,
-					    struct intel_crtc_state *crtc_state,
-					    int num_tiled_conns)
-{
-	struct drm_crtc *crtc = crtc_state->uapi.crtc;
-	struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
-	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
-	struct drm_connector *master_connector;
-	struct drm_connector_list_iter conn_iter;
-	struct drm_crtc *master_crtc = NULL;
-	struct drm_crtc_state *master_crtc_state;
-	struct intel_crtc_state *master_pipe_config;
-
-	if (INTEL_GEN(dev_priv) < 11)
-		return 0;
-
-	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))
-		return 0;
-
-	/*
-	 * In case of tiled displays there could be one or more slaves but there is
-	 * only one master. Lets make the CRTC used by the connector corresponding
-	 * to the last horizonal and last vertical tile a master/genlock CRTC.
-	 * All the other CRTCs corresponding to other tiles of the same Tile group
-	 * are the slave CRTCs and hold a pointer to their genlock CRTC.
-	 * If all tiles not present do not make master slave assignments.
-	 */
-	if (!connector->has_tile ||
-	    crtc_state->hw.mode.hdisplay != connector->tile_h_size ||
-	    crtc_state->hw.mode.vdisplay != connector->tile_v_size ||
-	    num_tiled_conns < connector->num_h_tile * connector->num_v_tile) {
-		reset_port_sync_mode_state(crtc_state);
-		return 0;
-	}
-	/* Last Horizontal and last vertical tile connector is a master
-	 * Master's crtc state is already populated in slave for port sync
-	 */
-	if (connector->tile_h_loc == connector->num_h_tile - 1 &&
-	    connector->tile_v_loc == connector->num_v_tile - 1)
-		return 0;
-
-	/* Loop through all connectors and configure the Slave crtc_state
-	 * to point to the correct master.
-	 */
-	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
-	drm_for_each_connector_iter(master_connector, &conn_iter) {
-		struct drm_connector_state *master_conn_state = NULL;
-
-		if (!(master_connector->has_tile &&
-		      master_connector->tile_group->id == connector->tile_group->id))
-			continue;
-		if (master_connector->tile_h_loc != master_connector->num_h_tile - 1 ||
-		    master_connector->tile_v_loc != master_connector->num_v_tile - 1)
-			continue;
-
-		master_conn_state = drm_atomic_get_connector_state(&state->base,
-								   master_connector);
-		if (IS_ERR(master_conn_state)) {
-			drm_connector_list_iter_end(&conn_iter);
-			return PTR_ERR(master_conn_state);
-		}
-		if (master_conn_state->crtc) {
-			master_crtc = master_conn_state->crtc;
-			break;
-		}
-	}
-	drm_connector_list_iter_end(&conn_iter);
-
-	if (!master_crtc) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "Could not find Master CRTC for Slave CRTC %d\n",
-			    crtc->base.id);
-		return -EINVAL;
-	}
-
-	master_crtc_state = drm_atomic_get_crtc_state(&state->base,
-						      master_crtc);
-	if (IS_ERR(master_crtc_state))
-		return PTR_ERR(master_crtc_state);
-
-	master_pipe_config = to_intel_crtc_state(master_crtc_state);
-	crtc_state->master_transcoder = master_pipe_config->cpu_transcoder;
-	master_pipe_config->sync_mode_slaves_mask |=
-		BIT(crtc_state->cpu_transcoder);
-	drm_dbg_kms(&dev_priv->drm,
-		    "Master Transcoder = %s added for Slave CRTC = %d, slave transcoder bitmask = %d\n",
-		    transcoder_name(crtc_state->master_transcoder),
-		    crtc->base.id,
-		    master_pipe_config->sync_mode_slaves_mask);
-
-	return 0;
-}
-
 static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state)
 {
 	const struct drm_display_mode *adjusted_mode =
@@ -13332,15 +13212,6 @@ intel_crtc_prepare_cleared_state(struct intel_crtc_state *crtc_state)
 	if (IS_G4X(dev_priv) ||
 	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
 		saved_state->wm = crtc_state->wm;
-	/*
-	 * Save the slave bitmask which gets filled for master crtc state during
-	 * slave atomic check call. For all other CRTCs reset the port sync variables
-	 * crtc_state->master_transcoder needs to be set to INVALID
-	 */
-	reset_port_sync_mode_state(saved_state);
-	if (intel_atomic_is_master_connector(crtc_state))
-		saved_state->sync_mode_slaves_mask =
-			crtc_state->sync_mode_slaves_mask;
 
 	memcpy(crtc_state, saved_state, sizeof(*crtc_state));
 	kfree(saved_state);
@@ -13358,8 +13229,7 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 	struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev);
 	struct drm_connector *connector;
 	struct drm_connector_state *connector_state;
-	int base_bpp, ret;
-	int i, tile_group_id = -1, num_tiled_conns = 0;
+	int base_bpp, ret, i;
 	bool retry = true;
 
 	pipe_config->cpu_transcoder =
@@ -13431,24 +13301,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 	drm_mode_set_crtcinfo(&pipe_config->hw.adjusted_mode,
 			      CRTC_STEREO_DOUBLE);
 
-	/* Get tile_group_id of tiled connector */
-	for_each_new_connector_in_state(state, connector, connector_state, i) {
-		if (connector_state->crtc == crtc &&
-		    connector->has_tile) {
-			tile_group_id = connector->tile_group->id;
-			break;
-		}
-	}
-
-	/* Get total number of tiled connectors in state that belong to
-	 * this tile group.
-	 */
-	for_each_new_connector_in_state(state, connector, connector_state, i) {
-		if (connector->has_tile &&
-		    connector->tile_group->id == tile_group_id)
-			num_tiled_conns++;
-	}
-
 	/* Pass our mode to the connectors and the CRTC to give them a chance to
 	 * adjust it according to limitations or connector properties, and also
 	 * a chance to reject the mode entirely.
@@ -13460,15 +13312,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
 		if (connector_state->crtc != crtc)
 			continue;
 
-		ret = icl_compute_port_sync_crtc_state(connector, pipe_config,
-						       num_tiled_conns);
-		if (ret) {
-			drm_dbg_kms(&i915->drm,
-				    "Cannot assign Sync Mode CRTCs: %d\n",
-				    ret);
-			return ret;
-		}
-
 		ret = encoder->compute_config(encoder, pipe_config,
 					      connector_state);
 		if (ret < 0) {
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset
  2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config() Manasi Navare
@ 2020-02-03  7:47 ` Manasi Navare
  2020-02-05 14:32   ` Ville Syrjälä
  2020-02-03  9:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late() Patchwork
                   ` (3 subsequent siblings)
  5 siblings, 1 reply; 12+ messages in thread
From: Manasi Navare @ 2020-02-03  7:47 UTC (permalink / raw)
  To: intel-gfx

If one of the synced crtcs needs a full modeset, we need
to make sure all the synced crtcs are forced a full
modeset.

v2:
* Add tiles based on cpu_trans check (Ville)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c |  85 -----------
 drivers/gpu/drm/i915/display/intel_dp.c      | 142 ++++++++++++++++++-
 2 files changed, 141 insertions(+), 86 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index a943787167de..6383d1287472 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14669,76 +14669,6 @@ static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
 	return false;
 }
 
-static int
-intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
-{
-	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-	struct drm_connector *connector;
-	struct drm_connector_list_iter conn_iter;
-	int ret = 0;
-
-	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
-	drm_for_each_connector_iter(connector, &conn_iter) {
-		struct drm_connector_state *conn_state;
-		struct drm_crtc_state *crtc_state;
-
-		if (!connector->has_tile ||
-		    connector->tile_group->id != tile_grp_id)
-			continue;
-		conn_state = drm_atomic_get_connector_state(&state->base,
-							    connector);
-		if (IS_ERR(conn_state)) {
-			ret =  PTR_ERR(conn_state);
-			break;
-		}
-
-		if (!conn_state->crtc)
-			continue;
-
-		crtc_state = drm_atomic_get_crtc_state(&state->base,
-						       conn_state->crtc);
-		if (IS_ERR(crtc_state)) {
-			ret = PTR_ERR(crtc_state);
-			break;
-		}
-		crtc_state->mode_changed = true;
-		ret = drm_atomic_add_affected_connectors(&state->base,
-							 conn_state->crtc);
-		if (ret)
-			break;
-	}
-	drm_connector_list_iter_end(&conn_iter);
-
-	return ret;
-}
-
-static int
-intel_atomic_check_tiled_conns(struct intel_atomic_state *state)
-{
-	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-	struct drm_connector *connector;
-	struct drm_connector_state *old_conn_state, *new_conn_state;
-	int i, ret;
-
-	if (INTEL_GEN(dev_priv) < 11)
-		return 0;
-
-	/* Is tiled, mark all other tiled CRTCs as needing a modeset */
-	for_each_oldnew_connector_in_state(&state->base, connector,
-					   old_conn_state, new_conn_state, i) {
-		if (!connector->has_tile)
-			continue;
-		if (!intel_connector_needs_modeset(state, connector))
-			continue;
-
-		ret = intel_modeset_all_tiles(state, connector->tile_group->id);
-		if (ret)
-			return ret;
-	}
-
-	return 0;
-}
-
 /**
  * intel_atomic_check - validate state object
  * @dev: drm device
@@ -14767,21 +14697,6 @@ static int intel_atomic_check(struct drm_device *dev,
 	if (ret)
 		goto fail;
 
-	/**
-	 * This check adds all the connectors in current state that belong to
-	 * the same tile group to a full modeset.
-	 * This function directly sets the mode_changed to true and we also call
-	 * drm_atomic_add_affected_connectors(). Hence we are not explicitly
-	 * calling drm_atomic_helper_check_modeset() after this.
-	 *
-	 * Fixme: Handle some corner cases where one of the
-	 * tiled connectors gets disconnected and tile info is lost but since it
-	 * was previously synced to other conn, we need to add that to the modeset.
-	 */
-	ret = intel_atomic_check_tiled_conns(state);
-	if (ret)
-		goto fail;
-
 	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
 					    new_crtc_state, i) {
 		if (!needs_modeset(new_crtc_state)) {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f4dede6253f8..07f0374d4409 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6582,6 +6582,146 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
 	}
 }
 
+static int intel_modeset_tile_group(struct intel_atomic_state *state,
+				    int tile_group_id)
+{
+	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+	struct drm_connector_list_iter conn_iter;
+	struct drm_connector *connector;
+	int ret = 0;
+
+	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
+	drm_for_each_connector_iter(connector, &conn_iter) {
+		struct drm_connector_state *conn_state;
+		struct intel_crtc_state *crtc_state;
+		struct intel_crtc *crtc;
+
+		if (!connector->has_tile ||
+		    connector->tile_group->id != tile_group_id)
+			continue;
+
+		conn_state = drm_atomic_get_connector_state(&state->base,
+							    connector);
+		if (IS_ERR(conn_state)) {
+			ret = PTR_ERR(conn_state);
+			break;
+		}
+
+		crtc = to_intel_crtc(conn_state->crtc);
+
+		if (!crtc)
+			continue;
+
+		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
+		if (IS_ERR(crtc_state)) {
+			ret = PTR_ERR(crtc_state);
+			break;
+		}
+
+		crtc_state->uapi.mode_changed = true;
+
+		ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
+		if (ret)
+			break;
+	}
+	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
+
+	return ret;
+}
+
+static int intel_modeset_affected_transcoders(struct intel_atomic_state *state, u8 transcoders)
+{
+	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+	struct intel_crtc *crtc;
+
+	if (transcoders == 0)
+		return 0;
+
+	for_each_intel_crtc(&dev_priv->drm, crtc) {
+		struct intel_crtc_state *crtc_state;
+		int ret;
+
+		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
+		if (IS_ERR(crtc_state))
+			return PTR_ERR(crtc_state);
+
+		if (!crtc_state->hw.enable)
+			continue;
+
+		if (!(transcoders & BIT(crtc_state->cpu_transcoder)))
+			continue;
+
+		crtc_state->uapi.mode_changed = true;
+
+		ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base);
+		if (ret)
+			return ret;
+
+		ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
+		if (ret)
+			return ret;
+
+		transcoders &= ~BIT(crtc_state->cpu_transcoder);
+	}
+
+	WARN_ON(transcoders != 0);
+
+	return 0;
+}
+
+static int intel_modeset_synced_crtcs(struct intel_atomic_state *state,
+				      struct drm_connector *connector)
+{
+	const struct drm_connector_state *old_conn_state =
+		drm_atomic_get_old_connector_state(&state->base, connector);
+	const struct intel_crtc_state *old_crtc_state;
+	struct intel_crtc *crtc;
+	u8 transcoders;
+
+	crtc = to_intel_crtc(old_conn_state->crtc);
+	if (!crtc)
+		return 0;
+
+	old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
+
+	if (!old_crtc_state->hw.active)
+		return 0;
+
+	transcoders = old_crtc_state->sync_mode_slaves_mask;
+	if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
+		transcoders |= BIT(old_crtc_state->master_transcoder);
+
+	return intel_modeset_affected_transcoders(state,
+						  transcoders &
+						  ~BIT(old_crtc_state->cpu_transcoder));
+}
+
+static int intel_dp_connector_atomic_check(struct drm_connector *conn,
+					   struct drm_atomic_state *_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(conn->dev);
+	struct intel_atomic_state *state = to_intel_atomic_state(_state);
+	int ret;
+
+	ret = intel_digital_connector_atomic_check(conn, &state->base);
+	if (ret)
+		return ret;
+
+	if (INTEL_GEN(dev_priv) < 11)
+		return 0;
+
+	if (!intel_connector_needs_modeset(state, conn))
+		return 0;
+
+	if (conn->has_tile) {
+		ret = intel_modeset_tile_group(state, conn->tile_group->id);
+		if (ret)
+			return ret;
+	}
+
+	return intel_modeset_synced_crtcs(state, conn);
+}
+
 static const struct drm_connector_funcs intel_dp_connector_funcs = {
 	.force = intel_dp_force,
 	.fill_modes = drm_helper_probe_single_connector_modes,
@@ -6598,7 +6738,7 @@ static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs =
 	.detect_ctx = intel_dp_detect,
 	.get_modes = intel_dp_get_modes,
 	.mode_valid = intel_dp_mode_valid,
-	.atomic_check = intel_digital_connector_atomic_check,
+	.atomic_check = intel_dp_connector_atomic_check,
 };
 
 static const struct drm_encoder_funcs intel_dp_enc_funcs = {
-- 
2.19.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
  2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config() Manasi Navare
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset Manasi Navare
@ 2020-02-03  9:05 ` Patchwork
  2020-02-03  9:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-02-03  9:05 UTC (permalink / raw)
  To: Manasi Navare; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
URL   : https://patchwork.freedesktop.org/series/72891/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
17cfa5f19e38 drm/i915: Introduce encoder->compute_config_late()
-:83: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#83: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:144:
+	int (*compute_config_late)(struct intel_encoder *,

-:83: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_crtc_state *' should also have an identifier name
#83: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:144:
+	int (*compute_config_late)(struct intel_encoder *,

-:83: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct drm_connector_state *' should also have an identifier name
#83: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:144:
+	int (*compute_config_late)(struct intel_encoder *,

total: 0 errors, 3 warnings, 0 checks, 60 lines checked
59036ac4423f drm/i915/dp: Compute port sync crtc states post compute_config()
4e5443593875 drm/i915/dp: Add all tiled and port sync conns to modeset

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
  2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
                   ` (2 preceding siblings ...)
  2020-02-03  9:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late() Patchwork
@ 2020-02-03  9:37 ` " Patchwork
  2020-02-05 15:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
  2020-02-14 11:18 ` [Intel-gfx] [PATCH v2 1/3] " Manasi Navare
  5 siblings, 0 replies; 12+ messages in thread
From: Patchwork @ 2020-02-03  9:37 UTC (permalink / raw)
  To: Manasi Navare; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
URL   : https://patchwork.freedesktop.org/series/72891/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7857 -> Patchwork_16387
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/index.html

Known issues
------------

  Here are the changes found in Patchwork_16387 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_blt:
    - fi-ivb-3770:        [PASS][1] -> [DMESG-FAIL][2] ([i915#725])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-byt-n2820:       [PASS][3] -> [DMESG-FAIL][4] ([i915#1052])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-guc:         [INCOMPLETE][5] ([fdo#106070] / [i915#424]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  
#### Warnings ####

  * igt@gem_exec_parallel@fds:
    - fi-byt-n2820:       [FAIL][7] ([i915#694]) -> [TIMEOUT][8] ([fdo#112271] / [i915#1084])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/fi-byt-n2820/igt@gem_exec_parallel@fds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/fi-byt-n2820/igt@gem_exec_parallel@fds.html

  
  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#112271]: https://bugs.freedesktop.org/show_bug.cgi?id=112271
  [i915#1052]: https://gitlab.freedesktop.org/drm/intel/issues/1052
  [i915#1084]: https://gitlab.freedesktop.org/drm/intel/issues/1084
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725


Participating hosts (47 -> 36)
------------------------------

  Additional (3): fi-skl-6770hq fi-bwr-2160 fi-bsw-nick 
  Missing    (14): fi-hsw-4200u fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-ilk-650 fi-kbl-7500u fi-whl-u fi-gdg-551 fi-cfl-8109u fi-skl-lmem fi-blb-e6850 fi-byt-clapper fi-bdw-samus fi-snb-2600 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7857 -> Patchwork_16387

  CI-20190529: 20190529
  CI_DRM_7857: 8ec40a15b9a930df9e445f17c5e01cdb6f80353a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5411: 86c6ab8a0b6696bdb2153febd350af7fa02fbb00 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16387: 4e5443593875f7b5c107caae700bd2e93d50ca3b @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

4e5443593875 drm/i915/dp: Add all tiled and port sync conns to modeset
59036ac4423f drm/i915/dp: Compute port sync crtc states post compute_config()
17cfa5f19e38 drm/i915: Introduce encoder->compute_config_late()

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config()
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config() Manasi Navare
@ 2020-02-05 14:25   ` Ville Syrjälä
  2020-02-10 11:05     ` Manasi Navare
  0 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2020-02-05 14:25 UTC (permalink / raw)
  To: Manasi Navare; +Cc: intel-gfx

On Sun, Feb 02, 2020 at 11:47:55PM -0800, Manasi Navare wrote:
> This patch pushes out the computation of master and slave
> transcoders in crtc states after encoder's compute_config hook.
> This ensures that the assigned master slave crtcs have exact same
> mode and timings which is a requirement for Port sync mode
> to be enabled.
> 
> v2:
> * Correct indentation
> * Rename to intel_ddi_port_sync_transcoders (Ville)
> * remove unwanted debug (Ville)
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     | 109 +++++++++++++
>  drivers/gpu/drm/i915/display/intel_display.c | 159 +------------------
>  2 files changed, 110 insertions(+), 158 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index aa066fb9eb00..eb970797cd68 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4448,6 +4448,114 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
>  	return 0;
>  }
>  
> +static bool mode_equal(const struct drm_display_mode *mode1,
> +		       const struct drm_display_mode *mode2)
> +{
> +	return drm_mode_match(mode1, mode2,
> +			      DRM_MODE_MATCH_TIMINGS |
> +			      DRM_MODE_MATCH_FLAGS |
> +			      DRM_MODE_MATCH_3D_FLAGS) &&
> +		mode1->clock == mode2->clock; /* we want an exact match */
> +}
> +
> +static bool m_n_equal(const struct intel_link_m_n *m_n_1,
> +		      const struct intel_link_m_n *m_n_2)
> +{
> +	return m_n_1->tu == m_n_2->tu &&
> +		m_n_1->gmch_m == m_n_2->gmch_m &&
> +		m_n_1->gmch_n == m_n_2->gmch_n &&
> +		m_n_1->link_m == m_n_2->link_m &&
> +		m_n_1->link_n == m_n_2->link_n;
> +}
> +
> +static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state1,
> +				       const struct intel_crtc_state *crtc_state2)
> +{
> +	return crtc_state1->hw.active && crtc_state2->hw.active &&
> +		crtc_state1->output_types == crtc_state2->output_types &&
> +		crtc_state1->output_format == crtc_state2->output_format &&
> +		crtc_state1->lane_count == crtc_state2->lane_count &&
> +		crtc_state1->port_clock == crtc_state2->port_clock &&
> +		mode_equal(&crtc_state1->hw.adjusted_mode,
> +			   &crtc_state2->hw.adjusted_mode) &&
> +		m_n_equal(&crtc_state1->dp_m_n, &crtc_state2->dp_m_n);
> +}
> +
> +static u8
> +intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
> +				int tile_group_id)
> +{
> +	struct drm_connector *connector;
> +	struct drm_connector_state *conn_state;

Can be const

> +	struct drm_i915_private *dev_priv = to_i915(ref_crtc_state->uapi.crtc->dev);
> +	struct intel_atomic_state *state =
> +		to_intel_atomic_state(ref_crtc_state->uapi.state);
> +	u8 transcoders = 0;
> +	int i;
> +
> +	if (INTEL_GEN(dev_priv) < 11)
> +		return 0;
> +
> +	if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))
> +		return 0;
> +
> +	for_each_new_connector_in_state(&state->base, connector, conn_state, i) {
> +		struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);
> +		struct intel_crtc_state *crtc_state = NULL;

Can be const

Pointless NULL initialization.

> +
> +		if (!crtc)
> +			continue;
> +
> +		if (!(connector->has_tile &&
> +		      connector->tile_group->id ==
> +		      tile_group_id))

I'd write that as 
if (!has_tile || id != group_id)

Looks like some pointless newlines in there. Makes it look a bit ugly.

Otherwise lgtm
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +			continue;
> +
> +		crtc_state = intel_atomic_get_new_crtc_state(state,
> +							     crtc);
> +		if (!crtcs_port_sync_compatible(ref_crtc_state,
> +						crtc_state))
> +			continue;
> +
> +		transcoders |= BIT(crtc_state->cpu_transcoder);
> +	}
> +
> +	return transcoders;
> +}
> +
> +static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
> +					 struct intel_crtc_state *crtc_state,
> +					 struct drm_connector_state *conn_state)
> +{
> +	struct drm_connector *connector = conn_state->connector;
> +	u8 port_sync_transcoders = 0;
> +
> +	DRM_DEBUG_KMS("[ENCODER:%d:%s] [CRTC:%d:%s]",
> +		      encoder->base.base.id, encoder->base.name,
> +		      crtc_state->uapi.crtc->base.id, crtc_state->uapi.crtc->name);
> +
> +	if (connector->has_tile)
> +		port_sync_transcoders = intel_ddi_port_sync_transcoders(crtc_state,
> +									connector->tile_group->id);
> +
> +	/*
> +	 * EDP Transcoders cannot be ensalved
> +	 * make them a master always when present
> +	 */
> +	if (port_sync_transcoders & BIT(TRANSCODER_EDP))
> +		crtc_state->master_transcoder = TRANSCODER_EDP;
> +	else
> +		crtc_state->master_transcoder = ffs(port_sync_transcoders) - 1;
> +
> +	if (crtc_state->master_transcoder == crtc_state->cpu_transcoder) {
> +		crtc_state->master_transcoder = INVALID_TRANSCODER;
> +		crtc_state->sync_mode_slaves_mask =
> +			port_sync_transcoders & ~BIT(crtc_state->cpu_transcoder);
> +	}
> +
> +	return 0;
> +}
> +
>  static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
>  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> @@ -4757,6 +4865,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
>  	encoder->hotplug = intel_ddi_hotplug;
>  	encoder->compute_output_type = intel_ddi_compute_output_type;
>  	encoder->compute_config = intel_ddi_compute_config;
> +	encoder->compute_config_late = intel_ddi_compute_config_late;
>  	encoder->enable = intel_enable_ddi;
>  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
>  	encoder->pre_enable = intel_ddi_pre_enable;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 2a2c9dd563e5..a943787167de 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -12564,126 +12564,6 @@ static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state)
>  	return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
>  }
>  
> -static bool
> -intel_atomic_is_master_connector(struct intel_crtc_state *crtc_state)
> -{
> -	struct drm_crtc *crtc = crtc_state->uapi.crtc;
> -	struct drm_atomic_state *state = crtc_state->uapi.state;
> -	struct drm_connector *connector;
> -	struct drm_connector_state *connector_state;
> -	int i;
> -
> -	for_each_new_connector_in_state(state, connector, connector_state, i) {
> -		if (connector_state->crtc != crtc)
> -			continue;
> -		if (connector->has_tile &&
> -		    connector->tile_h_loc == connector->num_h_tile - 1 &&
> -		    connector->tile_v_loc == connector->num_v_tile - 1)
> -			return true;
> -	}
> -
> -	return false;
> -}
> -
> -static void reset_port_sync_mode_state(struct intel_crtc_state *crtc_state)
> -{
> -	crtc_state->master_transcoder = INVALID_TRANSCODER;
> -	crtc_state->sync_mode_slaves_mask = 0;
> -}
> -
> -static int icl_compute_port_sync_crtc_state(struct drm_connector *connector,
> -					    struct intel_crtc_state *crtc_state,
> -					    int num_tiled_conns)
> -{
> -	struct drm_crtc *crtc = crtc_state->uapi.crtc;
> -	struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
> -	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> -	struct drm_connector *master_connector;
> -	struct drm_connector_list_iter conn_iter;
> -	struct drm_crtc *master_crtc = NULL;
> -	struct drm_crtc_state *master_crtc_state;
> -	struct intel_crtc_state *master_pipe_config;
> -
> -	if (INTEL_GEN(dev_priv) < 11)
> -		return 0;
> -
> -	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))
> -		return 0;
> -
> -	/*
> -	 * In case of tiled displays there could be one or more slaves but there is
> -	 * only one master. Lets make the CRTC used by the connector corresponding
> -	 * to the last horizonal and last vertical tile a master/genlock CRTC.
> -	 * All the other CRTCs corresponding to other tiles of the same Tile group
> -	 * are the slave CRTCs and hold a pointer to their genlock CRTC.
> -	 * If all tiles not present do not make master slave assignments.
> -	 */
> -	if (!connector->has_tile ||
> -	    crtc_state->hw.mode.hdisplay != connector->tile_h_size ||
> -	    crtc_state->hw.mode.vdisplay != connector->tile_v_size ||
> -	    num_tiled_conns < connector->num_h_tile * connector->num_v_tile) {
> -		reset_port_sync_mode_state(crtc_state);
> -		return 0;
> -	}
> -	/* Last Horizontal and last vertical tile connector is a master
> -	 * Master's crtc state is already populated in slave for port sync
> -	 */
> -	if (connector->tile_h_loc == connector->num_h_tile - 1 &&
> -	    connector->tile_v_loc == connector->num_v_tile - 1)
> -		return 0;
> -
> -	/* Loop through all connectors and configure the Slave crtc_state
> -	 * to point to the correct master.
> -	 */
> -	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> -	drm_for_each_connector_iter(master_connector, &conn_iter) {
> -		struct drm_connector_state *master_conn_state = NULL;
> -
> -		if (!(master_connector->has_tile &&
> -		      master_connector->tile_group->id == connector->tile_group->id))
> -			continue;
> -		if (master_connector->tile_h_loc != master_connector->num_h_tile - 1 ||
> -		    master_connector->tile_v_loc != master_connector->num_v_tile - 1)
> -			continue;
> -
> -		master_conn_state = drm_atomic_get_connector_state(&state->base,
> -								   master_connector);
> -		if (IS_ERR(master_conn_state)) {
> -			drm_connector_list_iter_end(&conn_iter);
> -			return PTR_ERR(master_conn_state);
> -		}
> -		if (master_conn_state->crtc) {
> -			master_crtc = master_conn_state->crtc;
> -			break;
> -		}
> -	}
> -	drm_connector_list_iter_end(&conn_iter);
> -
> -	if (!master_crtc) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "Could not find Master CRTC for Slave CRTC %d\n",
> -			    crtc->base.id);
> -		return -EINVAL;
> -	}
> -
> -	master_crtc_state = drm_atomic_get_crtc_state(&state->base,
> -						      master_crtc);
> -	if (IS_ERR(master_crtc_state))
> -		return PTR_ERR(master_crtc_state);
> -
> -	master_pipe_config = to_intel_crtc_state(master_crtc_state);
> -	crtc_state->master_transcoder = master_pipe_config->cpu_transcoder;
> -	master_pipe_config->sync_mode_slaves_mask |=
> -		BIT(crtc_state->cpu_transcoder);
> -	drm_dbg_kms(&dev_priv->drm,
> -		    "Master Transcoder = %s added for Slave CRTC = %d, slave transcoder bitmask = %d\n",
> -		    transcoder_name(crtc_state->master_transcoder),
> -		    crtc->base.id,
> -		    master_pipe_config->sync_mode_slaves_mask);
> -
> -	return 0;
> -}
> -
>  static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state)
>  {
>  	const struct drm_display_mode *adjusted_mode =
> @@ -13332,15 +13212,6 @@ intel_crtc_prepare_cleared_state(struct intel_crtc_state *crtc_state)
>  	if (IS_G4X(dev_priv) ||
>  	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
>  		saved_state->wm = crtc_state->wm;
> -	/*
> -	 * Save the slave bitmask which gets filled for master crtc state during
> -	 * slave atomic check call. For all other CRTCs reset the port sync variables
> -	 * crtc_state->master_transcoder needs to be set to INVALID
> -	 */
> -	reset_port_sync_mode_state(saved_state);
> -	if (intel_atomic_is_master_connector(crtc_state))
> -		saved_state->sync_mode_slaves_mask =
> -			crtc_state->sync_mode_slaves_mask;
>  
>  	memcpy(crtc_state, saved_state, sizeof(*crtc_state));
>  	kfree(saved_state);
> @@ -13358,8 +13229,7 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
>  	struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev);
>  	struct drm_connector *connector;
>  	struct drm_connector_state *connector_state;
> -	int base_bpp, ret;
> -	int i, tile_group_id = -1, num_tiled_conns = 0;
> +	int base_bpp, ret, i;
>  	bool retry = true;
>  
>  	pipe_config->cpu_transcoder =
> @@ -13431,24 +13301,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
>  	drm_mode_set_crtcinfo(&pipe_config->hw.adjusted_mode,
>  			      CRTC_STEREO_DOUBLE);
>  
> -	/* Get tile_group_id of tiled connector */
> -	for_each_new_connector_in_state(state, connector, connector_state, i) {
> -		if (connector_state->crtc == crtc &&
> -		    connector->has_tile) {
> -			tile_group_id = connector->tile_group->id;
> -			break;
> -		}
> -	}
> -
> -	/* Get total number of tiled connectors in state that belong to
> -	 * this tile group.
> -	 */
> -	for_each_new_connector_in_state(state, connector, connector_state, i) {
> -		if (connector->has_tile &&
> -		    connector->tile_group->id == tile_group_id)
> -			num_tiled_conns++;
> -	}
> -
>  	/* Pass our mode to the connectors and the CRTC to give them a chance to
>  	 * adjust it according to limitations or connector properties, and also
>  	 * a chance to reject the mode entirely.
> @@ -13460,15 +13312,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
>  		if (connector_state->crtc != crtc)
>  			continue;
>  
> -		ret = icl_compute_port_sync_crtc_state(connector, pipe_config,
> -						       num_tiled_conns);
> -		if (ret) {
> -			drm_dbg_kms(&i915->drm,
> -				    "Cannot assign Sync Mode CRTCs: %d\n",
> -				    ret);
> -			return ret;
> -		}
> -
>  		ret = encoder->compute_config(encoder, pipe_config,
>  					      connector_state);
>  		if (ret < 0) {
> -- 
> 2.19.1

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset
  2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset Manasi Navare
@ 2020-02-05 14:32   ` Ville Syrjälä
  2020-02-10 11:03     ` Manasi Navare
  0 siblings, 1 reply; 12+ messages in thread
From: Ville Syrjälä @ 2020-02-05 14:32 UTC (permalink / raw)
  To: Manasi Navare; +Cc: intel-gfx

On Sun, Feb 02, 2020 at 11:47:56PM -0800, Manasi Navare wrote:
> If one of the synced crtcs needs a full modeset, we need
> to make sure all the synced crtcs are forced a full
> modeset.
> 
> v2:
> * Add tiles based on cpu_trans check (Ville)
> 
> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c |  85 -----------
>  drivers/gpu/drm/i915/display/intel_dp.c      | 142 ++++++++++++++++++-
>  2 files changed, 141 insertions(+), 86 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index a943787167de..6383d1287472 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14669,76 +14669,6 @@ static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
>  	return false;
>  }
>  
> -static int
> -intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
> -{
> -	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -	struct drm_connector *connector;
> -	struct drm_connector_list_iter conn_iter;
> -	int ret = 0;
> -
> -	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> -	drm_for_each_connector_iter(connector, &conn_iter) {
> -		struct drm_connector_state *conn_state;
> -		struct drm_crtc_state *crtc_state;
> -
> -		if (!connector->has_tile ||
> -		    connector->tile_group->id != tile_grp_id)
> -			continue;
> -		conn_state = drm_atomic_get_connector_state(&state->base,
> -							    connector);
> -		if (IS_ERR(conn_state)) {
> -			ret =  PTR_ERR(conn_state);
> -			break;
> -		}
> -
> -		if (!conn_state->crtc)
> -			continue;
> -
> -		crtc_state = drm_atomic_get_crtc_state(&state->base,
> -						       conn_state->crtc);
> -		if (IS_ERR(crtc_state)) {
> -			ret = PTR_ERR(crtc_state);
> -			break;
> -		}
> -		crtc_state->mode_changed = true;
> -		ret = drm_atomic_add_affected_connectors(&state->base,
> -							 conn_state->crtc);
> -		if (ret)
> -			break;
> -	}
> -	drm_connector_list_iter_end(&conn_iter);
> -
> -	return ret;
> -}
> -
> -static int
> -intel_atomic_check_tiled_conns(struct intel_atomic_state *state)
> -{
> -	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -	struct drm_connector *connector;
> -	struct drm_connector_state *old_conn_state, *new_conn_state;
> -	int i, ret;
> -
> -	if (INTEL_GEN(dev_priv) < 11)
> -		return 0;
> -
> -	/* Is tiled, mark all other tiled CRTCs as needing a modeset */
> -	for_each_oldnew_connector_in_state(&state->base, connector,
> -					   old_conn_state, new_conn_state, i) {
> -		if (!connector->has_tile)
> -			continue;
> -		if (!intel_connector_needs_modeset(state, connector))
> -			continue;
> -
> -		ret = intel_modeset_all_tiles(state, connector->tile_group->id);
> -		if (ret)
> -			return ret;
> -	}
> -
> -	return 0;
> -}
> -
>  /**
>   * intel_atomic_check - validate state object
>   * @dev: drm device
> @@ -14767,21 +14697,6 @@ static int intel_atomic_check(struct drm_device *dev,
>  	if (ret)
>  		goto fail;
>  
> -	/**
> -	 * This check adds all the connectors in current state that belong to
> -	 * the same tile group to a full modeset.
> -	 * This function directly sets the mode_changed to true and we also call
> -	 * drm_atomic_add_affected_connectors(). Hence we are not explicitly
> -	 * calling drm_atomic_helper_check_modeset() after this.
> -	 *
> -	 * Fixme: Handle some corner cases where one of the
> -	 * tiled connectors gets disconnected and tile info is lost but since it
> -	 * was previously synced to other conn, we need to add that to the modeset.
> -	 */
> -	ret = intel_atomic_check_tiled_conns(state);
> -	if (ret)
> -		goto fail;
> -
>  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
>  					    new_crtc_state, i) {
>  		if (!needs_modeset(new_crtc_state)) {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f4dede6253f8..07f0374d4409 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6582,6 +6582,146 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
>  	}
>  }
>  
> +static int intel_modeset_tile_group(struct intel_atomic_state *state,
> +				    int tile_group_id)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> +	struct drm_connector_list_iter conn_iter;
> +	struct drm_connector *connector;
> +	int ret = 0;
> +
> +	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> +	drm_for_each_connector_iter(connector, &conn_iter) {
> +		struct drm_connector_state *conn_state;
> +		struct intel_crtc_state *crtc_state;
> +		struct intel_crtc *crtc;
> +
> +		if (!connector->has_tile ||
> +		    connector->tile_group->id != tile_group_id)
> +			continue;
> +
> +		conn_state = drm_atomic_get_connector_state(&state->base,
> +							    connector);
> +		if (IS_ERR(conn_state)) {
> +			ret = PTR_ERR(conn_state);
> +			break;
> +		}
> +
> +		crtc = to_intel_crtc(conn_state->crtc);
> +
> +		if (!crtc)
> +			continue;
> +
> +		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);

I think this could just be get_new_crtc_state() since
drm_atomic_get_connector_state() should have added the
connector's crtc already to the state. Which would let us
get rid of the error handling here.

> +		if (IS_ERR(crtc_state)) {
> +			ret = PTR_ERR(crtc_state);
> +			break;
> +		}
> +
> +		crtc_state->uapi.mode_changed = true;
> +
> +		ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
> +		if (ret)
> +			break;
> +	}
> +	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> +
> +	return ret;
> +}
> +
> +static int intel_modeset_affected_transcoders(struct intel_atomic_state *state, u8 transcoders)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> +	struct intel_crtc *crtc;
> +
> +	if (transcoders == 0)
> +		return 0;
> +
> +	for_each_intel_crtc(&dev_priv->drm, crtc) {
> +		struct intel_crtc_state *crtc_state;
> +		int ret;
> +
> +		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> +		if (IS_ERR(crtc_state))
> +			return PTR_ERR(crtc_state);
> +
> +		if (!crtc_state->hw.enable)
> +			continue;
> +
> +		if (!(transcoders & BIT(crtc_state->cpu_transcoder)))
> +			continue;
> +
> +		crtc_state->uapi.mode_changed = true;
> +
> +		ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base);
> +		if (ret)
> +			return ret;
> +
> +		ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
> +		if (ret)
> +			return ret;
> +
> +		transcoders &= ~BIT(crtc_state->cpu_transcoder);
> +	}
> +
> +	WARN_ON(transcoders != 0);
> +
> +	return 0;
> +}
> +
> +static int intel_modeset_synced_crtcs(struct intel_atomic_state *state,
> +				      struct drm_connector *connector)
> +{
> +	const struct drm_connector_state *old_conn_state =
> +		drm_atomic_get_old_connector_state(&state->base, connector);
> +	const struct intel_crtc_state *old_crtc_state;
> +	struct intel_crtc *crtc;
> +	u8 transcoders;
> +
> +	crtc = to_intel_crtc(old_conn_state->crtc);
> +	if (!crtc)
> +		return 0;
> +
> +	old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
> +
> +	if (!old_crtc_state->hw.active)
> +		return 0;
> +
> +	transcoders = old_crtc_state->sync_mode_slaves_mask;
> +	if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
> +		transcoders |= BIT(old_crtc_state->master_transcoder);
> +
> +	return intel_modeset_affected_transcoders(state,
> +						  transcoders &
> +						  ~BIT(old_crtc_state->cpu_transcoder));

As I said in the previous review cycle the '&~BIT(cpu_trans)' should
be a nop. So can just drop it.

Otherwise
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> +}
> +
> +static int intel_dp_connector_atomic_check(struct drm_connector *conn,
> +					   struct drm_atomic_state *_state)
> +{
> +	struct drm_i915_private *dev_priv = to_i915(conn->dev);
> +	struct intel_atomic_state *state = to_intel_atomic_state(_state);
> +	int ret;
> +
> +	ret = intel_digital_connector_atomic_check(conn, &state->base);
> +	if (ret)
> +		return ret;
> +
> +	if (INTEL_GEN(dev_priv) < 11)
> +		return 0;
> +
> +	if (!intel_connector_needs_modeset(state, conn))
> +		return 0;
> +
> +	if (conn->has_tile) {
> +		ret = intel_modeset_tile_group(state, conn->tile_group->id);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return intel_modeset_synced_crtcs(state, conn);
> +}
> +
>  static const struct drm_connector_funcs intel_dp_connector_funcs = {
>  	.force = intel_dp_force,
>  	.fill_modes = drm_helper_probe_single_connector_modes,
> @@ -6598,7 +6738,7 @@ static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs =
>  	.detect_ctx = intel_dp_detect,
>  	.get_modes = intel_dp_get_modes,
>  	.mode_valid = intel_dp_mode_valid,
> -	.atomic_check = intel_digital_connector_atomic_check,
> +	.atomic_check = intel_dp_connector_atomic_check,
>  };
>  
>  static const struct drm_encoder_funcs intel_dp_enc_funcs = {
> -- 
> 2.19.1

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
  2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
                   ` (3 preceding siblings ...)
  2020-02-03  9:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-02-05 15:19 ` " Patchwork
  2020-02-10 11:00   ` Manasi Navare
  2020-02-14 11:18 ` [Intel-gfx] [PATCH v2 1/3] " Manasi Navare
  5 siblings, 1 reply; 12+ messages in thread
From: Patchwork @ 2020-02-05 15:19 UTC (permalink / raw)
  To: Manasi Navare; +Cc: intel-gfx

== Series Details ==

Series: series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
URL   : https://patchwork.freedesktop.org/series/72891/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7857_full -> Patchwork_16387_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_16387_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_16387_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_16387_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_await@wide-contexts:
    - shard-skl:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@gem_exec_await@wide-contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl4/igt@gem_exec_await@wide-contexts.html

  * igt@gem_exec_schedule@semaphore-codependency:
    - shard-kbl:          [PASS][3] -> [TIMEOUT][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl4/igt@gem_exec_schedule@semaphore-codependency.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl1/igt@gem_exec_schedule@semaphore-codependency.html

  * igt@runner@aborted:
    - shard-kbl:          NOTRUN -> [FAIL][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl1/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_16387_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [PASS][6] -> [SKIP][7] ([fdo#112080]) +9 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@gem_busy@busy-vcs1.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb7/igt@gem_busy@busy-vcs1.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [PASS][8] -> [SKIP][9] ([fdo#109276]) +16 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@pi-distinct-iova-bsd:
    - shard-iclb:         [PASS][10] -> [SKIP][11] ([i915#677])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#112146]) +3 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          [PASS][14] -> [DMESG-WARN][15] ([i915#180]) +2 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl3/igt@gem_softpin@noreloc-s3.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-apl4/igt@gem_softpin@noreloc-s3.html

  * igt@kms_color@pipe-a-ctm-0-5:
    - shard-skl:          [PASS][16] -> [DMESG-WARN][17] ([i915#109])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl5/igt@kms_color@pipe-a-ctm-0-5.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html

  * igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled:
    - shard-skl:          [PASS][18] -> [FAIL][19] ([i915#52] / [i915#54])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [PASS][20] -> [INCOMPLETE][21] ([i915#221])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl10/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
    - shard-skl:          [PASS][22] -> [FAIL][23] ([i915#49]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
    - shard-skl:          [PASS][24] -> [FAIL][25] ([fdo#108145]) +1 similar issue
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][26] -> [FAIL][27] ([fdo#108145] / [i915#265])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][28] -> [FAIL][29] ([i915#173])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb3/igt@kms_psr@no_drrs.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [PASS][30] -> [SKIP][31] ([fdo#109441]) +1 similar issue
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@kms_psr@psr2_no_drrs.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][32] -> [FAIL][33] ([i915#31])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl7/igt@kms_setmode@basic.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-apl2/igt@kms_setmode@basic.html
    - shard-skl:          [PASS][34] -> [FAIL][35] ([i915#31])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_setmode@basic.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-kbl:          [PASS][36] -> [DMESG-WARN][37] ([i915#180]) +6 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Possible fixes ####

  * igt@gem_exec_reloc@basic-write-cpu-active:
    - shard-skl:          [DMESG-WARN][38] ([i915#109]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@gem_exec_reloc@basic-write-cpu-active.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@gem_exec_reloc@basic-write-cpu-active.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [SKIP][40] ([fdo#112146]) -> [PASS][41] +2 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@gem_exec_schedule@in-order-bsd.html

  * igt@gem_exec_schedule@pi-userfault-bsd:
    - shard-iclb:         [SKIP][42] ([i915#677]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@gem_exec_schedule@pi-userfault-bsd.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb7/igt@gem_exec_schedule@pi-userfault-bsd.html

  * igt@gem_exec_schedule@promotion-bsd1:
    - shard-iclb:         [SKIP][44] ([fdo#109276]) -> [PASS][45] +14 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@gem_exec_schedule@promotion-bsd1.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html

  * igt@gem_partial_pwrite_pread@reads-display:
    - shard-hsw:          [FAIL][46] ([i915#694]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw7/igt@gem_partial_pwrite_pread@reads-display.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-hsw2/igt@gem_partial_pwrite_pread@reads-display.html

  * igt@i915_selftest@live_blt:
    - shard-hsw:          [DMESG-FAIL][48] ([i915#770]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw1/igt@i915_selftest@live_blt.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-hsw5/igt@i915_selftest@live_blt.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [DMESG-WARN][50] ([i915#180]) -> [PASS][51] +1 similar issue
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl6/igt@i915_suspend@sysfs-reader.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-apl2/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [DMESG-WARN][52] ([i915#180]) -> [PASS][53] +6 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_flip@plain-flip-fb-recreate:
    - shard-skl:          [FAIL][54] ([i915#34]) -> [PASS][55]
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@kms_flip@plain-flip-fb-recreate.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl8/igt@kms_flip@plain-flip-fb-recreate.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-tglb:         [SKIP][56] ([i915#668]) -> [PASS][57] +3 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][58] ([fdo#108145] / [i915#265]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][60] ([fdo#109441]) -> [PASS][61] +1 similar issue
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
    - shard-skl:          [INCOMPLETE][62] ([i915#69]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html

  * igt@perf_pmu@busy-no-semaphores-vcs1:
    - shard-iclb:         [SKIP][64] ([fdo#112080]) -> [PASS][65] +15 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][66] ([IGT#28]) -> [SKIP][67] ([fdo#112080])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         [FAIL][68] ([i915#454]) -> [SKIP][69] ([i915#468])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb3/igt@i915_pm_dc@dc6-psr.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-tglb2/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rpm@legacy-planes:
    - shard-snb:          [INCOMPLETE][70] ([i915#82]) -> [SKIP][71] ([fdo#109271])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-snb6/igt@i915_pm_rpm@legacy-planes.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-snb2/igt@i915_pm_rpm@legacy-planes.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-tglb:         [SKIP][72] ([fdo#111825]) -> [INCOMPLETE][73] ([i915#472])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu.html

  
  [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
  [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
  [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
  [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
  [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
  [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
  [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
  [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
  [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
  [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
  [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7857 -> Patchwork_16387

  CI-20190529: 20190529
  CI_DRM_7857: 8ec40a15b9a930df9e445f17c5e01cdb6f80353a @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5411: 86c6ab8a0b6696bdb2153febd350af7fa02fbb00 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_16387: 4e5443593875f7b5c107caae700bd2e93d50ca3b @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx]  ✗ Fi.CI.IGT: failure for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
  2020-02-05 15:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-02-10 11:00   ` Manasi Navare
  0 siblings, 0 replies; 12+ messages in thread
From: Manasi Navare @ 2020-02-10 11:00 UTC (permalink / raw)
  To: intel-gfx

The failed test cases are not related to any changes in this patch

Mansi

On Wed, Feb 05, 2020 at 03:19:24PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late()
> URL   : https://patchwork.freedesktop.org/series/72891/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_7857_full -> Patchwork_16387_full
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_16387_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_16387_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_16387_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@gem_exec_await@wide-contexts:
>     - shard-skl:          [PASS][1] -> [TIMEOUT][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@gem_exec_await@wide-contexts.html
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl4/igt@gem_exec_await@wide-contexts.html
> 
>   * igt@gem_exec_schedule@semaphore-codependency:
>     - shard-kbl:          [PASS][3] -> [TIMEOUT][4]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl4/igt@gem_exec_schedule@semaphore-codependency.html
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl1/igt@gem_exec_schedule@semaphore-codependency.html
> 
>   * igt@runner@aborted:
>     - shard-kbl:          NOTRUN -> [FAIL][5]
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl1/igt@runner@aborted.html
> 
>   
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_16387_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_busy@busy-vcs1:
>     - shard-iclb:         [PASS][6] -> [SKIP][7] ([fdo#112080]) +9 similar issues
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@gem_busy@busy-vcs1.html
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb7/igt@gem_busy@busy-vcs1.html
> 
>   * igt@gem_exec_schedule@out-order-bsd2:
>     - shard-iclb:         [PASS][8] -> [SKIP][9] ([fdo#109276]) +16 similar issues
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html
> 
>   * igt@gem_exec_schedule@pi-distinct-iova-bsd:
>     - shard-iclb:         [PASS][10] -> [SKIP][11] ([i915#677])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb7/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb4/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
> 
>   * igt@gem_exec_schedule@reorder-wide-bsd:
>     - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#112146]) +3 similar issues
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
> 
>   * igt@gem_softpin@noreloc-s3:
>     - shard-apl:          [PASS][14] -> [DMESG-WARN][15] ([i915#180]) +2 similar issues
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl3/igt@gem_softpin@noreloc-s3.html
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-apl4/igt@gem_softpin@noreloc-s3.html
> 
>   * igt@kms_color@pipe-a-ctm-0-5:
>     - shard-skl:          [PASS][16] -> [DMESG-WARN][17] ([i915#109])
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl5/igt@kms_color@pipe-a-ctm-0-5.html
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl9/igt@kms_color@pipe-a-ctm-0-5.html
> 
>   * igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled:
>     - shard-skl:          [PASS][18] -> [FAIL][19] ([i915#52] / [i915#54])
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-blt-ytiled.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible:
>     - shard-skl:          [PASS][20] -> [INCOMPLETE][21] ([i915#221])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl10/igt@kms_flip@flip-vs-suspend-interruptible.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
>     - shard-skl:          [PASS][22] -> [FAIL][23] ([i915#49]) +1 similar issue
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
>     - shard-skl:          [PASS][24] -> [FAIL][25] ([fdo#108145]) +1 similar issue
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
> 
>   * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
>     - shard-skl:          [PASS][26] -> [FAIL][27] ([fdo#108145] / [i915#265])
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
> 
>   * igt@kms_psr@no_drrs:
>     - shard-iclb:         [PASS][28] -> [FAIL][29] ([i915#173])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb3/igt@kms_psr@no_drrs.html
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb1/igt@kms_psr@no_drrs.html
> 
>   * igt@kms_psr@psr2_no_drrs:
>     - shard-iclb:         [PASS][30] -> [SKIP][31] ([fdo#109441]) +1 similar issue
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@kms_psr@psr2_no_drrs.html
> 
>   * igt@kms_setmode@basic:
>     - shard-apl:          [PASS][32] -> [FAIL][33] ([i915#31])
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl7/igt@kms_setmode@basic.html
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-apl2/igt@kms_setmode@basic.html
>     - shard-skl:          [PASS][34] -> [FAIL][35] ([i915#31])
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@kms_setmode@basic.html
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@kms_setmode@basic.html
> 
>   * igt@kms_vblank@pipe-a-ts-continuation-suspend:
>     - shard-kbl:          [PASS][36] -> [DMESG-WARN][37] ([i915#180]) +6 similar issues
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_exec_reloc@basic-write-cpu-active:
>     - shard-skl:          [DMESG-WARN][38] ([i915#109]) -> [PASS][39]
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl2/igt@gem_exec_reloc@basic-write-cpu-active.html
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl5/igt@gem_exec_reloc@basic-write-cpu-active.html
> 
>   * igt@gem_exec_schedule@in-order-bsd:
>     - shard-iclb:         [SKIP][40] ([fdo#112146]) -> [PASS][41] +2 similar issues
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@gem_exec_schedule@in-order-bsd.html
> 
>   * igt@gem_exec_schedule@pi-userfault-bsd:
>     - shard-iclb:         [SKIP][42] ([i915#677]) -> [PASS][43]
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb4/igt@gem_exec_schedule@pi-userfault-bsd.html
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb7/igt@gem_exec_schedule@pi-userfault-bsd.html
> 
>   * igt@gem_exec_schedule@promotion-bsd1:
>     - shard-iclb:         [SKIP][44] ([fdo#109276]) -> [PASS][45] +14 similar issues
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@gem_exec_schedule@promotion-bsd1.html
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html
> 
>   * igt@gem_partial_pwrite_pread@reads-display:
>     - shard-hsw:          [FAIL][46] ([i915#694]) -> [PASS][47]
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw7/igt@gem_partial_pwrite_pread@reads-display.html
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-hsw2/igt@gem_partial_pwrite_pread@reads-display.html
> 
>   * igt@i915_selftest@live_blt:
>     - shard-hsw:          [DMESG-FAIL][48] ([i915#770]) -> [PASS][49]
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-hsw1/igt@i915_selftest@live_blt.html
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-hsw5/igt@i915_selftest@live_blt.html
> 
>   * igt@i915_suspend@sysfs-reader:
>     - shard-apl:          [DMESG-WARN][50] ([i915#180]) -> [PASS][51] +1 similar issue
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-apl6/igt@i915_suspend@sysfs-reader.html
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-apl2/igt@i915_suspend@sysfs-reader.html
> 
>   * igt@kms_cursor_crc@pipe-a-cursor-suspend:
>     - shard-kbl:          [DMESG-WARN][52] ([i915#180]) -> [PASS][53] +6 similar issues
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
>    [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-kbl4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate:
>     - shard-skl:          [FAIL][54] ([i915#34]) -> [PASS][55]
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl7/igt@kms_flip@plain-flip-fb-recreate.html
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl8/igt@kms_flip@plain-flip-fb-recreate.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
>     - shard-tglb:         [SKIP][56] ([i915#668]) -> [PASS][57] +3 similar issues
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
>    [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>     - shard-skl:          [FAIL][58] ([fdo#108145] / [i915#265]) -> [PASS][59]
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>    [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
> 
>   * igt@kms_psr@psr2_cursor_mmap_cpu:
>     - shard-iclb:         [SKIP][60] ([fdo#109441]) -> [PASS][61] +1 similar issue
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html
>    [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
> 
>   * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
>     - shard-skl:          [INCOMPLETE][62] ([i915#69]) -> [PASS][63]
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
>    [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
> 
>   * igt@perf_pmu@busy-no-semaphores-vcs1:
>     - shard-iclb:         [SKIP][64] ([fdo#112080]) -> [PASS][65] +15 similar issues
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
>    [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html
> 
>   
> #### Warnings ####
> 
>   * igt@gem_ctx_isolation@vcs1-nonpriv:
>     - shard-iclb:         [FAIL][66] ([IGT#28]) -> [SKIP][67] ([fdo#112080])
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-iclb8/igt@gem_ctx_isolation@vcs1-nonpriv.html
> 
>   * igt@i915_pm_dc@dc6-psr:
>     - shard-tglb:         [FAIL][68] ([i915#454]) -> [SKIP][69] ([i915#468])
>    [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb3/igt@i915_pm_dc@dc6-psr.html
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-tglb2/igt@i915_pm_dc@dc6-psr.html
> 
>   * igt@i915_pm_rpm@legacy-planes:
>     - shard-snb:          [INCOMPLETE][70] ([i915#82]) -> [SKIP][71] ([fdo#109271])
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-snb6/igt@i915_pm_rpm@legacy-planes.html
>    [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-snb2/igt@i915_pm_rpm@legacy-planes.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
>     - shard-tglb:         [SKIP][72] ([fdo#111825]) -> [INCOMPLETE][73] ([i915#472])
>    [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7857/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu.html
>    [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu.html
> 
>   
>   [IGT#28]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/28
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
>   [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
>   [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
>   [i915#109]: https://gitlab.freedesktop.org/drm/intel/issues/109
>   [i915#173]: https://gitlab.freedesktop.org/drm/intel/issues/173
>   [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
>   [i915#221]: https://gitlab.freedesktop.org/drm/intel/issues/221
>   [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
>   [i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
>   [i915#34]: https://gitlab.freedesktop.org/drm/intel/issues/34
>   [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
>   [i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
>   [i915#472]: https://gitlab.freedesktop.org/drm/intel/issues/472
>   [i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
>   [i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
>   [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
>   [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668
>   [i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
>   [i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
>   [i915#694]: https://gitlab.freedesktop.org/drm/intel/issues/694
>   [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
>   [i915#82]: https://gitlab.freedesktop.org/drm/intel/issues/82
> 
> 
> Participating hosts (10 -> 10)
> ------------------------------
> 
>   No changes in participating hosts
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * Linux: CI_DRM_7857 -> Patchwork_16387
> 
>   CI-20190529: 20190529
>   CI_DRM_7857: 8ec40a15b9a930df9e445f17c5e01cdb6f80353a @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGT_5411: 86c6ab8a0b6696bdb2153febd350af7fa02fbb00 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_16387: 4e5443593875f7b5c107caae700bd2e93d50ca3b @ git://anongit.freedesktop.org/gfx-ci/linux
>   piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16387/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset
  2020-02-05 14:32   ` Ville Syrjälä
@ 2020-02-10 11:03     ` Manasi Navare
  0 siblings, 0 replies; 12+ messages in thread
From: Manasi Navare @ 2020-02-10 11:03 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On Wed, Feb 05, 2020 at 04:32:48PM +0200, Ville Syrjälä wrote:
> On Sun, Feb 02, 2020 at 11:47:56PM -0800, Manasi Navare wrote:
> > If one of the synced crtcs needs a full modeset, we need
> > to make sure all the synced crtcs are forced a full
> > modeset.
> > 
> > v2:
> > * Add tiles based on cpu_trans check (Ville)
> > 
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c |  85 -----------
> >  drivers/gpu/drm/i915/display/intel_dp.c      | 142 ++++++++++++++++++-
> >  2 files changed, 141 insertions(+), 86 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index a943787167de..6383d1287472 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -14669,76 +14669,6 @@ static bool intel_cpu_transcoders_need_modeset(struct intel_atomic_state *state,
> >  	return false;
> >  }
> >  
> > -static int
> > -intel_modeset_all_tiles(struct intel_atomic_state *state, int tile_grp_id)
> > -{
> > -	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > -	struct drm_connector *connector;
> > -	struct drm_connector_list_iter conn_iter;
> > -	int ret = 0;
> > -
> > -	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> > -	drm_for_each_connector_iter(connector, &conn_iter) {
> > -		struct drm_connector_state *conn_state;
> > -		struct drm_crtc_state *crtc_state;
> > -
> > -		if (!connector->has_tile ||
> > -		    connector->tile_group->id != tile_grp_id)
> > -			continue;
> > -		conn_state = drm_atomic_get_connector_state(&state->base,
> > -							    connector);
> > -		if (IS_ERR(conn_state)) {
> > -			ret =  PTR_ERR(conn_state);
> > -			break;
> > -		}
> > -
> > -		if (!conn_state->crtc)
> > -			continue;
> > -
> > -		crtc_state = drm_atomic_get_crtc_state(&state->base,
> > -						       conn_state->crtc);
> > -		if (IS_ERR(crtc_state)) {
> > -			ret = PTR_ERR(crtc_state);
> > -			break;
> > -		}
> > -		crtc_state->mode_changed = true;
> > -		ret = drm_atomic_add_affected_connectors(&state->base,
> > -							 conn_state->crtc);
> > -		if (ret)
> > -			break;
> > -	}
> > -	drm_connector_list_iter_end(&conn_iter);
> > -
> > -	return ret;
> > -}
> > -
> > -static int
> > -intel_atomic_check_tiled_conns(struct intel_atomic_state *state)
> > -{
> > -	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > -	struct drm_connector *connector;
> > -	struct drm_connector_state *old_conn_state, *new_conn_state;
> > -	int i, ret;
> > -
> > -	if (INTEL_GEN(dev_priv) < 11)
> > -		return 0;
> > -
> > -	/* Is tiled, mark all other tiled CRTCs as needing a modeset */
> > -	for_each_oldnew_connector_in_state(&state->base, connector,
> > -					   old_conn_state, new_conn_state, i) {
> > -		if (!connector->has_tile)
> > -			continue;
> > -		if (!intel_connector_needs_modeset(state, connector))
> > -			continue;
> > -
> > -		ret = intel_modeset_all_tiles(state, connector->tile_group->id);
> > -		if (ret)
> > -			return ret;
> > -	}
> > -
> > -	return 0;
> > -}
> > -
> >  /**
> >   * intel_atomic_check - validate state object
> >   * @dev: drm device
> > @@ -14767,21 +14697,6 @@ static int intel_atomic_check(struct drm_device *dev,
> >  	if (ret)
> >  		goto fail;
> >  
> > -	/**
> > -	 * This check adds all the connectors in current state that belong to
> > -	 * the same tile group to a full modeset.
> > -	 * This function directly sets the mode_changed to true and we also call
> > -	 * drm_atomic_add_affected_connectors(). Hence we are not explicitly
> > -	 * calling drm_atomic_helper_check_modeset() after this.
> > -	 *
> > -	 * Fixme: Handle some corner cases where one of the
> > -	 * tiled connectors gets disconnected and tile info is lost but since it
> > -	 * was previously synced to other conn, we need to add that to the modeset.
> > -	 */
> > -	ret = intel_atomic_check_tiled_conns(state);
> > -	if (ret)
> > -		goto fail;
> > -
> >  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> >  					    new_crtc_state, i) {
> >  		if (!needs_modeset(new_crtc_state)) {
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> > index f4dede6253f8..07f0374d4409 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -6582,6 +6582,146 @@ void intel_dp_encoder_reset(struct drm_encoder *encoder)
> >  	}
> >  }
> >  
> > +static int intel_modeset_tile_group(struct intel_atomic_state *state,
> > +				    int tile_group_id)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > +	struct drm_connector_list_iter conn_iter;
> > +	struct drm_connector *connector;
> > +	int ret = 0;
> > +
> > +	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> > +	drm_for_each_connector_iter(connector, &conn_iter) {
> > +		struct drm_connector_state *conn_state;
> > +		struct intel_crtc_state *crtc_state;
> > +		struct intel_crtc *crtc;
> > +
> > +		if (!connector->has_tile ||
> > +		    connector->tile_group->id != tile_group_id)
> > +			continue;
> > +
> > +		conn_state = drm_atomic_get_connector_state(&state->base,
> > +							    connector);
> > +		if (IS_ERR(conn_state)) {
> > +			ret = PTR_ERR(conn_state);
> > +			break;
> > +		}
> > +
> > +		crtc = to_intel_crtc(conn_state->crtc);
> > +
> > +		if (!crtc)
> > +			continue;
> > +
> > +		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> 
> I think this could just be get_new_crtc_state() since
> drm_atomic_get_connector_state() should have added the
> connector's crtc already to the state. Which would let us
> get rid of the error handling here.
>

Okay will make that change so just call intel_atomic_get_new_crtc_state() and no
error check for that
 
> > +		if (IS_ERR(crtc_state)) {
> > +			ret = PTR_ERR(crtc_state);
> > +			break;
> > +		}
> > +
> > +		crtc_state->uapi.mode_changed = true;
> > +
> > +		ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
> > +		if (ret)
> > +			break;
> > +	}
> > +	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> > +
> > +	return ret;
> > +}
> > +
> > +static int intel_modeset_affected_transcoders(struct intel_atomic_state *state, u8 transcoders)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > +	struct intel_crtc *crtc;
> > +
> > +	if (transcoders == 0)
> > +		return 0;
> > +
> > +	for_each_intel_crtc(&dev_priv->drm, crtc) {
> > +		struct intel_crtc_state *crtc_state;
> > +		int ret;
> > +
> > +		crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
> > +		if (IS_ERR(crtc_state))
> > +			return PTR_ERR(crtc_state);
> > +
> > +		if (!crtc_state->hw.enable)
> > +			continue;
> > +
> > +		if (!(transcoders & BIT(crtc_state->cpu_transcoder)))
> > +			continue;
> > +
> > +		crtc_state->uapi.mode_changed = true;
> > +
> > +		ret = drm_atomic_add_affected_connectors(&state->base, &crtc->base);
> > +		if (ret)
> > +			return ret;
> > +
> > +		ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
> > +		if (ret)
> > +			return ret;
> > +
> > +		transcoders &= ~BIT(crtc_state->cpu_transcoder);
> > +	}
> > +
> > +	WARN_ON(transcoders != 0);
> > +
> > +	return 0;
> > +}
> > +
> > +static int intel_modeset_synced_crtcs(struct intel_atomic_state *state,
> > +				      struct drm_connector *connector)
> > +{
> > +	const struct drm_connector_state *old_conn_state =
> > +		drm_atomic_get_old_connector_state(&state->base, connector);
> > +	const struct intel_crtc_state *old_crtc_state;
> > +	struct intel_crtc *crtc;
> > +	u8 transcoders;
> > +
> > +	crtc = to_intel_crtc(old_conn_state->crtc);
> > +	if (!crtc)
> > +		return 0;
> > +
> > +	old_crtc_state = intel_atomic_get_old_crtc_state(state, crtc);
> > +
> > +	if (!old_crtc_state->hw.active)
> > +		return 0;
> > +
> > +	transcoders = old_crtc_state->sync_mode_slaves_mask;
> > +	if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
> > +		transcoders |= BIT(old_crtc_state->master_transcoder);
> > +
> > +	return intel_modeset_affected_transcoders(state,
> > +						  transcoders &
> > +						  ~BIT(old_crtc_state->cpu_transcoder));
> 
> As I said in the previous review cycle the '&~BIT(cpu_trans)' should
> be a nop. So can just drop it.
>

Okay will remove that and thanks for the review

Manasi
 
> Otherwise
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > +}
> > +
> > +static int intel_dp_connector_atomic_check(struct drm_connector *conn,
> > +					   struct drm_atomic_state *_state)
> > +{
> > +	struct drm_i915_private *dev_priv = to_i915(conn->dev);
> > +	struct intel_atomic_state *state = to_intel_atomic_state(_state);
> > +	int ret;
> > +
> > +	ret = intel_digital_connector_atomic_check(conn, &state->base);
> > +	if (ret)
> > +		return ret;
> > +
> > +	if (INTEL_GEN(dev_priv) < 11)
> > +		return 0;
> > +
> > +	if (!intel_connector_needs_modeset(state, conn))
> > +		return 0;
> > +
> > +	if (conn->has_tile) {
> > +		ret = intel_modeset_tile_group(state, conn->tile_group->id);
> > +		if (ret)
> > +			return ret;
> > +	}
> > +
> > +	return intel_modeset_synced_crtcs(state, conn);
> > +}
> > +
> >  static const struct drm_connector_funcs intel_dp_connector_funcs = {
> >  	.force = intel_dp_force,
> >  	.fill_modes = drm_helper_probe_single_connector_modes,
> > @@ -6598,7 +6738,7 @@ static const struct drm_connector_helper_funcs intel_dp_connector_helper_funcs =
> >  	.detect_ctx = intel_dp_detect,
> >  	.get_modes = intel_dp_get_modes,
> >  	.mode_valid = intel_dp_mode_valid,
> > -	.atomic_check = intel_digital_connector_atomic_check,
> > +	.atomic_check = intel_dp_connector_atomic_check,
> >  };
> >  
> >  static const struct drm_encoder_funcs intel_dp_enc_funcs = {
> > -- 
> > 2.19.1
> 
> -- 
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
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^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config()
  2020-02-05 14:25   ` Ville Syrjälä
@ 2020-02-10 11:05     ` Manasi Navare
  0 siblings, 0 replies; 12+ messages in thread
From: Manasi Navare @ 2020-02-10 11:05 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

Thanks for the review will make the changes and add your r-b

Manasi

On Wed, Feb 05, 2020 at 04:25:44PM +0200, Ville Syrjälä wrote:
> On Sun, Feb 02, 2020 at 11:47:55PM -0800, Manasi Navare wrote:
> > This patch pushes out the computation of master and slave
> > transcoders in crtc states after encoder's compute_config hook.
> > This ensures that the assigned master slave crtcs have exact same
> > mode and timings which is a requirement for Port sync mode
> > to be enabled.
> > 
> > v2:
> > * Correct indentation
> > * Rename to intel_ddi_port_sync_transcoders (Ville)
> > * remove unwanted debug (Ville)
> > 
> > Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c     | 109 +++++++++++++
> >  drivers/gpu/drm/i915/display/intel_display.c | 159 +------------------
> >  2 files changed, 110 insertions(+), 158 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index aa066fb9eb00..eb970797cd68 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -4448,6 +4448,114 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
> >  	return 0;
> >  }
> >  
> > +static bool mode_equal(const struct drm_display_mode *mode1,
> > +		       const struct drm_display_mode *mode2)
> > +{
> > +	return drm_mode_match(mode1, mode2,
> > +			      DRM_MODE_MATCH_TIMINGS |
> > +			      DRM_MODE_MATCH_FLAGS |
> > +			      DRM_MODE_MATCH_3D_FLAGS) &&
> > +		mode1->clock == mode2->clock; /* we want an exact match */
> > +}
> > +
> > +static bool m_n_equal(const struct intel_link_m_n *m_n_1,
> > +		      const struct intel_link_m_n *m_n_2)
> > +{
> > +	return m_n_1->tu == m_n_2->tu &&
> > +		m_n_1->gmch_m == m_n_2->gmch_m &&
> > +		m_n_1->gmch_n == m_n_2->gmch_n &&
> > +		m_n_1->link_m == m_n_2->link_m &&
> > +		m_n_1->link_n == m_n_2->link_n;
> > +}
> > +
> > +static bool crtcs_port_sync_compatible(const struct intel_crtc_state *crtc_state1,
> > +				       const struct intel_crtc_state *crtc_state2)
> > +{
> > +	return crtc_state1->hw.active && crtc_state2->hw.active &&
> > +		crtc_state1->output_types == crtc_state2->output_types &&
> > +		crtc_state1->output_format == crtc_state2->output_format &&
> > +		crtc_state1->lane_count == crtc_state2->lane_count &&
> > +		crtc_state1->port_clock == crtc_state2->port_clock &&
> > +		mode_equal(&crtc_state1->hw.adjusted_mode,
> > +			   &crtc_state2->hw.adjusted_mode) &&
> > +		m_n_equal(&crtc_state1->dp_m_n, &crtc_state2->dp_m_n);
> > +}
> > +
> > +static u8
> > +intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
> > +				int tile_group_id)
> > +{
> > +	struct drm_connector *connector;
> > +	struct drm_connector_state *conn_state;
> 
> Can be const
> 
> > +	struct drm_i915_private *dev_priv = to_i915(ref_crtc_state->uapi.crtc->dev);
> > +	struct intel_atomic_state *state =
> > +		to_intel_atomic_state(ref_crtc_state->uapi.state);
> > +	u8 transcoders = 0;
> > +	int i;
> > +
> > +	if (INTEL_GEN(dev_priv) < 11)
> > +		return 0;
> > +
> > +	if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))
> > +		return 0;
> > +
> > +	for_each_new_connector_in_state(&state->base, connector, conn_state, i) {
> > +		struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);
> > +		struct intel_crtc_state *crtc_state = NULL;
> 
> Can be const
> 
> Pointless NULL initialization.
> 
> > +
> > +		if (!crtc)
> > +			continue;
> > +
> > +		if (!(connector->has_tile &&
> > +		      connector->tile_group->id ==
> > +		      tile_group_id))
> 
> I'd write that as 
> if (!has_tile || id != group_id)
> 
> Looks like some pointless newlines in there. Makes it look a bit ugly.
> 
> Otherwise lgtm
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > +			continue;
> > +
> > +		crtc_state = intel_atomic_get_new_crtc_state(state,
> > +							     crtc);
> > +		if (!crtcs_port_sync_compatible(ref_crtc_state,
> > +						crtc_state))
> > +			continue;
> > +
> > +		transcoders |= BIT(crtc_state->cpu_transcoder);
> > +	}
> > +
> > +	return transcoders;
> > +}
> > +
> > +static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
> > +					 struct intel_crtc_state *crtc_state,
> > +					 struct drm_connector_state *conn_state)
> > +{
> > +	struct drm_connector *connector = conn_state->connector;
> > +	u8 port_sync_transcoders = 0;
> > +
> > +	DRM_DEBUG_KMS("[ENCODER:%d:%s] [CRTC:%d:%s]",
> > +		      encoder->base.base.id, encoder->base.name,
> > +		      crtc_state->uapi.crtc->base.id, crtc_state->uapi.crtc->name);
> > +
> > +	if (connector->has_tile)
> > +		port_sync_transcoders = intel_ddi_port_sync_transcoders(crtc_state,
> > +									connector->tile_group->id);
> > +
> > +	/*
> > +	 * EDP Transcoders cannot be ensalved
> > +	 * make them a master always when present
> > +	 */
> > +	if (port_sync_transcoders & BIT(TRANSCODER_EDP))
> > +		crtc_state->master_transcoder = TRANSCODER_EDP;
> > +	else
> > +		crtc_state->master_transcoder = ffs(port_sync_transcoders) - 1;
> > +
> > +	if (crtc_state->master_transcoder == crtc_state->cpu_transcoder) {
> > +		crtc_state->master_transcoder = INVALID_TRANSCODER;
> > +		crtc_state->sync_mode_slaves_mask =
> > +			port_sync_transcoders & ~BIT(crtc_state->cpu_transcoder);
> > +	}
> > +
> > +	return 0;
> > +}
> > +
> >  static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
> >  {
> >  	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
> > @@ -4757,6 +4865,7 @@ void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port)
> >  	encoder->hotplug = intel_ddi_hotplug;
> >  	encoder->compute_output_type = intel_ddi_compute_output_type;
> >  	encoder->compute_config = intel_ddi_compute_config;
> > +	encoder->compute_config_late = intel_ddi_compute_config_late;
> >  	encoder->enable = intel_enable_ddi;
> >  	encoder->pre_pll_enable = intel_ddi_pre_pll_enable;
> >  	encoder->pre_enable = intel_ddi_pre_enable;
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 2a2c9dd563e5..a943787167de 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -12564,126 +12564,6 @@ static bool c8_planes_changed(const struct intel_crtc_state *new_crtc_state)
> >  	return !old_crtc_state->c8_planes != !new_crtc_state->c8_planes;
> >  }
> >  
> > -static bool
> > -intel_atomic_is_master_connector(struct intel_crtc_state *crtc_state)
> > -{
> > -	struct drm_crtc *crtc = crtc_state->uapi.crtc;
> > -	struct drm_atomic_state *state = crtc_state->uapi.state;
> > -	struct drm_connector *connector;
> > -	struct drm_connector_state *connector_state;
> > -	int i;
> > -
> > -	for_each_new_connector_in_state(state, connector, connector_state, i) {
> > -		if (connector_state->crtc != crtc)
> > -			continue;
> > -		if (connector->has_tile &&
> > -		    connector->tile_h_loc == connector->num_h_tile - 1 &&
> > -		    connector->tile_v_loc == connector->num_v_tile - 1)
> > -			return true;
> > -	}
> > -
> > -	return false;
> > -}
> > -
> > -static void reset_port_sync_mode_state(struct intel_crtc_state *crtc_state)
> > -{
> > -	crtc_state->master_transcoder = INVALID_TRANSCODER;
> > -	crtc_state->sync_mode_slaves_mask = 0;
> > -}
> > -
> > -static int icl_compute_port_sync_crtc_state(struct drm_connector *connector,
> > -					    struct intel_crtc_state *crtc_state,
> > -					    int num_tiled_conns)
> > -{
> > -	struct drm_crtc *crtc = crtc_state->uapi.crtc;
> > -	struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
> > -	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> > -	struct drm_connector *master_connector;
> > -	struct drm_connector_list_iter conn_iter;
> > -	struct drm_crtc *master_crtc = NULL;
> > -	struct drm_crtc_state *master_crtc_state;
> > -	struct intel_crtc_state *master_pipe_config;
> > -
> > -	if (INTEL_GEN(dev_priv) < 11)
> > -		return 0;
> > -
> > -	if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP))
> > -		return 0;
> > -
> > -	/*
> > -	 * In case of tiled displays there could be one or more slaves but there is
> > -	 * only one master. Lets make the CRTC used by the connector corresponding
> > -	 * to the last horizonal and last vertical tile a master/genlock CRTC.
> > -	 * All the other CRTCs corresponding to other tiles of the same Tile group
> > -	 * are the slave CRTCs and hold a pointer to their genlock CRTC.
> > -	 * If all tiles not present do not make master slave assignments.
> > -	 */
> > -	if (!connector->has_tile ||
> > -	    crtc_state->hw.mode.hdisplay != connector->tile_h_size ||
> > -	    crtc_state->hw.mode.vdisplay != connector->tile_v_size ||
> > -	    num_tiled_conns < connector->num_h_tile * connector->num_v_tile) {
> > -		reset_port_sync_mode_state(crtc_state);
> > -		return 0;
> > -	}
> > -	/* Last Horizontal and last vertical tile connector is a master
> > -	 * Master's crtc state is already populated in slave for port sync
> > -	 */
> > -	if (connector->tile_h_loc == connector->num_h_tile - 1 &&
> > -	    connector->tile_v_loc == connector->num_v_tile - 1)
> > -		return 0;
> > -
> > -	/* Loop through all connectors and configure the Slave crtc_state
> > -	 * to point to the correct master.
> > -	 */
> > -	drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
> > -	drm_for_each_connector_iter(master_connector, &conn_iter) {
> > -		struct drm_connector_state *master_conn_state = NULL;
> > -
> > -		if (!(master_connector->has_tile &&
> > -		      master_connector->tile_group->id == connector->tile_group->id))
> > -			continue;
> > -		if (master_connector->tile_h_loc != master_connector->num_h_tile - 1 ||
> > -		    master_connector->tile_v_loc != master_connector->num_v_tile - 1)
> > -			continue;
> > -
> > -		master_conn_state = drm_atomic_get_connector_state(&state->base,
> > -								   master_connector);
> > -		if (IS_ERR(master_conn_state)) {
> > -			drm_connector_list_iter_end(&conn_iter);
> > -			return PTR_ERR(master_conn_state);
> > -		}
> > -		if (master_conn_state->crtc) {
> > -			master_crtc = master_conn_state->crtc;
> > -			break;
> > -		}
> > -	}
> > -	drm_connector_list_iter_end(&conn_iter);
> > -
> > -	if (!master_crtc) {
> > -		drm_dbg_kms(&dev_priv->drm,
> > -			    "Could not find Master CRTC for Slave CRTC %d\n",
> > -			    crtc->base.id);
> > -		return -EINVAL;
> > -	}
> > -
> > -	master_crtc_state = drm_atomic_get_crtc_state(&state->base,
> > -						      master_crtc);
> > -	if (IS_ERR(master_crtc_state))
> > -		return PTR_ERR(master_crtc_state);
> > -
> > -	master_pipe_config = to_intel_crtc_state(master_crtc_state);
> > -	crtc_state->master_transcoder = master_pipe_config->cpu_transcoder;
> > -	master_pipe_config->sync_mode_slaves_mask |=
> > -		BIT(crtc_state->cpu_transcoder);
> > -	drm_dbg_kms(&dev_priv->drm,
> > -		    "Master Transcoder = %s added for Slave CRTC = %d, slave transcoder bitmask = %d\n",
> > -		    transcoder_name(crtc_state->master_transcoder),
> > -		    crtc->base.id,
> > -		    master_pipe_config->sync_mode_slaves_mask);
> > -
> > -	return 0;
> > -}
> > -
> >  static u16 hsw_linetime_wm(const struct intel_crtc_state *crtc_state)
> >  {
> >  	const struct drm_display_mode *adjusted_mode =
> > @@ -13332,15 +13212,6 @@ intel_crtc_prepare_cleared_state(struct intel_crtc_state *crtc_state)
> >  	if (IS_G4X(dev_priv) ||
> >  	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
> >  		saved_state->wm = crtc_state->wm;
> > -	/*
> > -	 * Save the slave bitmask which gets filled for master crtc state during
> > -	 * slave atomic check call. For all other CRTCs reset the port sync variables
> > -	 * crtc_state->master_transcoder needs to be set to INVALID
> > -	 */
> > -	reset_port_sync_mode_state(saved_state);
> > -	if (intel_atomic_is_master_connector(crtc_state))
> > -		saved_state->sync_mode_slaves_mask =
> > -			crtc_state->sync_mode_slaves_mask;
> >  
> >  	memcpy(crtc_state, saved_state, sizeof(*crtc_state));
> >  	kfree(saved_state);
> > @@ -13358,8 +13229,7 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
> >  	struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev);
> >  	struct drm_connector *connector;
> >  	struct drm_connector_state *connector_state;
> > -	int base_bpp, ret;
> > -	int i, tile_group_id = -1, num_tiled_conns = 0;
> > +	int base_bpp, ret, i;
> >  	bool retry = true;
> >  
> >  	pipe_config->cpu_transcoder =
> > @@ -13431,24 +13301,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
> >  	drm_mode_set_crtcinfo(&pipe_config->hw.adjusted_mode,
> >  			      CRTC_STEREO_DOUBLE);
> >  
> > -	/* Get tile_group_id of tiled connector */
> > -	for_each_new_connector_in_state(state, connector, connector_state, i) {
> > -		if (connector_state->crtc == crtc &&
> > -		    connector->has_tile) {
> > -			tile_group_id = connector->tile_group->id;
> > -			break;
> > -		}
> > -	}
> > -
> > -	/* Get total number of tiled connectors in state that belong to
> > -	 * this tile group.
> > -	 */
> > -	for_each_new_connector_in_state(state, connector, connector_state, i) {
> > -		if (connector->has_tile &&
> > -		    connector->tile_group->id == tile_group_id)
> > -			num_tiled_conns++;
> > -	}
> > -
> >  	/* Pass our mode to the connectors and the CRTC to give them a chance to
> >  	 * adjust it according to limitations or connector properties, and also
> >  	 * a chance to reject the mode entirely.
> > @@ -13460,15 +13312,6 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
> >  		if (connector_state->crtc != crtc)
> >  			continue;
> >  
> > -		ret = icl_compute_port_sync_crtc_state(connector, pipe_config,
> > -						       num_tiled_conns);
> > -		if (ret) {
> > -			drm_dbg_kms(&i915->drm,
> > -				    "Cannot assign Sync Mode CRTCs: %d\n",
> > -				    ret);
> > -			return ret;
> > -		}
> > -
> >  		ret = encoder->compute_config(encoder, pipe_config,
> >  					      connector_state);
> >  		if (ret < 0) {
> > -- 
> > 2.19.1
> 
> -- 
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

* Re: [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late()
  2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
                   ` (4 preceding siblings ...)
  2020-02-05 15:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-02-14 11:18 ` " Manasi Navare
  5 siblings, 0 replies; 12+ messages in thread
From: Manasi Navare @ 2020-02-14 11:18 UTC (permalink / raw)
  To: intel-gfx

On Sun, Feb 02, 2020 at 11:47:54PM -0800, Manasi Navare wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add an optional secondary encoder state compute hook. This gets
> called after the normak .compute_config() has been called for
> all the encoders in the state. Thus in the new hook we can rely
> on all derived state populated by .compute_config() to be already
> set up. Should be useful for MST and port sync master/slave
> transcoder selection.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>

Manasi

> ---
>  drivers/gpu/drm/i915/display/intel_display.c  | 39 +++++++++++++++++++
>  .../drm/i915/display/intel_display_types.h    |  3 ++
>  2 files changed, 42 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index b0af37fb6d4a..2a2c9dd563e5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13522,6 +13522,35 @@ intel_modeset_pipe_config(struct intel_crtc_state *pipe_config)
>  	return 0;
>  }
>  
> +static int
> +intel_modeset_pipe_config_late(struct intel_crtc_state *crtc_state)
> +{
> +	struct intel_atomic_state *state =
> +		to_intel_atomic_state(crtc_state->uapi.state);
> +	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> +	struct drm_connector_state *conn_state;
> +	struct drm_connector *connector;
> +	int i;
> +
> +	for_each_new_connector_in_state(&state->base, connector,
> +					conn_state, i) {
> +		struct intel_encoder *encoder =
> +			to_intel_encoder(conn_state->best_encoder);
> +		int ret;
> +
> +		if (conn_state->crtc != &crtc->base ||
> +		    !encoder->compute_config_late)
> +			continue;
> +
> +		ret = encoder->compute_config_late(encoder, crtc_state,
> +						   conn_state);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return 0;
> +}
> +
>  bool intel_fuzzy_clock_check(int clock1, int clock2)
>  {
>  	int diff;
> @@ -14929,6 +14958,16 @@ static int intel_atomic_check(struct drm_device *dev,
>  		ret = intel_modeset_pipe_config(new_crtc_state);
>  		if (ret)
>  			goto fail;
> +	}
> +
> +	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
> +					    new_crtc_state, i) {
> +		if (!needs_modeset(new_crtc_state))
> +			continue;
> +
> +		ret = intel_modeset_pipe_config_late(new_crtc_state);
> +		if (ret)
> +			goto fail;
>  
>  		intel_crtc_check_fastset(old_crtc_state, new_crtc_state);
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 7c6133a9c51b..96d84d027556 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -141,6 +141,9 @@ struct intel_encoder {
>  	int (*compute_config)(struct intel_encoder *,
>  			      struct intel_crtc_state *,
>  			      struct drm_connector_state *);
> +	int (*compute_config_late)(struct intel_encoder *,
> +				   struct intel_crtc_state *,
> +				   struct drm_connector_state *);
>  	void (*update_prepare)(struct intel_atomic_state *,
>  			       struct intel_encoder *,
>  			       struct intel_crtc *);
> -- 
> 2.19.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 12+ messages in thread

end of thread, back to index

Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-02-03  7:47 [Intel-gfx] [PATCH v2 1/3] drm/i915: Introduce encoder->compute_config_late() Manasi Navare
2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 2/3] drm/i915/dp: Compute port sync crtc states post compute_config() Manasi Navare
2020-02-05 14:25   ` Ville Syrjälä
2020-02-10 11:05     ` Manasi Navare
2020-02-03  7:47 ` [Intel-gfx] [PATCH v2 3/3] drm/i915/dp: Add all tiled and port sync conns to modeset Manasi Navare
2020-02-05 14:32   ` Ville Syrjälä
2020-02-10 11:03     ` Manasi Navare
2020-02-03  9:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Introduce encoder->compute_config_late() Patchwork
2020-02-03  9:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-02-05 15:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-02-10 11:00   ` Manasi Navare
2020-02-14 11:18 ` [Intel-gfx] [PATCH v2 1/3] " Manasi Navare

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