From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/gen12: Disable preemption timeout
Date: Tue, 10 Mar 2020 16:00:47 +0000 [thread overview]
Message-ID: <20200310160047.20748-1-tvrtko.ursulin@linux.intel.com> (raw)
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Allow super long OpenCL workloads which cannot be preempted within
the default timeout to run out of the box.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Mrozek <michal.mrozek@intel.com>
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 53ac3f00909a..3dc302038742 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -275,6 +275,7 @@ static void intel_engine_sanitize_mmio(struct intel_engine_cs *engine)
static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
{
const struct engine_info *info = &intel_engines[id];
+ struct drm_i915_private *i915 = gt->i915;
struct intel_engine_cs *engine;
BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));
@@ -301,11 +302,11 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
engine->id = id;
engine->legacy_idx = INVALID_ENGINE;
engine->mask = BIT(id);
- engine->i915 = gt->i915;
+ engine->i915 = i915;
engine->gt = gt;
engine->uncore = gt->uncore;
engine->hw_id = engine->guc_id = info->hw_id;
- engine->mmio_base = __engine_mmio_base(gt->i915, info->mmio_bases);
+ engine->mmio_base = __engine_mmio_base(i915, info->mmio_bases);
engine->class = info->class;
engine->instance = info->instance;
@@ -316,7 +317,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
engine->props.max_busywait_duration_ns =
CONFIG_DRM_I915_MAX_REQUEST_BUSYWAIT;
engine->props.preempt_timeout_ms =
- CONFIG_DRM_I915_PREEMPT_TIMEOUT;
+ INTEL_GEN(i915) == 12 ? 0 : CONFIG_DRM_I915_PREEMPT_TIMEOUT;
engine->props.stop_timeout_ms =
CONFIG_DRM_I915_STOP_TIMEOUT;
engine->props.timeslice_duration_ms =
@@ -326,7 +327,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
if (WARN_ON(engine->context_size > BIT(20)))
engine->context_size = 0;
if (engine->context_size)
- DRIVER_CAPS(gt->i915)->has_logical_contexts = true;
+ DRIVER_CAPS(i915)->has_logical_contexts = true;
/* Nothing to do here, execute in order of dependencies */
engine->schedule = NULL;
@@ -342,7 +343,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)
gt->engine_class[info->class][info->instance] = engine;
gt->engine[id] = engine;
- gt->i915->engine[id] = engine;
+ i915->engine[id] = engine;
return 0;
}
--
2.20.1
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next reply other threads:[~2020-03-10 16:00 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-10 16:00 Tvrtko Ursulin [this message]
2020-03-10 16:06 ` [Intel-gfx] [PATCH] drm/i915/gen12: Disable preemption timeout Chris Wilson
2020-03-10 16:24 ` [Intel-gfx] [PATCH v2] " Tvrtko Ursulin
2020-03-10 16:30 ` Chris Wilson
2020-03-12 11:57 ` [Intel-gfx] [PATCH v3] " Tvrtko Ursulin
2020-03-12 11:57 ` Tvrtko Ursulin
2020-03-12 12:32 ` Mrozek, Michal
2020-03-11 9:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen12: Disable preemption timeout (rev2) Patchwork
2020-03-11 18:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-12 14:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gen12: Disable preemption timeout (rev4) Patchwork
2020-03-13 6:16 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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