* [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+
@ 2020-03-13 16:48 Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
` (18 more replies)
0 siblings, 19 replies; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
I got tired of waiting for the skl+ port sync to materialize so I
went ahead and did it myself. Now we can maybe get this is into
the hands of actual users.
In the process I also cleared out all the copy pasta that was
added for port sync. LOC still went up though, but I think that's
just due to plumbing the atomic state to the encoder hooks. Without
that patch I think this results in a slight net reduction of code.
Lightly tested on a KBL by faking the tile info for a pair
of extenal monitors (well, actually a single monitor plugged in
via DP and HDMI->LSPCON->DP at the same time).
Oh, and I included a MST .compute_config_late() conversion as well
since I figured I'd save CI a few cycles of testing that alone. Also
I already had it in my WIP branch.
Ville Syrjälä (13):
drm/i915/mst: Use .compute_config_late() to compute master transcoder
drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
drm/i915: Drop usless master_transcoder assignments
drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
drm/i915: Include port sync state in the state dump
drm/i915: Store cpu_transcoder_mask in device info
drm/i915: Implement port sync for SKL+
drm/i915: Eliminate port sync copy pasta
drm/i915: Fix port sync code to work with >2 pipes
drm/i915: Do pipe updates after enables for everyone
drm/i915: Pass atomic state to encoder hooks
drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
drivers/gpu/drm/i915/display/icl_dsi.c | 15 +-
drivers/gpu/drm/i915/display/intel_crt.c | 33 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 289 +++++++++----
drivers/gpu/drm/i915/display/intel_ddi.h | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 384 +++++-------------
drivers/gpu/drm/i915/display/intel_display.h | 8 +-
.../drm/i915/display/intel_display_types.h | 21 +-
drivers/gpu/drm/i915/display/intel_dp.c | 61 ++-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 119 +++---
drivers/gpu/drm/i915/display/intel_dvo.c | 9 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 3 +-
drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 59 ++-
drivers/gpu/drm/i915/display/intel_lvds.c | 22 +-
drivers/gpu/drm/i915/display/intel_panel.c | 3 +-
drivers/gpu/drm/i915/display/intel_panel.h | 3 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 17 +-
drivers/gpu/drm/i915/display/intel_tv.c | 9 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 12 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 23 +-
drivers/gpu/drm/i915/i915_reg.h | 13 +-
drivers/gpu/drm/i915/intel_device_info.c | 41 +-
drivers/gpu/drm/i915/intel_device_info.h | 1 +
24 files changed, 621 insertions(+), 533 deletions(-)
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-20 23:37 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
` (17 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Use the recently introduced encoder .compute_config_late() hook to
do the MST master transcoder assignment. Avoids having to do it
in a funny way before we know the CPU transcoder of each pipe.
And now we can also properly use hw.active instead of uapi.active
since it too has been calculated earlier for everyone.
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_mst.c | 98 +++++++++++----------
1 file changed, 51 insertions(+), 47 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 44f3fd251ca1..b9afc1135b9b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -88,56 +88,10 @@ static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
return 0;
}
-/*
- * Iterate over all connectors and return the smallest transcoder in the MST
- * stream
- */
-static enum transcoder
-intel_dp_mst_master_trans_compute(struct intel_atomic_state *state,
- struct intel_dp *mst_port)
-{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
- struct intel_digital_connector_state *conn_state;
- struct intel_connector *connector;
- enum pipe ret = I915_MAX_PIPES;
- int i;
-
- if (INTEL_GEN(dev_priv) < 12)
- return INVALID_TRANSCODER;
-
- for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
- struct intel_crtc_state *crtc_state;
- struct intel_crtc *crtc;
-
- if (connector->mst_port != mst_port || !conn_state->base.crtc)
- continue;
-
- crtc = to_intel_crtc(conn_state->base.crtc);
- crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
- if (!crtc_state->uapi.active)
- continue;
-
- /*
- * Using crtc->pipe because crtc_state->cpu_transcoder is
- * computed, so others CRTCs could have non-computed
- * cpu_transcoder
- */
- if (crtc->pipe < ret)
- ret = crtc->pipe;
- }
-
- if (ret == I915_MAX_PIPES)
- return INVALID_TRANSCODER;
-
- /* Simple cast works because TGL don't have a eDP transcoder */
- return (enum transcoder)ret;
-}
-
static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config,
struct drm_connector_state *conn_state)
{
- struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
struct intel_dp *intel_dp = &intel_mst->primary->dp;
@@ -201,7 +155,56 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
- pipe_config->mst_master_transcoder = intel_dp_mst_master_trans_compute(state, intel_dp);
+ return 0;
+}
+
+/*
+ * Iterate over all connectors and return a mask of
+ * all CPU transcoders streaming over the same DP link.
+ */
+static unsigned int
+intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
+ struct intel_dp *mst_port)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ const struct intel_digital_connector_state *conn_state;
+ struct intel_connector *connector;
+ u8 transcoders = 0;
+ int i;
+
+ if (INTEL_GEN(dev_priv) < 12)
+ return 0;
+
+ for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
+ const struct intel_crtc_state *crtc_state;
+ struct intel_crtc *crtc;
+
+ if (connector->mst_port != mst_port || !conn_state->base.crtc)
+ continue;
+
+ crtc = to_intel_crtc(conn_state->base.crtc);
+ crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
+
+ if (!crtc_state->hw.active)
+ continue;
+
+ transcoders |= BIT(crtc_state->cpu_transcoder);
+ }
+
+ return transcoders;
+}
+
+static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
+ struct intel_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
+{
+ struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
+ struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
+ struct intel_dp *intel_dp = &intel_mst->primary->dp;
+
+ /* lowest numbered transcoder will be designated master */
+ crtc_state->mst_master_transcoder =
+ ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
return 0;
}
@@ -786,6 +789,7 @@ intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum
intel_encoder->pipe_mask = ~0;
intel_encoder->compute_config = intel_dp_mst_compute_config;
+ intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
intel_encoder->disable = intel_mst_disable_dp;
intel_encoder->post_disable = intel_mst_post_disable_dp;
intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 22:34 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
` (16 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
This port sync enable/disable stuff is misplaced. It's just another step
of the normal TRANS_DDI_FUNC_CTL enable. Move it to its natural place.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 71 +++++++++++---------
drivers/gpu/drm/i915/display/intel_display.c | 34 ----------
2 files changed, 39 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 73d0f4648c06..8d486282eea3 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1558,12 +1558,34 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
- u32 temp;
+ u32 ctl;
- temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
+ if (INTEL_GEN(dev_priv) >= 11) {
+ enum transcoder master_transcoder = crtc_state->master_transcoder;
+ u32 ctl2 = 0;
+
+ if (master_transcoder != INVALID_TRANSCODER) {
+ u8 master_select;
+
+ if (master_transcoder == TRANSCODER_EDP)
+ master_select = 0;
+ else
+ master_select = master_transcoder + 1;
+
+ ctl2 |= PORT_SYNC_MODE_ENABLE |
+ (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
+ PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
+ PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
+ }
+
+ intel_de_write(dev_priv,
+ TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder), ctl2);
+ }
+
+ ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
- temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
- intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
+ ctl |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
+ intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
}
/*
@@ -1576,11 +1598,11 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
- u32 temp;
+ u32 ctl;
- temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
- temp &= ~TRANS_DDI_FUNC_ENABLE;
- intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
+ ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
+ ctl &= ~TRANS_DDI_FUNC_ENABLE;
+ intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
}
void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
@@ -1588,20 +1610,23 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
- u32 val;
+ u32 ctl;
- val = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
- val &= ~TRANS_DDI_FUNC_ENABLE;
+ if (INTEL_GEN(dev_priv) >= 11)
+ intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
+
+ ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+ ctl &= ~TRANS_DDI_FUNC_ENABLE;
if (INTEL_GEN(dev_priv) >= 12) {
if (!intel_dp_mst_is_master_trans(crtc_state)) {
- val &= ~(TGL_TRANS_DDI_PORT_MASK |
+ ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
TRANS_DDI_MODE_SELECT_MASK);
}
} else {
- val &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
+ ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
}
- intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), val);
+ intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
@@ -3405,21 +3430,6 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
}
-static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_crtc_state)
-{
- struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
-
- if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
- return;
-
- DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
- transcoder_name(old_crtc_state->cpu_transcoder));
-
- intel_de_write(dev_priv,
- TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
-}
-
static void intel_ddi_post_disable(struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
@@ -3434,9 +3444,6 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
intel_disable_pipe(old_crtc_state);
- if (INTEL_GEN(dev_priv) >= 11)
- icl_disable_transcoder_port_sync(old_crtc_state);
-
intel_ddi_disable_transcoder_func(old_crtc_state);
intel_dsc_disable(old_crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8f23c4d51c33..c49b4e6eb3d4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4998,37 +4998,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
}
-static void icl_enable_trans_port_sync(const struct intel_crtc_state *crtc_state)
-{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 trans_ddi_func_ctl2_val;
- u8 master_select;
-
- /*
- * Configure the master select and enable Transcoder Port Sync for
- * Slave CRTCs transcoder.
- */
- if (crtc_state->master_transcoder == INVALID_TRANSCODER)
- return;
-
- if (crtc_state->master_transcoder == TRANSCODER_EDP)
- master_select = 0;
- else
- master_select = crtc_state->master_transcoder + 1;
-
- /* Set the master select bits for Tranascoder Port Sync */
- trans_ddi_func_ctl2_val = (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
- PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
- PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
- /* Enable Transcoder Port Sync */
- trans_ddi_func_ctl2_val |= PORT_SYNC_MODE_ENABLE;
-
- intel_de_write(dev_priv,
- TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder),
- trans_ddi_func_ctl2_val);
-}
-
static void intel_fdi_normal_train(struct intel_crtc *crtc)
{
struct drm_device *dev = crtc->base.dev;
@@ -7037,9 +7006,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
if (!transcoder_is_dsi(cpu_transcoder))
intel_set_pipe_timings(new_crtc_state);
- if (INTEL_GEN(dev_priv) >= 11)
- icl_enable_trans_port_sync(new_crtc_state);
-
intel_set_pipe_src_size(new_crtc_state);
if (cpu_transcoder != TRANSCODER_EDP &&
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 22:37 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
` (15 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The entire crtc state has been reset before readout so
master_transcoder is already set to INVALID.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c49b4e6eb3d4..12823d8f6afe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
pipe_config->shared_dpll = NULL;
- pipe_config->master_transcoder = INVALID_TRANSCODER;
ret = false;
@@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
pipe_config->shared_dpll = NULL;
- pipe_config->master_transcoder = INVALID_TRANSCODER;
ret = false;
tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (2 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 22:44 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
` (14 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Move the port sync readout into the DDI code where it belongs.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 54 ++++++++++++++++++
drivers/gpu/drm/i915/display/intel_display.c | 59 --------------------
2 files changed, 54 insertions(+), 59 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8d486282eea3..39f3e9452aad 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3844,6 +3844,57 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
crtc_state->min_voltage_level = 2;
}
+static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
+{
+ u32 ctl2, master_select;
+
+ ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
+
+ if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
+ return INVALID_TRANSCODER;
+
+ master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
+
+ if (master_select == 0)
+ return TRANSCODER_EDP;
+ else
+ return master_select - 1;
+}
+
+static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
+ u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_D);
+ enum transcoder cpu_transcoder;
+
+ crtc_state->master_transcoder =
+ transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
+
+ for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
+ enum intel_display_power_domain power_domain;
+ intel_wakeref_t trans_wakeref;
+
+ power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
+ trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
+ power_domain);
+
+ if (!trans_wakeref)
+ continue;
+
+ if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
+ crtc_state->cpu_transcoder)
+ crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
+
+ intel_display_power_put(dev_priv, power_domain, trans_wakeref);
+ }
+
+ drm_WARN_ON(&dev_priv->drm,
+ crtc_state->master_transcoder != INVALID_TRANSCODER &&
+ crtc_state->sync_mode_slaves_mask);
+}
+
void intel_ddi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *pipe_config)
{
@@ -3995,6 +4046,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
intel_read_infoframe(encoder, pipe_config,
HDMI_INFOFRAME_TYPE_DRM,
&pipe_config->infoframes.drm);
+
+ if (INTEL_GEN(dev_priv) >= 11)
+ icl_get_trans_port_sync_config(pipe_config);
}
static enum intel_output_type
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 12823d8f6afe..5c5a131db8b4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11049,61 +11049,6 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc,
}
}
-static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
- enum transcoder cpu_transcoder)
-{
- u32 trans_port_sync, master_select;
-
- trans_port_sync = intel_de_read(dev_priv,
- TRANS_DDI_FUNC_CTL2(cpu_transcoder));
-
- if ((trans_port_sync & PORT_SYNC_MODE_ENABLE) == 0)
- return INVALID_TRANSCODER;
-
- master_select = trans_port_sync &
- PORT_SYNC_MODE_MASTER_SELECT_MASK;
- if (master_select == 0)
- return TRANSCODER_EDP;
- else
- return master_select - 1;
-}
-
-static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
-{
- struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- u32 transcoders;
- enum transcoder cpu_transcoder;
-
- crtc_state->master_transcoder = transcoder_master_readout(dev_priv,
- crtc_state->cpu_transcoder);
-
- transcoders = BIT(TRANSCODER_A) |
- BIT(TRANSCODER_B) |
- BIT(TRANSCODER_C) |
- BIT(TRANSCODER_D);
- for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
- enum intel_display_power_domain power_domain;
- intel_wakeref_t trans_wakeref;
-
- power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
- trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
- power_domain);
-
- if (!trans_wakeref)
- continue;
-
- if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
- crtc_state->cpu_transcoder)
- crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
-
- intel_display_power_put(dev_priv, power_domain, trans_wakeref);
- }
-
- drm_WARN_ON(&dev_priv->drm,
- crtc_state->master_transcoder != INVALID_TRANSCODER &&
- crtc_state->sync_mode_slaves_mask);
-}
-
static bool hsw_get_pipe_config(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config)
{
@@ -11235,10 +11180,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
pipe_config->pixel_multiplier = 1;
}
- if (INTEL_GEN(dev_priv) >= 11 &&
- !transcoder_is_dsi(pipe_config->cpu_transcoder))
- icl_get_trans_port_sync_config(pipe_config);
-
out:
for_each_power_domain(power_domain, power_domain_mask)
intel_display_power_put(dev_priv,
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (3 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 22:53 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
` (13 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Clean up the TRANS_DDI_FUNC_CTL2 programming/readout by
using REG_FIELD_PREP() & co.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++----
drivers/gpu/drm/i915/i915_reg.h | 10 ++++------
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 39f3e9452aad..8bb6c583abb8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1573,9 +1573,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
master_select = master_transcoder + 1;
ctl2 |= PORT_SYNC_MODE_ENABLE |
- (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
- PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
- PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
+ PORT_SYNC_MODE_MASTER_SELECT(master_select);
}
intel_de_write(dev_priv,
@@ -3854,7 +3852,7 @@ static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_pr
if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
return INVALID_TRANSCODER;
- master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
+ master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
if (master_select == 0)
return TRANSCODER_EDP;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 309cb7d96b35..fc5c00bfed87 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9726,12 +9726,10 @@ enum skl_power_gate {
#define _TRANS_DDI_FUNC_CTL2_EDP 0x6f404
#define _TRANS_DDI_FUNC_CTL2_DSI0 0x6b404
#define _TRANS_DDI_FUNC_CTL2_DSI1 0x6bc04
-#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \
- _TRANS_DDI_FUNC_CTL2_A)
-#define PORT_SYNC_MODE_ENABLE (1 << 4)
-#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) << 0)
-#define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0)
-#define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0
+#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, _TRANS_DDI_FUNC_CTL2_A)
+#define PORT_SYNC_MODE_ENABLE REG_BIT(4)
+#define PORT_SYNC_MODE_MASTER_SELECT_MASK REG_GENMASK(2, 0)
+#define PORT_SYNC_MODE_MASTER_SELECT(x) REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))
/* DisplayPort Transport Control */
#define _DP_TP_CTL_A 0x64040
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (4 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 23:00 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
` (12 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Dump the port sync stat in intel_dump_pipe_config().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 5c5a131db8b4..4840988dc58d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12947,6 +12947,11 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
transcoder_name(pipe_config->cpu_transcoder),
pipe_config->pipe_bpp, pipe_config->dither);
+ drm_dbg_kms(&dev_priv->drm,
+ "port sync: master transcoder: %s, slave transcoder bitmask = 0x%x\n",
+ transcoder_name(pipe_config->master_transcoder),
+ pipe_config->sync_mode_slaves_mask);
+
if (pipe_config->has_pch_encoder)
intel_dump_m_n_config(pipe_config, "fdi",
pipe_config->fdi_lanes,
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (5 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 17:02 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
` (11 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We have a bunch of code that would like to know which
CPU transcoders are actually present in the hardware. Rather than
use various ad-hoc methods let's just include a full bitmask in
the device info, alongside pipe_mask.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +--
drivers/gpu/drm/i915/display/intel_display.c | 13 +------
drivers/gpu/drm/i915/display/intel_display.h | 8 +++-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 23 ++++++++++-
drivers/gpu/drm/i915/intel_device_info.c | 41 +++++++++++++-------
drivers/gpu/drm/i915/intel_device_info.h | 1 +
7 files changed, 62 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8bb6c583abb8..0fea2ec2cdd8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1689,7 +1689,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
goto out;
}
- if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
cpu_transcoder = TRANSCODER_EDP;
else
cpu_transcoder = (enum transcoder) pipe;
@@ -1751,7 +1751,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
if (!(tmp & DDI_BUF_CTL_ENABLE))
goto out;
- if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A) {
tmp = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
@@ -4076,7 +4076,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
enum port port = encoder->port;
int ret;
- if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
pipe_config->cpu_transcoder = TRANSCODER_EDP;
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4840988dc58d..292cac64f1ac 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10855,7 +10855,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
panel_transcoder_mask |=
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
- if (HAS_TRANSCODER_EDP(dev_priv))
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP))
panel_transcoder_mask |= BIT(TRANSCODER_EDP);
/*
@@ -18712,15 +18712,6 @@ void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
-static bool
-has_transcoder(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder)
-{
- if (cpu_transcoder == TRANSCODER_EDP)
- return HAS_TRANSCODER_EDP(dev_priv);
- else
- return INTEL_INFO(dev_priv)->pipe_mask & BIT(cpu_transcoder);
-}
-
struct intel_display_error_state {
u32 power_well_driver;
@@ -18829,7 +18820,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
enum transcoder cpu_transcoder = transcoders[i];
- if (!has_transcoder(dev_priv, cpu_transcoder))
+ if (!HAS_TRANSCODER(dev_priv, cpu_transcoder))
continue;
error->transcoder[i].available = true;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index adb1225a3480..cc7f287804d7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -320,9 +320,13 @@ enum phy_fia {
for_each_pipe(__dev_priv, __p) \
for_each_if((__mask) & BIT(__p))
-#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+#define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
- for_each_if ((__mask) & (1 << (__t)))
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
+
+#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+ for_each_cpu_transcoder(__dev_priv, __t) \
+ for_each_if ((__mask) & BIT(__t))
#define for_each_universal_plane(__dev_priv, __pipe, __p) \
for ((__p) = 0; \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 19195bde4921..c4a8c762136f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1604,7 +1604,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
#define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
-#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
+#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0)
#define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
#define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index f2b22c563a2b..73c77b33059f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -160,6 +160,7 @@
GEN(2), \
.is_mobile = 1, \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_overlay = 1, \
.display.cursor_needs_physical = 1, \
.display.overlay_needs_physical = 1, \
@@ -179,6 +180,7 @@
#define I845_FEATURES \
GEN(2), \
.pipe_mask = BIT(PIPE_A), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A), \
.display.has_overlay = 1, \
.display.overlay_needs_physical = 1, \
.display.has_gmch = 1, \
@@ -218,6 +220,7 @@ static const struct intel_device_info i865g_info = {
#define GEN3_FEATURES \
GEN(3), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
.engine_mask = BIT(RCS0), \
@@ -303,6 +306,7 @@ static const struct intel_device_info pnv_m_info = {
#define GEN4_FEATURES \
GEN(4), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
@@ -354,6 +358,7 @@ static const struct intel_device_info gm45_info = {
#define GEN5_FEATURES \
GEN(5), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0), \
.has_snoop = true, \
@@ -381,6 +386,7 @@ static const struct intel_device_info ilk_m_info = {
#define GEN6_FEATURES \
GEN(6), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.display.has_fbc = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
@@ -430,6 +436,7 @@ static const struct intel_device_info snb_m_gt2_info = {
#define GEN7_FEATURES \
GEN(7), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C), \
.display.has_hotplug = 1, \
.display.has_fbc = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
@@ -482,6 +489,7 @@ static const struct intel_device_info ivb_q_info = {
PLATFORM(INTEL_IVYBRIDGE),
.gt = 2,
.pipe_mask = 0, /* legal, last one wins */
+ .cpu_transcoder_mask = 0,
.has_l3_dpf = 1,
};
@@ -490,6 +498,7 @@ static const struct intel_device_info vlv_info = {
GEN(7),
.is_lp = 1,
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
.has_runtime_pm = 1,
.has_rc6 = 1,
.has_rps = true,
@@ -511,6 +520,8 @@ static const struct intel_device_info vlv_info = {
#define G75_FEATURES \
GEN7_FEATURES, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
.display.has_ddi = 1, \
.has_fpga_dbg = 1, \
.display.has_psr = 1, \
@@ -581,6 +592,7 @@ static const struct intel_device_info chv_info = {
PLATFORM(INTEL_CHERRYVIEW),
GEN(8),
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
.display.has_hotplug = 1,
.is_lp = 1,
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
@@ -656,6 +668,9 @@ static const struct intel_device_info skl_gt4_info = {
.display.has_hotplug = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
+ BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
.has_64bit_reloc = 1, \
.display.has_ddi = 1, \
.has_fpga_dbg = 1, \
@@ -759,6 +774,9 @@ static const struct intel_device_info cnl_info = {
#define GEN11_FEATURES \
GEN10_FEATURES, \
GEN11_DEFAULT_PAGE_SIZES, \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
+ BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
.pipe_offsets = { \
[TRANSCODER_A] = PIPE_A_OFFSET, \
[TRANSCODER_B] = PIPE_B_OFFSET, \
@@ -799,6 +817,10 @@ static const struct intel_device_info ehl_info = {
#define GEN12_FEATURES \
GEN11_FEATURES, \
GEN(12), \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \
+ BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
.pipe_offsets = { \
[TRANSCODER_A] = PIPE_A_OFFSET, \
[TRANSCODER_B] = PIPE_B_OFFSET, \
@@ -822,7 +844,6 @@ static const struct intel_device_info ehl_info = {
static const struct intel_device_info tgl_info = {
GEN12_FEATURES,
PLATFORM(INTEL_TIGERLAKE),
- .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
.require_force_probe = 1,
.display.has_modular_fia = 1,
.engine_mask =
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index d7fe12734db8..4d031b236955 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -980,35 +980,48 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
drm_info(&dev_priv->drm,
"Display fused off, disabling\n");
info->pipe_mask = 0;
+ info->cpu_transcoder_mask = 0;
} else if (fuse_strap & IVB_PIPE_C_DISABLE) {
drm_info(&dev_priv->drm, "PipeC fused off\n");
info->pipe_mask &= ~BIT(PIPE_C);
+ info->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
}
} else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
u32 dfsm = I915_READ(SKL_DFSM);
- u8 enabled_mask = info->pipe_mask;
+ u8 pipe_mask = info->pipe_mask;
+ u8 cpu_transcoder_mask = info->cpu_transcoder_mask;
- if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
- enabled_mask &= ~BIT(PIPE_A);
- if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
- enabled_mask &= ~BIT(PIPE_B);
- if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
- enabled_mask &= ~BIT(PIPE_C);
+ if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
+ pipe_mask &= ~BIT(PIPE_A);
+ cpu_transcoder_mask &= ~BIT(TRANSCODER_A);
+ }
+ if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
+ pipe_mask &= ~BIT(PIPE_B);
+ cpu_transcoder_mask &= ~BIT(TRANSCODER_B);
+ }
+ if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
+ pipe_mask &= ~BIT(PIPE_C);
+ cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
+ }
if (INTEL_GEN(dev_priv) >= 12 &&
- (dfsm & TGL_DFSM_PIPE_D_DISABLE))
- enabled_mask &= ~BIT(PIPE_D);
+ (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
+ pipe_mask &= ~BIT(PIPE_D);
+ cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
+ }
/*
* At least one pipe should be enabled and if there are
* disabled pipes, they should be the last ones, with no holes
* in the mask.
*/
- if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1))
+ if (pipe_mask == 0 || !is_power_of_2(pipe_mask + 1)) {
drm_err(&dev_priv->drm,
- "invalid pipe fuse configuration: enabled_mask=0x%x\n",
- enabled_mask);
- else
- info->pipe_mask = enabled_mask;
+ "invalid pipe fuse configuration: pipe_mask=0x%x\n",
+ pipe_mask);
+ } else {
+ info->pipe_mask = pipe_mask;
+ info->cpu_transcoder_mask = cpu_transcoder_mask;
+ }
if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
info->display.has_hdcp = 0;
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 1ecb9df2de91..cce6a72c5ebc 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -168,6 +168,7 @@ struct intel_device_info {
u32 display_mmio_offset;
u8 pipe_mask;
+ u8 cpu_transcoder_mask;
#define DEFINE_FLAG(name) u8 name:1
DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (6 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-03-18 23:32 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
` (10 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Transcoder port sync was introduced to the hardware in BDW. We
can trivially enable it for SKL+ since the same codepaths are
already used for ICL+ port sync. The only difference is the actual
location of the bits we need to poke.
We leave BDW out (at least for now) since it uses different modeset
paths that haven't been adapted for port sync, and IIRC using the
feature would involve some extra workarounds we've not implemented.
Pre-BDW hardware does not support port sync so we'd have to tweak
the modeset sequence to start the pipes as close together as possible
and hope for the best. So far no one has seriously tried to implement
that.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/27
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 70 +++++++++++++++++-------
drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
drivers/gpu/drm/i915/i915_reg.h | 3 +
3 files changed, 59 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 0fea2ec2cdd8..9e6eb0ee5ba4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1450,6 +1450,14 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
intel_de_write(dev_priv, TRANS_MSA_MISC(cpu_transcoder), temp);
}
+static u32 bdw_trans_port_sync_master_select(enum transcoder master_transcoder)
+{
+ if (master_transcoder == TRANSCODER_EDP)
+ return 0;
+ else
+ return master_transcoder + 1;
+}
+
/*
* Returns the TRANS_DDI_FUNC_CTL value based on CRTC state.
*
@@ -1550,6 +1558,15 @@ intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state)
temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
}
+ if (IS_GEN_RANGE(dev_priv, 8, 10) &&
+ crtc_state->master_transcoder != INVALID_TRANSCODER) {
+ u8 master_select =
+ bdw_trans_port_sync_master_select(crtc_state->master_transcoder);
+
+ temp |= TRANS_DDI_PORT_SYNC_ENABLE |
+ TRANS_DDI_PORT_SYNC_MASTER_SELECT(master_select);
+ }
+
return temp;
}
@@ -1565,12 +1582,8 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
u32 ctl2 = 0;
if (master_transcoder != INVALID_TRANSCODER) {
- u8 master_select;
-
- if (master_transcoder == TRANSCODER_EDP)
- master_select = 0;
- else
- master_select = master_transcoder + 1;
+ u8 master_select =
+ bdw_trans_port_sync_master_select(master_transcoder);
ctl2 |= PORT_SYNC_MODE_ENABLE |
PORT_SYNC_MODE_MASTER_SELECT(master_select);
@@ -1614,8 +1627,13 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+
ctl &= ~TRANS_DDI_FUNC_ENABLE;
+ if (IS_GEN_RANGE(dev_priv, 8, 10))
+ ctl &= ~(TRANS_DDI_PORT_SYNC_ENABLE |
+ TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK);
+
if (INTEL_GEN(dev_priv) >= 12) {
if (!intel_dp_mst_is_master_trans(crtc_state)) {
ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
@@ -1624,6 +1642,7 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
} else {
ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
}
+
intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
@@ -3842,17 +3861,26 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
crtc_state->min_voltage_level = 2;
}
-static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
- enum transcoder cpu_transcoder)
+static enum transcoder bdw_transcoder_master_readout(struct drm_i915_private *dev_priv,
+ enum transcoder cpu_transcoder)
{
- u32 ctl2, master_select;
+ u32 master_select;
- ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
+ if (INTEL_GEN(dev_priv) >= 11) {
+ u32 ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
- if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
- return INVALID_TRANSCODER;
+ if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
+ return INVALID_TRANSCODER;
- master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
+ master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
+ } else {
+ u32 ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
+
+ if ((ctl & TRANS_DDI_PORT_SYNC_ENABLE) == 0)
+ return INVALID_TRANSCODER;
+
+ master_select = REG_FIELD_GET(TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK, ctl);
+ }
if (master_select == 0)
return TRANSCODER_EDP;
@@ -3860,7 +3888,7 @@ static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_pr
return master_select - 1;
}
-static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
+static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
@@ -3868,7 +3896,7 @@ static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
enum transcoder cpu_transcoder;
crtc_state->master_transcoder =
- transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
+ bdw_transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
enum intel_display_power_domain power_domain;
@@ -3881,7 +3909,7 @@ static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
if (!trans_wakeref)
continue;
- if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
+ if (bdw_transcoder_master_readout(dev_priv, cpu_transcoder) ==
crtc_state->cpu_transcoder)
crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
@@ -4045,8 +4073,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
HDMI_INFOFRAME_TYPE_DRM,
&pipe_config->infoframes.drm);
- if (INTEL_GEN(dev_priv) >= 11)
- icl_get_trans_port_sync_config(pipe_config);
+ if (INTEL_GEN(dev_priv) >= 8)
+ bdw_get_trans_port_sync_config(pipe_config);
}
static enum intel_output_type
@@ -4148,7 +4176,11 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
u8 transcoders = 0;
int i;
- if (INTEL_GEN(dev_priv) < 11)
+ /*
+ * We don't enable port sync on BDW due to missing w/as and
+ * due to not having adjusted the modeset sequence appropriately.
+ */
+ if (INTEL_GEN(dev_priv) < 9)
return 0;
if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0a417cd2af2b..89d54f5fe60b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6724,7 +6724,11 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
if (ret)
return ret;
- if (INTEL_GEN(dev_priv) < 11)
+ /*
+ * We don't enable port sync on BDW due to missing w/as and
+ * due to not having adjusted the modeset sequence appropriately.
+ */
+ if (INTEL_GEN(dev_priv) < 9)
return 0;
if (!intel_connector_needs_modeset(state, conn))
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index fc5c00bfed87..fdee1da801bf 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9698,8 +9698,11 @@ enum skl_power_gate {
#define TRANS_DDI_BPC_10 (1 << 20)
#define TRANS_DDI_BPC_6 (2 << 20)
#define TRANS_DDI_BPC_12 (3 << 20)
+#define TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK REG_GENMASK(19, 18) /* bdw-cnl */
+#define TRANS_DDI_PORT_SYNC_MASTER_SELECT(x) REG_FIELD_PREP(TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK, (x))
#define TRANS_DDI_PVSYNC (1 << 17)
#define TRANS_DDI_PHSYNC (1 << 16)
+#define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15) /* bdw-cnl */
#define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
#define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
#define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (7 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-04-02 1:25 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
` (9 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Remove the copy pasted port sync crtc enable functions and instead
just split the normal function into the two parts we need.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 128 +++++++------------
1 file changed, 45 insertions(+), 83 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 292cac64f1ac..b56a5a49418f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -14909,11 +14909,13 @@ static void intel_pipe_fastset(const struct intel_crtc_state *old_crtc_state,
}
static void commit_pipe_config(struct intel_atomic_state *state,
- struct intel_crtc_state *old_crtc_state,
- struct intel_crtc_state *new_crtc_state)
+ struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(new_crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
bool modeset = needs_modeset(new_crtc_state);
/*
@@ -14939,22 +14941,35 @@ static void commit_pipe_config(struct intel_atomic_state *state,
dev_priv->display.atomic_update_watermarks(state, crtc);
}
-static void intel_update_crtc(struct intel_crtc *crtc,
- struct intel_atomic_state *state,
- struct intel_crtc_state *old_crtc_state,
- struct intel_crtc_state *new_crtc_state)
+static void intel_enable_crtc(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ const struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
+
+ if (!needs_modeset(new_crtc_state))
+ return;
+
+ intel_crtc_update_active_timings(new_crtc_state);
+
+ dev_priv->display.crtc_enable(state, crtc);
+
+ /* vblanks work again, re-enable pipe CRC. */
+ intel_crtc_enable_pipe_crc(crtc);
+}
+
+static void intel_update_crtc(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
+ const struct intel_crtc_state *old_crtc_state =
+ intel_atomic_get_old_crtc_state(state, crtc);
+ struct intel_crtc_state *new_crtc_state =
+ intel_atomic_get_new_crtc_state(state, crtc);
bool modeset = needs_modeset(new_crtc_state);
- if (modeset) {
- intel_crtc_update_active_timings(new_crtc_state);
-
- dev_priv->display.crtc_enable(state, crtc);
-
- /* vblanks work again, re-enable pipe CRC. */
- intel_crtc_enable_pipe_crc(crtc);
- } else {
+ if (!modeset) {
if (new_crtc_state->preload_luts &&
(new_crtc_state->uapi.color_mgmt_changed ||
new_crtc_state->update_pipe))
@@ -14974,7 +14989,7 @@ static void intel_update_crtc(struct intel_crtc *crtc,
/* Perform vblank evasion around commit operation */
intel_pipe_update_start(new_crtc_state);
- commit_pipe_config(state, old_crtc_state, new_crtc_state);
+ commit_pipe_config(state, crtc);
if (INTEL_GEN(dev_priv) >= 9)
skl_update_planes_on_crtc(state, crtc);
@@ -15081,30 +15096,19 @@ static void intel_commit_modeset_disables(struct intel_atomic_state *state)
static void intel_commit_modeset_enables(struct intel_atomic_state *state)
{
+ struct intel_crtc_state *new_crtc_state;
struct intel_crtc *crtc;
- struct intel_crtc_state *old_crtc_state, *new_crtc_state;
int i;
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
if (!new_crtc_state->hw.active)
continue;
- intel_update_crtc(crtc, state, old_crtc_state,
- new_crtc_state);
+ intel_enable_crtc(state, crtc);
+ intel_update_crtc(state, crtc);
}
}
-static void intel_crtc_enable_trans_port_sync(struct intel_crtc *crtc,
- struct intel_atomic_state *state,
- struct intel_crtc_state *new_crtc_state)
-{
- struct drm_i915_private *dev_priv = to_i915(state->base.dev);
-
- intel_crtc_update_active_timings(new_crtc_state);
- dev_priv->display.crtc_enable(state, crtc);
- intel_crtc_enable_pipe_crc(crtc);
-}
-
static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
struct intel_atomic_state *state)
{
@@ -15121,41 +15125,6 @@ static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
intel_dp_stop_link_train(intel_dp);
}
-/*
- * TODO: This is only called from port sync and it is identical to what will be
- * executed again in intel_update_crtc() over port sync pipes
- */
-static void intel_post_crtc_enable_updates(struct intel_crtc *crtc,
- struct intel_atomic_state *state)
-{
- struct intel_crtc_state *new_crtc_state =
- intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_crtc_state *old_crtc_state =
- intel_atomic_get_old_crtc_state(state, crtc);
- bool modeset = needs_modeset(new_crtc_state);
-
- if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
- intel_fbc_disable(crtc);
- else
- intel_fbc_enable(state, crtc);
-
- /* Perform vblank evasion around commit operation */
- intel_pipe_update_start(new_crtc_state);
- commit_pipe_config(state, old_crtc_state, new_crtc_state);
- skl_update_planes_on_crtc(state, crtc);
- intel_pipe_update_end(new_crtc_state);
-
- /*
- * We usually enable FIFO underrun interrupts as part of the
- * CRTC enable sequence during modesets. But when we inherit a
- * valid pipe configuration from the BIOS we need to take care
- * of enabling them on the CRTC's first fastset.
- */
- if (new_crtc_state->update_pipe && !modeset &&
- old_crtc_state->hw.mode.private_flags & I915_MODE_FLAG_INHERITED)
- intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
-}
-
static void intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
struct intel_atomic_state *state,
struct intel_crtc_state *old_crtc_state,
@@ -15179,14 +15148,10 @@ static void intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
/* Enable seq for slave with with DP_TP_CTL left Idle until the
* master is ready
*/
- intel_crtc_enable_trans_port_sync(slave_crtc,
- state,
- new_slave_crtc_state);
+ intel_enable_crtc(state, slave_crtc);
/* Enable seq for master with with DP_TP_CTL left Idle */
- intel_crtc_enable_trans_port_sync(crtc,
- state,
- new_crtc_state);
+ intel_enable_crtc(state, crtc);
/* Set Slave's DP_TP_CTL to Normal */
intel_set_dp_tp_ctl_normal(slave_crtc,
@@ -15198,10 +15163,8 @@ static void intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
state);
/* Now do the post crtc enable for all master and slaves */
- intel_post_crtc_enable_updates(slave_crtc,
- state);
- intel_post_crtc_enable_updates(crtc,
- state);
+ intel_update_crtc(state, slave_crtc);
+ intel_update_crtc(state, crtc);
}
static void icl_dbuf_slice_pre_update(struct intel_atomic_state *state)
@@ -15275,8 +15238,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
entries[pipe] = new_crtc_state->wm.skl.ddb;
update_pipes &= ~BIT(pipe);
- intel_update_crtc(crtc, state, old_crtc_state,
- new_crtc_state);
+ intel_update_crtc(state, crtc);
/*
* If this is an already active pipe, it's DDB changed,
@@ -15324,8 +15286,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
modeset_pipes &= ~BIT(slave_crtc->pipe);
} else {
- intel_update_crtc(crtc, state, old_crtc_state,
- new_crtc_state);
+ intel_enable_crtc(state, crtc);
+ intel_update_crtc(state, crtc);
}
}
@@ -15334,8 +15296,7 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
* other pipes, right now it is only MST slaves as both port sync slave
* and master are enabled together
*/
- for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
- new_crtc_state, i) {
+ for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
enum pipe pipe = crtc->pipe;
if ((modeset_pipes & BIT(pipe)) == 0)
@@ -15347,7 +15308,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
entries[pipe] = new_crtc_state->wm.skl.ddb;
modeset_pipes &= ~BIT(pipe);
- intel_update_crtc(crtc, state, old_crtc_state, new_crtc_state);
+ intel_enable_crtc(state, crtc);
+ intel_update_crtc(state, crtc);
}
drm_WARN_ON(&dev_priv->drm, modeset_pipes);
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (8 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-04-03 0:32 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
` (8 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Don't assume there is just one port sync slave. We might have several.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 98 ++++++++++----------
1 file changed, 49 insertions(+), 49 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b56a5a49418f..33f38c8a5da4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15009,18 +15009,6 @@ static void intel_update_crtc(struct intel_atomic_state *state,
intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
}
-static struct intel_crtc *intel_get_slave_crtc(const struct intel_crtc_state *new_crtc_state)
-{
- struct drm_i915_private *dev_priv = to_i915(new_crtc_state->uapi.crtc->dev);
- enum transcoder slave_transcoder;
-
- drm_WARN_ON(&dev_priv->drm,
- !is_power_of_2(new_crtc_state->sync_mode_slaves_mask));
-
- slave_transcoder = ffs(new_crtc_state->sync_mode_slaves_mask) - 1;
- return intel_get_crtc_for_pipe(dev_priv,
- (enum pipe)slave_transcoder);
-}
static void intel_old_crtc_state_disables(struct intel_atomic_state *state,
struct intel_crtc_state *old_crtc_state,
@@ -15109,8 +15097,8 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
}
}
-static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
- struct intel_atomic_state *state)
+static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct drm_connector *uninitialized_var(conn);
struct drm_connector_state *conn_state;
@@ -15125,45 +15113,55 @@ static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
intel_dp_stop_link_train(intel_dp);
}
-static void intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
- struct intel_atomic_state *state,
- struct intel_crtc_state *old_crtc_state,
- struct intel_crtc_state *new_crtc_state)
+static void intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
- struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- struct intel_crtc *slave_crtc = intel_get_slave_crtc(new_crtc_state);
- struct intel_crtc_state *new_slave_crtc_state =
- intel_atomic_get_new_crtc_state(state, slave_crtc);
- struct intel_crtc_state *old_slave_crtc_state =
- intel_atomic_get_old_crtc_state(state, slave_crtc);
+ struct drm_i915_private *i915 = to_i915(state->base.dev);
+ const struct intel_crtc_state *new_slave_crtc_state;
+ const struct intel_crtc_state *new_crtc_state;
+ struct intel_crtc *slave_crtc;
+ int i;
- drm_WARN_ON(&i915->drm, !slave_crtc || !new_slave_crtc_state ||
- !old_slave_crtc_state);
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
+
+ drm_dbg_kms(&i915->drm,
+ "Updating transcoder port sync slave [CRTC:%d:%s]\n",
+ slave_crtc->base.base.id, slave_crtc->base.name);
+
+ intel_enable_crtc(state, slave_crtc);
+ }
drm_dbg_kms(&i915->drm,
- "Updating Transcoder Port Sync Master CRTC = %d %s and Slave CRTC %d %s\n",
- crtc->base.base.id, crtc->base.name,
- slave_crtc->base.base.id, slave_crtc->base.name);
+ "Updating transcoder port sync master [CRTC:%d:%s]\n",
+ crtc->base.base.id, crtc->base.name);
- /* Enable seq for slave with with DP_TP_CTL left Idle until the
- * master is ready
- */
- intel_enable_crtc(state, slave_crtc);
-
- /* Enable seq for master with with DP_TP_CTL left Idle */
intel_enable_crtc(state, crtc);
- /* Set Slave's DP_TP_CTL to Normal */
- intel_set_dp_tp_ctl_normal(slave_crtc,
- state);
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
+
+ intel_set_dp_tp_ctl_normal(state, slave_crtc);
+ }
- /* Set Master's DP_TP_CTL To Normal */
usleep_range(200, 400);
- intel_set_dp_tp_ctl_normal(crtc,
- state);
+ intel_set_dp_tp_ctl_normal(state, crtc);
+
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ if (new_slave_crtc_state->master_transcoder !=
+ new_crtc_state->cpu_transcoder)
+ continue;
+
+ intel_update_crtc(state, slave_crtc);
+ }
- /* Now do the post crtc enable for all master and slaves */
- intel_update_crtc(state, slave_crtc);
intel_update_crtc(state, crtc);
}
@@ -15275,16 +15273,18 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
modeset_pipes &= ~BIT(pipe);
if (is_trans_port_sync_mode(new_crtc_state)) {
+ const struct intel_crtc_state *new_slave_crtc_state;
struct intel_crtc *slave_crtc;
+ int i;
- intel_update_trans_port_sync_crtcs(crtc, state,
- old_crtc_state,
- new_crtc_state);
+ intel_update_trans_port_sync_crtcs(state, crtc);
- slave_crtc = intel_get_slave_crtc(new_crtc_state);
- /* TODO: update entries[] of slave */
- modeset_pipes &= ~BIT(slave_crtc->pipe);
+ for_each_new_intel_crtc_in_state(state, slave_crtc,
+ new_slave_crtc_state, i) {
+ /* TODO: update entries[] of slave */
+ modeset_pipes &= ~BIT(slave_crtc->pipe);
+ }
} else {
intel_enable_crtc(state, crtc);
intel_update_crtc(state, crtc);
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (9 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-04-03 0:44 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
` (7 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently only port sync pipes do the sequence such that
we first do the modeset part for every pipe and then do
the plane/etc. updates. Let's follow that apporach for
all pipes in skl+ so that we can properly integrate the
port sync into the normal modeset flow.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 44 ++++++++++----------
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 33f38c8a5da4..3926ac8f1f10 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15152,17 +15152,6 @@ static void intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
usleep_range(200, 400);
intel_set_dp_tp_ctl_normal(state, crtc);
-
- for_each_new_intel_crtc_in_state(state, slave_crtc,
- new_slave_crtc_state, i) {
- if (new_slave_crtc_state->master_transcoder !=
- new_crtc_state->cpu_transcoder)
- continue;
-
- intel_update_crtc(state, slave_crtc);
- }
-
- intel_update_crtc(state, crtc);
}
static void icl_dbuf_slice_pre_update(struct intel_atomic_state *state)
@@ -15251,6 +15240,8 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
}
}
+ update_pipes = modeset_pipes;
+
/*
* Enable all pipes that needs a modeset and do not depends on other
* pipes
@@ -15266,10 +15257,6 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
is_trans_port_sync_slave(new_crtc_state))
continue;
- drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
- entries, I915_MAX_PIPES, pipe));
-
- entries[pipe] = new_crtc_state->wm.skl.ddb;
modeset_pipes &= ~BIT(pipe);
if (is_trans_port_sync_mode(new_crtc_state)) {
@@ -15287,14 +15274,13 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
}
} else {
intel_enable_crtc(state, crtc);
- intel_update_crtc(state, crtc);
}
}
/*
- * Finally enable all pipes that needs a modeset and depends on
- * other pipes, right now it is only MST slaves as both port sync slave
- * and master are enabled together
+ * Then we enable all remaining pipes that depend on other
+ * pipes, right now it is only MST slaves as both port sync
+ * slave and master are enabled together
*/
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
enum pipe pipe = crtc->pipe;
@@ -15302,18 +15288,32 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
if ((modeset_pipes & BIT(pipe)) == 0)
continue;
+ modeset_pipes &= ~BIT(pipe);
+
+ intel_enable_crtc(state, crtc);
+ }
+
+ /*
+ * Finally we do the plane updates/etc. for all pipes that got enabled.
+ */
+ for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
+ new_crtc_state, i) {
+ enum pipe pipe = crtc->pipe;
+
+ if ((update_pipes & BIT(pipe)) == 0)
+ continue;
+
drm_WARN_ON(&dev_priv->drm, skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
entries, I915_MAX_PIPES, pipe));
entries[pipe] = new_crtc_state->wm.skl.ddb;
- modeset_pipes &= ~BIT(pipe);
+ update_pipes &= ~BIT(pipe);
- intel_enable_crtc(state, crtc);
intel_update_crtc(state, crtc);
}
drm_WARN_ON(&dev_priv->drm, modeset_pipes);
-
+ drm_WARN_ON(&dev_priv->drm, update_pipes);
}
static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv)
--
2.24.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (10 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-04-02 1:18 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
` (6 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're going to want access to the atomic state for iterating
the slave crtcs when enabling the port sync master crtc. Pass
the atomic state all the way down.
The alternative would be yet another encoder hook which we'll
have to call after all the normal modeset stuff is done. Not
really a fan of yet another hook just for this.
Note that during readout state sanitation we are now going
to pass NULL as the atomic state since we don't have one.
We need to change that and then we can also s/crtc_state/crtc/
and s/conn_state/conn/ for the encoder hooks as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 15 ++--
drivers/gpu/drm/i915/display/intel_crt.c | 33 ++++---
drivers/gpu/drm/i915/display/intel_ddi.c | 89 ++++++++++++-------
drivers/gpu/drm/i915/display/intel_ddi.h | 3 +-
drivers/gpu/drm/i915/display/intel_display.c | 26 ++++--
.../drm/i915/display/intel_display_types.h | 21 +++--
drivers/gpu/drm/i915/display/intel_dp.c | 55 +++++++-----
drivers/gpu/drm/i915/display/intel_dp_mst.c | 21 +++--
drivers/gpu/drm/i915/display/intel_dvo.c | 9 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 3 +-
drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 59 +++++++-----
drivers/gpu/drm/i915/display/intel_lvds.c | 22 +++--
drivers/gpu/drm/i915/display/intel_panel.c | 3 +-
drivers/gpu/drm/i915/display/intel_panel.h | 3 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 17 ++--
drivers/gpu/drm/i915/display/intel_tv.c | 9 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 12 ++-
18 files changed, 260 insertions(+), 144 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 17cee6f80d8b..ea9907c3e5ba 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1088,7 +1088,8 @@ static void gen11_dsi_powerup_panel(struct intel_encoder *encoder)
wait_for_cmds_dispatched_to_panel(encoder);
}
-static void gen11_dsi_pre_pll_enable(struct intel_encoder *encoder,
+static void gen11_dsi_pre_pll_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -1099,7 +1100,8 @@ static void gen11_dsi_pre_pll_enable(struct intel_encoder *encoder,
gen11_dsi_program_esc_clk_div(encoder, crtc_state);
}
-static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
+static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -1118,7 +1120,8 @@ static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
gen11_dsi_set_transcoder_timings(encoder, pipe_config);
}
-static void gen11_dsi_enable(struct intel_encoder *encoder,
+static void gen11_dsi_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -1264,7 +1267,8 @@ static void gen11_dsi_disable_io_power(struct intel_encoder *encoder)
}
}
-static void gen11_dsi_disable(struct intel_encoder *encoder,
+static void gen11_dsi_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -1290,7 +1294,8 @@ static void gen11_dsi_disable(struct intel_encoder *encoder,
gen11_dsi_disable_io_power(encoder);
}
-static void gen11_dsi_post_disable(struct intel_encoder *encoder,
+static void gen11_dsi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 78f9b6cde810..80c91404046f 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -203,27 +203,31 @@ static void intel_crt_set_dpms(struct intel_encoder *encoder,
intel_de_write(dev_priv, crt->adpa_reg, adpa);
}
-static void intel_disable_crt(struct intel_encoder *encoder,
+static void intel_disable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
intel_crt_set_dpms(encoder, old_crtc_state, DRM_MODE_DPMS_OFF);
}
-static void pch_disable_crt(struct intel_encoder *encoder,
+static void pch_disable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
}
-static void pch_post_disable_crt(struct intel_encoder *encoder,
+static void pch_post_disable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_disable_crt(encoder, old_crtc_state, old_conn_state);
+ intel_disable_crt(state, encoder, old_crtc_state, old_conn_state);
}
-static void hsw_disable_crt(struct intel_encoder *encoder,
+static void hsw_disable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -234,7 +238,8 @@ static void hsw_disable_crt(struct intel_encoder *encoder,
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
}
-static void hsw_post_disable_crt(struct intel_encoder *encoder,
+static void hsw_post_disable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -250,19 +255,20 @@ static void hsw_post_disable_crt(struct intel_encoder *encoder,
intel_ddi_disable_pipe_clock(old_crtc_state);
- pch_post_disable_crt(encoder, old_crtc_state, old_conn_state);
+ pch_post_disable_crt(state, encoder, old_crtc_state, old_conn_state);
lpt_disable_pch_transcoder(dev_priv);
lpt_disable_iclkip(dev_priv);
- intel_ddi_fdi_post_disable(encoder, old_crtc_state, old_conn_state);
+ intel_ddi_fdi_post_disable(state, encoder, old_crtc_state, old_conn_state);
drm_WARN_ON(&dev_priv->drm, !old_crtc_state->has_pch_encoder);
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
-static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
+static void hsw_pre_pll_enable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -273,7 +279,8 @@ static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
}
-static void hsw_pre_enable_crt(struct intel_encoder *encoder,
+static void hsw_pre_enable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -290,7 +297,8 @@ static void hsw_pre_enable_crt(struct intel_encoder *encoder,
intel_ddi_enable_pipe_clock(crtc_state);
}
-static void hsw_enable_crt(struct intel_encoder *encoder,
+static void hsw_enable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -314,7 +322,8 @@ static void hsw_enable_crt(struct intel_encoder *encoder,
intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
}
-static void intel_enable_crt(struct intel_encoder *encoder,
+static void intel_enable_crt(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9e6eb0ee5ba4..98475c81f1da 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3017,7 +3017,8 @@ static void intel_ddi_disable_fec_state(struct intel_encoder *encoder,
intel_de_posting_read(dev_priv, intel_dp->regs.dp_tp_ctl);
}
-static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
+static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3157,7 +3158,8 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
intel_dsc_enable(encoder, crtc_state);
}
-static void hsw_ddi_pre_enable_dp(struct intel_encoder *encoder,
+static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3230,16 +3232,17 @@ static void hsw_ddi_pre_enable_dp(struct intel_encoder *encoder,
intel_dsc_enable(encoder, crtc_state);
}
-static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
+static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
if (INTEL_GEN(dev_priv) >= 12)
- tgl_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
+ tgl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
else
- hsw_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
+ hsw_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
/* MST will call a setting of MSA after an allocating of Virtual Channel
* from MST encoder pre_enable callback.
@@ -3251,7 +3254,8 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
}
}
-static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
+static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3291,7 +3295,8 @@ static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
crtc_state, conn_state);
}
-static void intel_ddi_pre_enable(struct intel_encoder *encoder,
+static void intel_ddi_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3320,12 +3325,14 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder,
intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
- intel_ddi_pre_enable_hdmi(encoder, crtc_state, conn_state);
+ intel_ddi_pre_enable_hdmi(state, encoder, crtc_state,
+ conn_state);
} else {
struct intel_lspcon *lspcon =
enc_to_intel_lspcon(encoder);
- intel_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
+ intel_ddi_pre_enable_dp(state, encoder, crtc_state,
+ conn_state);
if (lspcon->active) {
struct intel_digital_port *dig_port =
enc_to_dig_port(encoder);
@@ -3368,7 +3375,8 @@ static void intel_disable_ddi_buf(struct intel_encoder *encoder,
intel_wait_ddi_buf_idle(dev_priv, port);
}
-static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
+static void intel_ddi_post_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3424,7 +3432,8 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
intel_ddi_clk_disable(encoder);
}
-static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
+static void intel_ddi_post_disable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3447,7 +3456,8 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
}
-static void intel_ddi_post_disable(struct intel_encoder *encoder,
+static void intel_ddi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3485,11 +3495,11 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
*/
if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
- intel_ddi_post_disable_hdmi(encoder,
- old_crtc_state, old_conn_state);
+ intel_ddi_post_disable_hdmi(state, encoder, old_crtc_state,
+ old_conn_state);
else
- intel_ddi_post_disable_dp(encoder,
- old_crtc_state, old_conn_state);
+ intel_ddi_post_disable_dp(state, encoder, old_crtc_state,
+ old_conn_state);
if (INTEL_GEN(dev_priv) >= 11)
icl_unmap_plls_to_ports(encoder);
@@ -3502,7 +3512,8 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
intel_tc_port_put_link(dig_port);
}
-void intel_ddi_fdi_post_disable(struct intel_encoder *encoder,
+void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3536,7 +3547,8 @@ void intel_ddi_fdi_post_disable(struct intel_encoder *encoder,
intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val);
}
-static void intel_enable_ddi_dp(struct intel_encoder *encoder,
+static void intel_enable_ddi_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3577,7 +3589,8 @@ gen9_chicken_trans_reg_by_port(struct drm_i915_private *dev_priv,
return CHICKEN_TRANS(trans[port]);
}
-static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
+static void intel_enable_ddi_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3639,7 +3652,8 @@ static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
intel_audio_codec_enable(encoder, crtc_state, conn_state);
}
-static void intel_enable_ddi(struct intel_encoder *encoder,
+static void intel_enable_ddi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3650,9 +3664,9 @@ static void intel_enable_ddi(struct intel_encoder *encoder,
intel_crtc_vblank_on(crtc_state);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);
+ intel_enable_ddi_hdmi(state, encoder, crtc_state, conn_state);
else
- intel_enable_ddi_dp(encoder, crtc_state, conn_state);
+ intel_enable_ddi_dp(state, encoder, crtc_state, conn_state);
/* Enable hdcp if it's desired */
if (conn_state->content_protection ==
@@ -3662,7 +3676,8 @@ static void intel_enable_ddi(struct intel_encoder *encoder,
(u8)conn_state->hdcp_content_type);
}
-static void intel_disable_ddi_dp(struct intel_encoder *encoder,
+static void intel_disable_ddi_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3682,7 +3697,8 @@ static void intel_disable_ddi_dp(struct intel_encoder *encoder,
false);
}
-static void intel_disable_ddi_hdmi(struct intel_encoder *encoder,
+static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3698,19 +3714,23 @@ static void intel_disable_ddi_hdmi(struct intel_encoder *encoder,
connector->base.id, connector->name);
}
-static void intel_disable_ddi(struct intel_encoder *encoder,
+static void intel_disable_ddi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
- intel_disable_ddi_hdmi(encoder, old_crtc_state, old_conn_state);
+ intel_disable_ddi_hdmi(state, encoder, old_crtc_state,
+ old_conn_state);
else
- intel_disable_ddi_dp(encoder, old_crtc_state, old_conn_state);
+ intel_disable_ddi_dp(state, encoder, old_crtc_state,
+ old_conn_state);
}
-static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
+static void intel_ddi_update_pipe_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -3721,18 +3741,20 @@ static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
intel_psr_update(intel_dp, crtc_state);
intel_edp_drrs_enable(intel_dp, crtc_state);
- intel_panel_update_backlight(encoder, crtc_state, conn_state);
+ intel_panel_update_backlight(state, encoder, crtc_state, conn_state);
}
-static void intel_ddi_update_pipe(struct intel_encoder *encoder,
+static void intel_ddi_update_pipe(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
- intel_ddi_update_pipe_dp(encoder, crtc_state, conn_state);
+ intel_ddi_update_pipe_dp(state, encoder, crtc_state,
+ conn_state);
- intel_hdcp_update_pipe(encoder, crtc_state, conn_state);
+ intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
}
static void
@@ -3761,7 +3783,8 @@ intel_ddi_update_complete(struct intel_atomic_state *state,
}
static void
-intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
+intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 55fd72b901fe..de4cd877c002 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -17,7 +17,8 @@ struct intel_dp;
struct intel_dpll_hw_state;
struct intel_encoder;
-void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
+void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *intel_encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state);
void hsw_fdi_link_train(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3926ac8f1f10..84e59f6ab8e4 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6689,7 +6689,8 @@ static void intel_encoders_pre_pll_enable(struct intel_atomic_state *state,
continue;
if (encoder->pre_pll_enable)
- encoder->pre_pll_enable(encoder, crtc_state, conn_state);
+ encoder->pre_pll_enable(state, encoder,
+ crtc_state, conn_state);
}
}
@@ -6710,7 +6711,8 @@ static void intel_encoders_pre_enable(struct intel_atomic_state *state,
continue;
if (encoder->pre_enable)
- encoder->pre_enable(encoder, crtc_state, conn_state);
+ encoder->pre_enable(state, encoder,
+ crtc_state, conn_state);
}
}
@@ -6731,7 +6733,8 @@ static void intel_encoders_enable(struct intel_atomic_state *state,
continue;
if (encoder->enable)
- encoder->enable(encoder, crtc_state, conn_state);
+ encoder->enable(state, encoder,
+ crtc_state, conn_state);
intel_opregion_notify_encoder(encoder, true);
}
}
@@ -6754,7 +6757,8 @@ static void intel_encoders_disable(struct intel_atomic_state *state,
intel_opregion_notify_encoder(encoder, false);
if (encoder->disable)
- encoder->disable(encoder, old_crtc_state, old_conn_state);
+ encoder->disable(state, encoder,
+ old_crtc_state, old_conn_state);
}
}
@@ -6775,7 +6779,8 @@ static void intel_encoders_post_disable(struct intel_atomic_state *state,
continue;
if (encoder->post_disable)
- encoder->post_disable(encoder, old_crtc_state, old_conn_state);
+ encoder->post_disable(state, encoder,
+ old_crtc_state, old_conn_state);
}
}
@@ -6796,7 +6801,8 @@ static void intel_encoders_post_pll_disable(struct intel_atomic_state *state,
continue;
if (encoder->post_pll_disable)
- encoder->post_pll_disable(encoder, old_crtc_state, old_conn_state);
+ encoder->post_pll_disable(state, encoder,
+ old_crtc_state, old_conn_state);
}
}
@@ -6817,7 +6823,8 @@ static void intel_encoders_update_pipe(struct intel_atomic_state *state,
continue;
if (encoder->update_pipe)
- encoder->update_pipe(encoder, crtc_state, conn_state);
+ encoder->update_pipe(state, encoder,
+ crtc_state, conn_state);
}
}
@@ -18133,11 +18140,12 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder)
best_encoder = connector->base.state->best_encoder;
connector->base.state->best_encoder = &encoder->base;
+ /* FIXME NULL atomic state passed! */
if (encoder->disable)
- encoder->disable(encoder, crtc_state,
+ encoder->disable(NULL, encoder, crtc_state,
connector->base.state);
if (encoder->post_disable)
- encoder->post_disable(encoder, crtc_state,
+ encoder->post_disable(NULL, encoder, crtc_state,
connector->base.state);
connector->base.state->best_encoder = best_encoder;
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5e00e611f077..ad39386231d5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -146,28 +146,35 @@ struct intel_encoder {
void (*update_prepare)(struct intel_atomic_state *,
struct intel_encoder *,
struct intel_crtc *);
- void (*pre_pll_enable)(struct intel_encoder *,
+ void (*pre_pll_enable)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
- void (*pre_enable)(struct intel_encoder *,
+ void (*pre_enable)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
- void (*enable)(struct intel_encoder *,
+ void (*enable)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
void (*update_complete)(struct intel_atomic_state *,
struct intel_encoder *,
struct intel_crtc *);
- void (*disable)(struct intel_encoder *,
+ void (*disable)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
- void (*post_disable)(struct intel_encoder *,
+ void (*post_disable)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
- void (*post_pll_disable)(struct intel_encoder *,
+ void (*post_pll_disable)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
- void (*update_pipe)(struct intel_encoder *,
+ void (*update_pipe)(struct intel_atomic_state *,
+ struct intel_encoder *,
const struct intel_crtc_state *,
const struct drm_connector_state *);
/* Read out the current hw state of this connector, returning true if
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 89d54f5fe60b..d4c17a5e9be2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3393,7 +3393,8 @@ static void intel_dp_get_config(struct intel_encoder *encoder,
}
}
-static void intel_disable_dp(struct intel_encoder *encoder,
+static void intel_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3413,21 +3414,24 @@ static void intel_disable_dp(struct intel_encoder *encoder,
intel_edp_panel_off(intel_dp);
}
-static void g4x_disable_dp(struct intel_encoder *encoder,
+static void g4x_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_disable_dp(encoder, old_crtc_state, old_conn_state);
+ intel_disable_dp(state, encoder, old_crtc_state, old_conn_state);
}
-static void vlv_disable_dp(struct intel_encoder *encoder,
+static void vlv_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_disable_dp(encoder, old_crtc_state, old_conn_state);
+ intel_disable_dp(state, encoder, old_crtc_state, old_conn_state);
}
-static void g4x_post_disable_dp(struct intel_encoder *encoder,
+static void g4x_post_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3447,14 +3451,16 @@ static void g4x_post_disable_dp(struct intel_encoder *encoder,
ilk_edp_pll_off(intel_dp, old_crtc_state);
}
-static void vlv_post_disable_dp(struct intel_encoder *encoder,
+static void vlv_post_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
intel_dp_link_down(encoder, old_crtc_state);
}
-static void chv_post_disable_dp(struct intel_encoder *encoder,
+static void chv_post_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -3580,7 +3586,8 @@ static void intel_dp_enable_port(struct intel_dp *intel_dp,
intel_de_posting_read(dev_priv, intel_dp->output_reg);
}
-static void intel_enable_dp(struct intel_encoder *encoder,
+static void intel_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -3626,22 +3633,25 @@ static void intel_enable_dp(struct intel_encoder *encoder,
}
}
-static void g4x_enable_dp(struct intel_encoder *encoder,
+static void g4x_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
- intel_enable_dp(encoder, pipe_config, conn_state);
+ intel_enable_dp(state, encoder, pipe_config, conn_state);
intel_edp_backlight_on(pipe_config, conn_state);
}
-static void vlv_enable_dp(struct intel_encoder *encoder,
+static void vlv_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
intel_edp_backlight_on(pipe_config, conn_state);
}
-static void g4x_pre_enable_dp(struct intel_encoder *encoder,
+static void g4x_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -3761,16 +3771,18 @@ static void vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
intel_dp_init_panel_power_sequencer_registers(intel_dp, true);
}
-static void vlv_pre_enable_dp(struct intel_encoder *encoder,
+static void vlv_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
vlv_phy_pre_encoder_enable(encoder, pipe_config);
- intel_enable_dp(encoder, pipe_config, conn_state);
+ intel_enable_dp(state, encoder, pipe_config, conn_state);
}
-static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder,
+static void vlv_dp_pre_pll_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -3779,19 +3791,21 @@ static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder,
vlv_phy_pre_pll_enable(encoder, pipe_config);
}
-static void chv_pre_enable_dp(struct intel_encoder *encoder,
+static void chv_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
chv_phy_pre_encoder_enable(encoder, pipe_config);
- intel_enable_dp(encoder, pipe_config, conn_state);
+ intel_enable_dp(state, encoder, pipe_config, conn_state);
/* Second common lane will stay alive on its own now */
chv_phy_release_cl2_override(encoder);
}
-static void chv_dp_pre_pll_enable(struct intel_encoder *encoder,
+static void chv_dp_pre_pll_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -3800,7 +3814,8 @@ static void chv_dp_pre_pll_enable(struct intel_encoder *encoder,
chv_phy_pre_pll_enable(encoder, pipe_config);
}
-static void chv_dp_post_pll_disable(struct intel_encoder *encoder,
+static void chv_dp_post_pll_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b9afc1135b9b..5f54cc2d6b40 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -316,7 +316,8 @@ intel_dp_mst_atomic_check(struct drm_connector *connector,
return ret;
}
-static void intel_mst_disable_dp(struct intel_encoder *encoder,
+static void intel_mst_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -340,7 +341,8 @@ static void intel_mst_disable_dp(struct intel_encoder *encoder,
old_crtc_state, old_conn_state);
}
-static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
+static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -405,13 +407,14 @@ static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
intel_mst->connector = NULL;
if (last_mst_stream)
- intel_dig_port->base.post_disable(&intel_dig_port->base,
+ intel_dig_port->base.post_disable(state, &intel_dig_port->base,
old_crtc_state, NULL);
DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
}
-static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
+static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -420,11 +423,12 @@ static void intel_mst_pre_pll_enable_dp(struct intel_encoder *encoder,
struct intel_dp *intel_dp = &intel_dig_port->dp;
if (intel_dp->active_mst_links == 0)
- intel_dig_port->base.pre_pll_enable(&intel_dig_port->base,
+ intel_dig_port->base.pre_pll_enable(state, &intel_dig_port->base,
pipe_config, NULL);
}
-static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
+static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -456,7 +460,7 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
if (first_mst_stream)
- intel_dig_port->base.pre_enable(&intel_dig_port->base,
+ intel_dig_port->base.pre_enable(state, &intel_dig_port->base,
pipe_config, NULL);
ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
@@ -487,7 +491,8 @@ static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
intel_dp_set_m_n(pipe_config, M1_N1);
}
-static void intel_mst_enable_dp(struct intel_encoder *encoder,
+static void intel_mst_enable_dp(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c
index 341d5ce8b062..5cd09034519b 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -183,7 +183,8 @@ static void intel_dvo_get_config(struct intel_encoder *encoder,
pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
}
-static void intel_disable_dvo(struct intel_encoder *encoder,
+static void intel_disable_dvo(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -197,7 +198,8 @@ static void intel_disable_dvo(struct intel_encoder *encoder,
intel_de_read(dev_priv, dvo_reg);
}
-static void intel_enable_dvo(struct intel_encoder *encoder,
+static void intel_enable_dvo(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -272,7 +274,8 @@ static int intel_dvo_compute_config(struct intel_encoder *encoder,
return 0;
}
-static void intel_dvo_pre_enable(struct intel_encoder *encoder,
+static void intel_dvo_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ee0f27ea2810..0ed9c5d33d75 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2075,7 +2075,8 @@ int intel_hdcp_disable(struct intel_connector *connector)
return ret;
}
-void intel_hdcp_update_pipe(struct intel_encoder *encoder,
+void intel_hdcp_update_pipe(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 7c12ad609b1f..86bbaec120cc 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -11,6 +11,7 @@
struct drm_connector;
struct drm_connector_state;
struct drm_i915_private;
+struct intel_atomic_state;
struct intel_connector;
struct intel_crtc_state;
struct intel_encoder;
@@ -26,7 +27,8 @@ int intel_hdcp_init(struct intel_connector *connector,
int intel_hdcp_enable(struct intel_connector *connector,
enum transcoder cpu_transcoder, u8 content_type);
int intel_hdcp_disable(struct intel_connector *connector);
-void intel_hdcp_update_pipe(struct intel_encoder *encoder,
+void intel_hdcp_update_pipe(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port port);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 39930232b253..484e067b100b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1878,7 +1878,8 @@ static void intel_enable_hdmi_audio(struct intel_encoder *encoder,
intel_audio_codec_enable(encoder, pipe_config, conn_state);
}
-static void g4x_enable_hdmi(struct intel_encoder *encoder,
+static void g4x_enable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -1900,7 +1901,8 @@ static void g4x_enable_hdmi(struct intel_encoder *encoder,
intel_enable_hdmi_audio(encoder, pipe_config, conn_state);
}
-static void ibx_enable_hdmi(struct intel_encoder *encoder,
+static void ibx_enable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -1951,7 +1953,8 @@ static void ibx_enable_hdmi(struct intel_encoder *encoder,
intel_enable_hdmi_audio(encoder, pipe_config, conn_state);
}
-static void cpt_enable_hdmi(struct intel_encoder *encoder,
+static void cpt_enable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -2004,13 +2007,15 @@ static void cpt_enable_hdmi(struct intel_encoder *encoder,
intel_enable_hdmi_audio(encoder, pipe_config, conn_state);
}
-static void vlv_enable_hdmi(struct intel_encoder *encoder,
+static void vlv_enable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
}
-static void intel_disable_hdmi(struct intel_encoder *encoder,
+static void intel_disable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -2068,7 +2073,8 @@ static void intel_disable_hdmi(struct intel_encoder *encoder,
intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
}
-static void g4x_disable_hdmi(struct intel_encoder *encoder,
+static void g4x_disable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -2076,10 +2082,11 @@ static void g4x_disable_hdmi(struct intel_encoder *encoder,
intel_audio_codec_disable(encoder,
old_crtc_state, old_conn_state);
- intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
+ intel_disable_hdmi(state, encoder, old_crtc_state, old_conn_state);
}
-static void pch_disable_hdmi(struct intel_encoder *encoder,
+static void pch_disable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -2088,11 +2095,12 @@ static void pch_disable_hdmi(struct intel_encoder *encoder,
old_crtc_state, old_conn_state);
}
-static void pch_post_disable_hdmi(struct intel_encoder *encoder,
+static void pch_post_disable_hdmi(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
+ intel_disable_hdmi(state, encoder, old_crtc_state, old_conn_state);
}
static int intel_hdmi_source_max_tmds_clock(struct intel_encoder *encoder)
@@ -2474,7 +2482,8 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
}
}
- intel_hdmi_compute_gcp_infoframe(encoder, pipe_config, conn_state);
+ intel_hdmi_compute_gcp_infoframe(encoder, pipe_config,
+ conn_state);
if (!intel_hdmi_compute_avi_infoframe(encoder, pipe_config, conn_state)) {
DRM_DEBUG_KMS("bad AVI infoframe\n");
@@ -2664,7 +2673,8 @@ static int intel_hdmi_get_modes(struct drm_connector *connector)
return intel_connector_update_modes(connector, edid);
}
-static void intel_hdmi_pre_enable(struct intel_encoder *encoder,
+static void intel_hdmi_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -2678,7 +2688,8 @@ static void intel_hdmi_pre_enable(struct intel_encoder *encoder,
pipe_config, conn_state);
}
-static void vlv_hdmi_pre_enable(struct intel_encoder *encoder,
+static void vlv_hdmi_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -2695,12 +2706,13 @@ static void vlv_hdmi_pre_enable(struct intel_encoder *encoder,
pipe_config->has_infoframe,
pipe_config, conn_state);
- g4x_enable_hdmi(encoder, pipe_config, conn_state);
+ g4x_enable_hdmi(state, encoder, pipe_config, conn_state);
vlv_wait_port_ready(dev_priv, dport, 0x0);
}
-static void vlv_hdmi_pre_pll_enable(struct intel_encoder *encoder,
+static void vlv_hdmi_pre_pll_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -2709,7 +2721,8 @@ static void vlv_hdmi_pre_pll_enable(struct intel_encoder *encoder,
vlv_phy_pre_pll_enable(encoder, pipe_config);
}
-static void chv_hdmi_pre_pll_enable(struct intel_encoder *encoder,
+static void chv_hdmi_pre_pll_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -2718,14 +2731,16 @@ static void chv_hdmi_pre_pll_enable(struct intel_encoder *encoder,
chv_phy_pre_pll_enable(encoder, pipe_config);
}
-static void chv_hdmi_post_pll_disable(struct intel_encoder *encoder,
+static void chv_hdmi_post_pll_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
chv_phy_post_pll_disable(encoder, old_crtc_state);
}
-static void vlv_hdmi_post_disable(struct intel_encoder *encoder,
+static void vlv_hdmi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -2733,7 +2748,8 @@ static void vlv_hdmi_post_disable(struct intel_encoder *encoder,
vlv_phy_reset_lanes(encoder, old_crtc_state);
}
-static void chv_hdmi_post_disable(struct intel_encoder *encoder,
+static void chv_hdmi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -2748,7 +2764,8 @@ static void chv_hdmi_post_disable(struct intel_encoder *encoder,
vlv_dpio_put(dev_priv);
}
-static void chv_hdmi_pre_enable(struct intel_encoder *encoder,
+static void chv_hdmi_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -2766,7 +2783,7 @@ static void chv_hdmi_pre_enable(struct intel_encoder *encoder,
pipe_config->has_infoframe,
pipe_config, conn_state);
- g4x_enable_hdmi(encoder, pipe_config, conn_state);
+ g4x_enable_hdmi(state, encoder, pipe_config, conn_state);
vlv_wait_port_ready(dev_priv, dport, 0x0);
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 9a067effcfa0..fe591f82163e 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -220,7 +220,8 @@ static void intel_lvds_pps_init_hw(struct drm_i915_private *dev_priv,
REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps->divider) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK, DIV_ROUND_UP(pps->t4, 1000) + 1));
}
-static void intel_pre_enable_lvds(struct intel_encoder *encoder,
+static void intel_pre_enable_lvds(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -301,7 +302,8 @@ static void intel_pre_enable_lvds(struct intel_encoder *encoder,
/*
* Sets the power state for the panel.
*/
-static void intel_enable_lvds(struct intel_encoder *encoder,
+static void intel_enable_lvds(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -323,7 +325,8 @@ static void intel_enable_lvds(struct intel_encoder *encoder,
intel_panel_enable_backlight(pipe_config, conn_state);
}
-static void intel_disable_lvds(struct intel_encoder *encoder,
+static void intel_disable_lvds(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -341,28 +344,31 @@ static void intel_disable_lvds(struct intel_encoder *encoder,
intel_de_posting_read(dev_priv, lvds_encoder->reg);
}
-static void gmch_disable_lvds(struct intel_encoder *encoder,
+static void gmch_disable_lvds(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
intel_panel_disable_backlight(old_conn_state);
- intel_disable_lvds(encoder, old_crtc_state, old_conn_state);
+ intel_disable_lvds(state, encoder, old_crtc_state, old_conn_state);
}
-static void pch_disable_lvds(struct intel_encoder *encoder,
+static void pch_disable_lvds(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
intel_panel_disable_backlight(old_conn_state);
}
-static void pch_post_disable_lvds(struct intel_encoder *encoder,
+static void pch_post_disable_lvds(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_disable_lvds(encoder, old_crtc_state, old_conn_state);
+ intel_disable_lvds(state, encoder, old_crtc_state, old_conn_state);
}
static enum drm_mode_status
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 276f43870802..f8ccfe67429e 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -1931,7 +1931,8 @@ static int pwm_setup_backlight(struct intel_connector *connector,
return 0;
}
-void intel_panel_update_backlight(struct intel_encoder *encoder,
+void intel_panel_update_backlight(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_panel.h b/drivers/gpu/drm/i915/display/intel_panel.h
index cedeea443336..11f2f6b628d8 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.h
+++ b/drivers/gpu/drm/i915/display/intel_panel.h
@@ -37,7 +37,8 @@ int intel_panel_setup_backlight(struct drm_connector *connector,
enum pipe pipe);
void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
-void intel_panel_update_backlight(struct intel_encoder *encoder,
+void intel_panel_update_backlight(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state);
void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c
index 637d8fe2f8c2..e6306cbb7a3a 100644
--- a/drivers/gpu/drm/i915/display/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
@@ -1430,7 +1430,8 @@ static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
#undef UPDATE_PROPERTY
}
-static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
+static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *intel_encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -1727,7 +1728,8 @@ static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
SDVO_AUDIO_PRESENCE_DETECT);
}
-static void intel_disable_sdvo(struct intel_encoder *encoder,
+static void intel_disable_sdvo(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -1775,20 +1777,23 @@ static void intel_disable_sdvo(struct intel_encoder *encoder,
}
}
-static void pch_disable_sdvo(struct intel_encoder *encoder,
+static void pch_disable_sdvo(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
}
-static void pch_post_disable_sdvo(struct intel_encoder *encoder,
+static void pch_post_disable_sdvo(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
- intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
+ intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
}
-static void intel_enable_sdvo(struct intel_encoder *encoder,
+static void intel_enable_sdvo(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/intel_tv.c b/drivers/gpu/drm/i915/display/intel_tv.c
index d2e3a3a323e9..b6003fc9e268 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -914,7 +914,8 @@ intel_tv_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe)
}
static void
-intel_enable_tv(struct intel_encoder *encoder,
+intel_enable_tv(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -930,7 +931,8 @@ intel_enable_tv(struct intel_encoder *encoder,
}
static void
-intel_disable_tv(struct intel_encoder *encoder,
+intel_disable_tv(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -1414,7 +1416,8 @@ static void set_color_conversion(struct drm_i915_private *dev_priv,
(color_conversion->bv << 16) | color_conversion->av);
}
-static void intel_tv_pre_enable(struct intel_encoder *encoder,
+static void intel_tv_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index f4c362dc6e15..a277d7d6b3bf 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -759,7 +759,8 @@ static void intel_dsi_unprepare(struct intel_encoder *encoder);
* DSI port enable has to be done before pipe and plane enable, so we do it in
* the pre_enable hook instead of the enable hook.
*/
-static void intel_dsi_pre_enable(struct intel_encoder *encoder,
+static void intel_dsi_pre_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *pipe_config,
const struct drm_connector_state *conn_state)
{
@@ -858,7 +859,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
}
-static void bxt_dsi_enable(struct intel_encoder *encoder,
+static void bxt_dsi_enable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
const struct drm_connector_state *conn_state)
{
@@ -871,7 +873,8 @@ static void bxt_dsi_enable(struct intel_encoder *encoder,
* DSI port disable has to be done after pipe and plane disable, so we do it in
* the post_disable hook.
*/
-static void intel_dsi_disable(struct intel_encoder *encoder,
+static void intel_dsi_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
@@ -906,7 +909,8 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
vlv_dsi_clear_device_ready(encoder);
}
-static void intel_dsi_post_disable(struct intel_encoder *encoder,
+static void intel_dsi_post_disable(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
const struct intel_crtc_state *old_crtc_state,
const struct drm_connector_state *old_conn_state)
{
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (11 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
@ 2020-03-13 16:48 ` Ville Syrjala
2020-04-03 0:59 ` Souza, Jose
2020-03-16 14:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+ Patchwork
` (5 subsequent siblings)
18 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-13 16:48 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Move the final DP_TP_CTL frobbing of port sync to the master
encoder's enable hook. Now neatly out of sight from the high level
modeset code.
And thus we've eliminated all the special casing of port sync
in the high level modeset code.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 37 ++++++++
drivers/gpu/drm/i915/display/intel_display.c | 99 ++++----------------
2 files changed, 53 insertions(+), 83 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 98475c81f1da..856c56f84833 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3547,6 +3547,41 @@ void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val);
}
+static void trans_port_sync_stop_link_train(struct intel_atomic_state *state,
+ struct intel_encoder *encoder,
+ const struct intel_crtc_state *crtc_state)
+{
+ const struct drm_connector_state *conn_state;
+ struct drm_connector *conn;
+ int i;
+
+ if (!crtc_state->sync_mode_slaves_mask)
+ return;
+
+ for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
+ struct intel_encoder *slave_encoder =
+ to_intel_encoder(conn_state->best_encoder);
+ struct intel_crtc *slave_crtc = to_intel_crtc(conn_state->crtc);
+ const struct intel_crtc_state *slave_crtc_state;
+
+ if (!slave_crtc)
+ continue;
+
+ slave_crtc_state =
+ intel_atomic_get_new_crtc_state(state, slave_crtc);
+
+ if (slave_crtc_state->master_transcoder !=
+ crtc_state->cpu_transcoder)
+ continue;
+
+ intel_dp_stop_link_train(enc_to_intel_dp(slave_encoder));
+ }
+
+ usleep_range(200, 400);
+
+ intel_dp_stop_link_train(enc_to_intel_dp(encoder));
+}
+
static void intel_enable_ddi_dp(struct intel_atomic_state *state,
struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
@@ -3567,6 +3602,8 @@ static void intel_enable_ddi_dp(struct intel_atomic_state *state,
if (crtc_state->has_audio)
intel_audio_codec_enable(encoder, crtc_state, conn_state);
+
+ trans_port_sync_stop_link_train(state, encoder, crtc_state);
}
static i915_reg_t
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 84e59f6ab8e4..cdae7a680e4a 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -544,19 +544,25 @@ needs_modeset(const struct intel_crtc_state *state)
return drm_atomic_crtc_needs_modeset(&state->uapi);
}
-bool
-is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
-{
- return (crtc_state->master_transcoder != INVALID_TRANSCODER ||
- crtc_state->sync_mode_slaves_mask);
-}
-
static bool
is_trans_port_sync_slave(const struct intel_crtc_state *crtc_state)
{
return crtc_state->master_transcoder != INVALID_TRANSCODER;
}
+static bool
+is_trans_port_sync_master(const struct intel_crtc_state *crtc_state)
+{
+ return crtc_state->sync_mode_slaves_mask != 0;
+}
+
+bool
+is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
+{
+ return is_trans_port_sync_master(crtc_state) ||
+ is_trans_port_sync_slave(crtc_state);
+}
+
/*
* Platform specific helpers to calculate the port PLL loopback- (clock.m),
* and post-divider (clock.p) values, pre- (clock.vco) and post-divided fast
@@ -15104,63 +15110,6 @@ static void intel_commit_modeset_enables(struct intel_atomic_state *state)
}
}
-static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
-{
- struct drm_connector *uninitialized_var(conn);
- struct drm_connector_state *conn_state;
- struct intel_dp *intel_dp;
- int i;
-
- for_each_new_connector_in_state(&state->base, conn, conn_state, i) {
- if (conn_state->crtc == &crtc->base)
- break;
- }
- intel_dp = intel_attached_dp(to_intel_connector(conn));
- intel_dp_stop_link_train(intel_dp);
-}
-
-static void intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
-{
- struct drm_i915_private *i915 = to_i915(state->base.dev);
- const struct intel_crtc_state *new_slave_crtc_state;
- const struct intel_crtc_state *new_crtc_state;
- struct intel_crtc *slave_crtc;
- int i;
-
- for_each_new_intel_crtc_in_state(state, slave_crtc,
- new_slave_crtc_state, i) {
- if (new_slave_crtc_state->master_transcoder !=
- new_crtc_state->cpu_transcoder)
- continue;
-
- drm_dbg_kms(&i915->drm,
- "Updating transcoder port sync slave [CRTC:%d:%s]\n",
- slave_crtc->base.base.id, slave_crtc->base.name);
-
- intel_enable_crtc(state, slave_crtc);
- }
-
- drm_dbg_kms(&i915->drm,
- "Updating transcoder port sync master [CRTC:%d:%s]\n",
- crtc->base.base.id, crtc->base.name);
-
- intel_enable_crtc(state, crtc);
-
- for_each_new_intel_crtc_in_state(state, slave_crtc,
- new_slave_crtc_state, i) {
- if (new_slave_crtc_state->master_transcoder !=
- new_crtc_state->cpu_transcoder)
- continue;
-
- intel_set_dp_tp_ctl_normal(state, slave_crtc);
- }
-
- usleep_range(200, 400);
- intel_set_dp_tp_ctl_normal(state, crtc);
-}
-
static void icl_dbuf_slice_pre_update(struct intel_atomic_state *state)
{
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
@@ -15261,33 +15210,17 @@ static void skl_commit_modeset_enables(struct intel_atomic_state *state)
continue;
if (intel_dp_mst_is_slave_trans(new_crtc_state) ||
- is_trans_port_sync_slave(new_crtc_state))
+ is_trans_port_sync_master(new_crtc_state))
continue;
modeset_pipes &= ~BIT(pipe);
- if (is_trans_port_sync_mode(new_crtc_state)) {
- const struct intel_crtc_state *new_slave_crtc_state;
- struct intel_crtc *slave_crtc;
- int i;
-
- intel_update_trans_port_sync_crtcs(state, crtc);
-
- for_each_new_intel_crtc_in_state(state, slave_crtc,
- new_slave_crtc_state, i) {
-
- /* TODO: update entries[] of slave */
- modeset_pipes &= ~BIT(slave_crtc->pipe);
- }
- } else {
- intel_enable_crtc(state, crtc);
- }
+ intel_enable_crtc(state, crtc);
}
/*
* Then we enable all remaining pipes that depend on other
- * pipes, right now it is only MST slaves as both port sync
- * slave and master are enabled together
+ * pipes: MST slaves and port sync masters.
*/
for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
enum pipe pipe = crtc->pipe;
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (12 preceding siblings ...)
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
@ 2020-03-16 14:43 ` Patchwork
2020-03-18 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2) Patchwork
` (4 subsequent siblings)
18 siblings, 0 replies; 41+ messages in thread
From: Patchwork @ 2020-03-16 14:43 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Port sync for skl+
URL : https://patchwork.freedesktop.org/series/74691/
State : failure
== Summary ==
Applying: drm/i915/mst: Use .compute_config_late() to compute master transcoder
Applying: drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
Applying: drm/i915: Drop usless master_transcoder assignments
Applying: drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
Applying: drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
Applying: drm/i915: Include port sync state in the state dump
Applying: drm/i915: Store cpu_transcoder_mask in device info
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/i915_drv.h
M drivers/gpu/drm/i915/i915_pci.c
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/i915_pci.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_pci.c
Auto-merging drivers/gpu/drm/i915/i915_drv.h
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch' to see the failed patch
Patch failed at 0007 drm/i915: Store cpu_transcoder_mask in device info
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* [Intel-gfx] [PATCH v2 07/13] drm/i915: Store cpu_transcoder_mask in device info
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
@ 2020-03-18 17:02 ` Ville Syrjala
2020-04-02 0:59 ` Souza, Jose
0 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjala @ 2020-03-18 17:02 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We have a bunch of code that would like to know which
CPU transcoders are actually present in the hardware. Rather than
use various ad-hoc methods let's just include a full bitmask in
the device info, alongside pipe_mask.
v2: Rebase
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++--
drivers/gpu/drm/i915/display/intel_display.c | 13 ++-------
drivers/gpu/drm/i915/display/intel_display.h | 8 ++++--
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 23 +++++++++++++++-
drivers/gpu/drm/i915/intel_device_info.c | 29 ++++++++++++--------
drivers/gpu/drm/i915/intel_device_info.h | 1 +
7 files changed, 53 insertions(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 8bb6c583abb8..0fea2ec2cdd8 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1689,7 +1689,7 @@ bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector)
goto out;
}
- if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
cpu_transcoder = TRANSCODER_EDP;
else
cpu_transcoder = (enum transcoder) pipe;
@@ -1751,7 +1751,7 @@ static void intel_ddi_get_encoder_pipes(struct intel_encoder *encoder,
if (!(tmp & DDI_BUF_CTL_ENABLE))
goto out;
- if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A) {
tmp = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(TRANSCODER_EDP));
@@ -4076,7 +4076,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
enum port port = encoder->port;
int ret;
- if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
pipe_config->cpu_transcoder = TRANSCODER_EDP;
if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI)) {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4840988dc58d..292cac64f1ac 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10855,7 +10855,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
panel_transcoder_mask |=
BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
- if (HAS_TRANSCODER_EDP(dev_priv))
+ if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP))
panel_transcoder_mask |= BIT(TRANSCODER_EDP);
/*
@@ -18712,15 +18712,6 @@ void intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
-static bool
-has_transcoder(struct drm_i915_private *dev_priv, enum transcoder cpu_transcoder)
-{
- if (cpu_transcoder == TRANSCODER_EDP)
- return HAS_TRANSCODER_EDP(dev_priv);
- else
- return INTEL_INFO(dev_priv)->pipe_mask & BIT(cpu_transcoder);
-}
-
struct intel_display_error_state {
u32 power_well_driver;
@@ -18829,7 +18820,7 @@ intel_display_capture_error_state(struct drm_i915_private *dev_priv)
for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
enum transcoder cpu_transcoder = transcoders[i];
- if (!has_transcoder(dev_priv, cpu_transcoder))
+ if (!HAS_TRANSCODER(dev_priv, cpu_transcoder))
continue;
error->transcoder[i].available = true;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index adb1225a3480..cc7f287804d7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -320,9 +320,13 @@ enum phy_fia {
for_each_pipe(__dev_priv, __p) \
for_each_if((__mask) & BIT(__p))
-#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+#define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
- for_each_if ((__mask) & (1 << (__t)))
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
+
+#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+ for_each_cpu_transcoder(__dev_priv, __t) \
+ for_each_if ((__mask) & BIT(__t))
#define for_each_universal_plane(__dev_priv, __pipe, __p) \
for ((__p) = 0; \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a7ea1d855359..ea9170fd169b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1602,7 +1602,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)->display.has_ddi)
#define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->has_fpga_dbg)
#define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
-#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_EDP] != 0)
+#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0)
#define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
#define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)->has_rc6p)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 2c80a0194c80..66738f2c4f28 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -160,6 +160,7 @@
GEN(2), \
.is_mobile = 1, \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_overlay = 1, \
.display.cursor_needs_physical = 1, \
.display.overlay_needs_physical = 1, \
@@ -179,6 +180,7 @@
#define I845_FEATURES \
GEN(2), \
.pipe_mask = BIT(PIPE_A), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A), \
.display.has_overlay = 1, \
.display.overlay_needs_physical = 1, \
.display.has_gmch = 1, \
@@ -218,6 +220,7 @@ static const struct intel_device_info i865g_info = {
#define GEN3_FEATURES \
GEN(3), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
.engine_mask = BIT(RCS0), \
@@ -303,6 +306,7 @@ static const struct intel_device_info pnv_m_info = {
#define GEN4_FEATURES \
GEN(4), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.display.has_gmch = 1, \
.gpu_reset_clobbers_display = true, \
@@ -354,6 +358,7 @@ static const struct intel_device_info gm45_info = {
#define GEN5_FEATURES \
GEN(5), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0), \
.has_snoop = true, \
@@ -381,6 +386,7 @@ static const struct intel_device_info ilk_m_info = {
#define GEN6_FEATURES \
GEN(6), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
.display.has_hotplug = 1, \
.display.has_fbc = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
@@ -430,6 +436,7 @@ static const struct intel_device_info snb_m_gt2_info = {
#define GEN7_FEATURES \
GEN(7), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C), \
.display.has_hotplug = 1, \
.display.has_fbc = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
@@ -482,6 +489,7 @@ static const struct intel_device_info ivb_q_info = {
PLATFORM(INTEL_IVYBRIDGE),
.gt = 2,
.pipe_mask = 0, /* legal, last one wins */
+ .cpu_transcoder_mask = 0,
.has_l3_dpf = 1,
};
@@ -490,6 +498,7 @@ static const struct intel_device_info vlv_info = {
GEN(7),
.is_lp = 1,
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
.has_runtime_pm = 1,
.has_rc6 = 1,
.has_rps = true,
@@ -511,6 +520,8 @@ static const struct intel_device_info vlv_info = {
#define G75_FEATURES \
GEN7_FEATURES, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
.display.has_ddi = 1, \
.has_fpga_dbg = 1, \
.display.has_psr = 1, \
@@ -581,6 +592,7 @@ static const struct intel_device_info chv_info = {
PLATFORM(INTEL_CHERRYVIEW),
GEN(8),
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | BIT(TRANSCODER_C),
.display.has_hotplug = 1,
.is_lp = 1,
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
@@ -656,6 +668,9 @@ static const struct intel_device_info skl_gt4_info = {
.display.has_hotplug = 1, \
.engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
+ BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
.has_64bit_reloc = 1, \
.display.has_ddi = 1, \
.has_fpga_dbg = 1, \
@@ -759,6 +774,9 @@ static const struct intel_device_info cnl_info = {
#define GEN11_FEATURES \
GEN10_FEATURES, \
GEN11_DEFAULT_PAGE_SIZES, \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
+ BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
.pipe_offsets = { \
[TRANSCODER_A] = PIPE_A_OFFSET, \
[TRANSCODER_B] = PIPE_B_OFFSET, \
@@ -799,6 +817,10 @@ static const struct intel_device_info ehl_info = {
#define GEN12_FEATURES \
GEN11_FEATURES, \
GEN(12), \
+ .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D), \
+ .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
+ BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \
+ BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
.pipe_offsets = { \
[TRANSCODER_A] = PIPE_A_OFFSET, \
[TRANSCODER_B] = PIPE_B_OFFSET, \
@@ -822,7 +844,6 @@ static const struct intel_device_info ehl_info = {
static const struct intel_device_info tgl_info = {
GEN12_FEATURES,
PLATFORM(INTEL_TIGERLAKE),
- .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
.display.has_modular_fia = 1,
.engine_mask =
BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 9ff89e142ff1..db8496b4c38d 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -980,25 +980,32 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
drm_info(&dev_priv->drm,
"Display fused off, disabling\n");
info->pipe_mask = 0;
+ info->cpu_transcoder_mask = 0;
} else if (fuse_strap & IVB_PIPE_C_DISABLE) {
drm_info(&dev_priv->drm, "PipeC fused off\n");
info->pipe_mask &= ~BIT(PIPE_C);
+ info->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
}
} else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
u32 dfsm = I915_READ(SKL_DFSM);
- u8 enabled_mask = info->pipe_mask;
- if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
- enabled_mask &= ~BIT(PIPE_A);
- if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
- enabled_mask &= ~BIT(PIPE_B);
- if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
- enabled_mask &= ~BIT(PIPE_C);
+ if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
+ info->pipe_mask &= ~BIT(PIPE_A);
+ info->cpu_transcoder_mask &= ~BIT(TRANSCODER_A);
+ }
+ if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
+ info->pipe_mask &= ~BIT(PIPE_B);
+ info->cpu_transcoder_mask &= ~BIT(TRANSCODER_B);
+ }
+ if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
+ info->pipe_mask &= ~BIT(PIPE_C);
+ info->cpu_transcoder_mask &= ~BIT(TRANSCODER_C);
+ }
if (INTEL_GEN(dev_priv) >= 12 &&
- (dfsm & TGL_DFSM_PIPE_D_DISABLE))
- enabled_mask &= ~BIT(PIPE_D);
-
- info->pipe_mask = enabled_mask;
+ (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
+ info->pipe_mask &= ~BIT(PIPE_D);
+ info->cpu_transcoder_mask &= ~BIT(TRANSCODER_D);
+ }
if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
info->display.has_hdcp = 0;
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 1ecb9df2de91..cce6a72c5ebc 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -168,6 +168,7 @@ struct intel_device_info {
u32 display_mmio_offset;
u8 pipe_mask;
+ u8 cpu_transcoder_mask;
#define DEFINE_FLAG(name) u8 name:1
DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
--
2.24.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 41+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2)
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (13 preceding siblings ...)
2020-03-16 14:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+ Patchwork
@ 2020-03-18 18:45 ` Patchwork
2020-03-18 18:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
18 siblings, 0 replies; 41+ messages in thread
From: Patchwork @ 2020-03-18 18:45 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Port sync for skl+ (rev2)
URL : https://patchwork.freedesktop.org/series/74691/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d2cdf91643a0 drm/i915/mst: Use .compute_config_late() to compute master transcoder
2c7d28920dca drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
632673745f50 drm/i915: Drop usless master_transcoder assignments
61ac37e65386 drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
ec27107db7e7 drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
-:55: WARNING:LONG_LINE: line over 100 characters
#55: FILE: drivers/gpu/drm/i915/i915_reg.h:9734:
+#define PORT_SYNC_MODE_MASTER_SELECT(x) REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))
total: 0 errors, 1 warnings, 0 checks, 34 lines checked
03e8d170af68 drm/i915: Include port sync state in the state dump
c806976a0077 drm/i915: Store cpu_transcoder_mask in device info
-:96: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#96: FILE: drivers/gpu/drm/i915/display/intel_display.h:323:
+#define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
-:96: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__t' - possible side-effects?
#96: FILE: drivers/gpu/drm/i915/display/intel_display.h:323:
+#define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
-:99: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#99: FILE: drivers/gpu/drm/i915/display/intel_display.h:325:
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
-:101: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#101: FILE: drivers/gpu/drm/i915/display/intel_display.h:327:
+#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+ for_each_cpu_transcoder(__dev_priv, __t) \
+ for_each_if ((__mask) & BIT(__t))
-:101: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__t' - possible side-effects?
#101: FILE: drivers/gpu/drm/i915/display/intel_display.h:327:
+#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+ for_each_cpu_transcoder(__dev_priv, __t) \
+ for_each_if ((__mask) & BIT(__t))
-:103: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#103: FILE: drivers/gpu/drm/i915/display/intel_display.h:329:
+ for_each_if ((__mask) & BIT(__t))
-:116: WARNING:LONG_LINE: line over 100 characters
#116: FILE: drivers/gpu/drm/i915/i915_drv.h:1605:
+#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0)
total: 2 errors, 3 warnings, 2 checks, 242 lines checked
6a7a32a49547 drm/i915: Implement port sync for SKL+
-:209: WARNING:LONG_LINE: line over 100 characters
#209: FILE: drivers/gpu/drm/i915/i915_reg.h:9704:
+#define TRANS_DDI_PORT_SYNC_MASTER_SELECT(x) REG_FIELD_PREP(TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK, (x))
total: 0 errors, 1 warnings, 0 checks, 165 lines checked
66a94a458d39 drm/i915: Eliminate port sync copy pasta
04906e4ea040 drm/i915: Fix port sync code to work with >2 pipes
f6dcd889212e drm/i915: Do pipe updates after enables for everyone
50501c73ea1c drm/i915: Pass atomic state to encoder hooks
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
total: 0 errors, 28 warnings, 0 checks, 1136 lines checked
02e6871f0ae3 drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Port sync for skl+ (rev2)
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (14 preceding siblings ...)
2020-03-18 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2) Patchwork
@ 2020-03-18 18:57 ` Patchwork
2020-03-18 21:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3) Patchwork
` (2 subsequent siblings)
18 siblings, 0 replies; 41+ messages in thread
From: Patchwork @ 2020-03-18 18:57 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Port sync for skl+ (rev2)
URL : https://patchwork.freedesktop.org/series/74691/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8152 -> Patchwork_17011
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_17011 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_17011, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17011/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_17011:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_fence@basic-busy@vecs0:
- fi-cml-u2: NOTRUN -> [DMESG-WARN][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17011/fi-cml-u2/igt@gem_exec_fence@basic-busy@vecs0.html
- fi-skl-6600u: NOTRUN -> [DMESG-WARN][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17011/fi-skl-6600u/igt@gem_exec_fence@basic-busy@vecs0.html
Participating hosts (44 -> 41)
------------------------------
Additional (3): fi-cml-u2 fi-bwr-2160 fi-skl-6600u
Missing (6): fi-ilk-m540 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus fi-skl-6700k2
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8152 -> Patchwork_17011
CI-20190529: 20190529
CI_DRM_8152: ce1895bf390da53060aa60a90367b706d92bf431 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5522: bd2b01af69c9720d54e68a8702a23e4ff3637746 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17011: 02e6871f0ae39b3d02f496327a16d769b2647f4b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
02e6871f0ae3 drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
50501c73ea1c drm/i915: Pass atomic state to encoder hooks
f6dcd889212e drm/i915: Do pipe updates after enables for everyone
04906e4ea040 drm/i915: Fix port sync code to work with >2 pipes
66a94a458d39 drm/i915: Eliminate port sync copy pasta
6a7a32a49547 drm/i915: Implement port sync for SKL+
c806976a0077 drm/i915: Store cpu_transcoder_mask in device info
03e8d170af68 drm/i915: Include port sync state in the state dump
ec27107db7e7 drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
61ac37e65386 drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
632673745f50 drm/i915: Drop usless master_transcoder assignments
2c7d28920dca drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
d2cdf91643a0 drm/i915/mst: Use .compute_config_late() to compute master transcoder
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17011/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3)
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (15 preceding siblings ...)
2020-03-18 18:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2020-03-18 21:39 ` Patchwork
2020-03-18 22:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-19 0:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
18 siblings, 0 replies; 41+ messages in thread
From: Patchwork @ 2020-03-18 21:39 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Port sync for skl+ (rev3)
URL : https://patchwork.freedesktop.org/series/74691/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
72dac032db0d drm/i915/mst: Use .compute_config_late() to compute master transcoder
0124ef44a60a drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
7200689fa007 drm/i915: Drop usless master_transcoder assignments
aebcfc348cec drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
6f316fb900f8 drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
-:55: WARNING:LONG_LINE: line over 100 characters
#55: FILE: drivers/gpu/drm/i915/i915_reg.h:9734:
+#define PORT_SYNC_MODE_MASTER_SELECT(x) REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))
total: 0 errors, 1 warnings, 0 checks, 34 lines checked
e832ccd1183a drm/i915: Include port sync state in the state dump
248ad2bd291b drm/i915: Store cpu_transcoder_mask in device info
-:96: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#96: FILE: drivers/gpu/drm/i915/display/intel_display.h:323:
+#define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
-:96: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__t' - possible side-effects?
#96: FILE: drivers/gpu/drm/i915/display/intel_display.h:323:
+#define for_each_cpu_transcoder(__dev_priv, __t) \
for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
-:99: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#99: FILE: drivers/gpu/drm/i915/display/intel_display.h:325:
+ for_each_if (INTEL_INFO(__dev_priv)->cpu_transcoder_mask & BIT(__t))
-:101: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#101: FILE: drivers/gpu/drm/i915/display/intel_display.h:327:
+#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+ for_each_cpu_transcoder(__dev_priv, __t) \
+ for_each_if ((__mask) & BIT(__t))
-:101: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__t' - possible side-effects?
#101: FILE: drivers/gpu/drm/i915/display/intel_display.h:327:
+#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
+ for_each_cpu_transcoder(__dev_priv, __t) \
+ for_each_if ((__mask) & BIT(__t))
-:103: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#103: FILE: drivers/gpu/drm/i915/display/intel_display.h:329:
+ for_each_if ((__mask) & BIT(__t))
-:116: WARNING:LONG_LINE: line over 100 characters
#116: FILE: drivers/gpu/drm/i915/i915_drv.h:1605:
+#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)->cpu_transcoder_mask & BIT(trans)) != 0)
total: 2 errors, 3 warnings, 2 checks, 242 lines checked
2084e75f8c82 drm/i915: Implement port sync for SKL+
-:209: WARNING:LONG_LINE: line over 100 characters
#209: FILE: drivers/gpu/drm/i915/i915_reg.h:9704:
+#define TRANS_DDI_PORT_SYNC_MASTER_SELECT(x) REG_FIELD_PREP(TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK, (x))
total: 0 errors, 1 warnings, 0 checks, 165 lines checked
ed313611cd9d drm/i915: Eliminate port sync copy pasta
a85031aa5231 drm/i915: Fix port sync code to work with >2 pipes
65906b744e8d drm/i915: Do pipe updates after enables for everyone
ba9ff9562959 drm/i915: Pass atomic state to encoder hooks
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:558: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#558: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:149:
+ void (*pre_pll_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:563: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#563: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:153:
+ void (*pre_enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:568: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#568: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:157:
+ void (*enable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:576: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#576: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:164:
+ void (*disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:581: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#581: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:168:
+ void (*post_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:586: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#586: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:172:
+ void (*post_pll_disable)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_atomic_state *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'struct intel_encoder *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct intel_crtc_state *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
-:591: WARNING:FUNCTION_ARGUMENTS: function definition argument 'const struct drm_connector_state *' should also have an identifier name
#591: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:176:
+ void (*update_pipe)(struct intel_atomic_state *,
total: 0 errors, 28 warnings, 0 checks, 1136 lines checked
eea643cabc5f drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Port sync for skl+ (rev3)
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (16 preceding siblings ...)
2020-03-18 21:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3) Patchwork
@ 2020-03-18 22:05 ` Patchwork
2020-03-19 0:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
18 siblings, 0 replies; 41+ messages in thread
From: Patchwork @ 2020-03-18 22:05 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Port sync for skl+ (rev3)
URL : https://patchwork.freedesktop.org/series/74691/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8154 -> Patchwork_17014
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/index.html
Known issues
------------
Here are the changes found in Patchwork_17014 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live@active:
- fi-icl-dsi: [PASS][1] -> [DMESG-FAIL][2] ([i915#765])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-icl-dsi/igt@i915_selftest@live@active.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/fi-icl-dsi/igt@i915_selftest@live@active.html
* igt@i915_selftest@live@execlists:
- fi-apl-guc: [PASS][3] -> [INCOMPLETE][4] ([fdo#103927] / [i915#656])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-apl-guc/igt@i915_selftest@live@execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/fi-apl-guc/igt@i915_selftest@live@execlists.html
- fi-bxt-dsi: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927] / [i915#656])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/fi-bxt-dsi/igt@i915_selftest@live@execlists.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#111407])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@i915_selftest@live@active:
- {fi-tgl-dsi}: [DMESG-FAIL][9] -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/fi-tgl-dsi/igt@i915_selftest@live@active.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/fi-tgl-dsi/igt@i915_selftest@live@active.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#765]: https://gitlab.freedesktop.org/drm/intel/issues/765
Participating hosts (47 -> 39)
------------------------------
Additional (1): fi-skl-guc
Missing (9): fi-ilk-m540 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-ivb-3770 fi-kbl-7560u fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8154 -> Patchwork_17014
CI-20190529: 20190529
CI_DRM_8154: 937a904e393752c47b8dfdeed993f04fd75af74d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5522: bd2b01af69c9720d54e68a8702a23e4ff3637746 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17014: eea643cabc5fb832cbdffe3f04546c82dfd034a6 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
eea643cabc5f drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
ba9ff9562959 drm/i915: Pass atomic state to encoder hooks
65906b744e8d drm/i915: Do pipe updates after enables for everyone
a85031aa5231 drm/i915: Fix port sync code to work with >2 pipes
ed313611cd9d drm/i915: Eliminate port sync copy pasta
2084e75f8c82 drm/i915: Implement port sync for SKL+
248ad2bd291b drm/i915: Store cpu_transcoder_mask in device info
e832ccd1183a drm/i915: Include port sync state in the state dump
6f316fb900f8 drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
aebcfc348cec drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
7200689fa007 drm/i915: Drop usless master_transcoder assignments
0124ef44a60a drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
72dac032db0d drm/i915/mst: Use .compute_config_late() to compute master transcoder
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
@ 2020-03-18 22:34 ` Manasi Navare
2020-03-19 13:20 ` Ville Syrjälä
0 siblings, 1 reply; 41+ messages in thread
From: Manasi Navare @ 2020-03-18 22:34 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Mar 13, 2020 at 06:48:20PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> This port sync enable/disable stuff is misplaced. It's just another step
> of the normal TRANS_DDI_FUNC_CTL enable. Move it to its natural place.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 71 +++++++++++---------
> drivers/gpu/drm/i915/display/intel_display.c | 34 ----------
> 2 files changed, 39 insertions(+), 66 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 73d0f4648c06..8d486282eea3 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1558,12 +1558,34 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> - u32 temp;
> + u32 ctl;
>
> - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> + if (INTEL_GEN(dev_priv) >= 11) {
> + enum transcoder master_transcoder = crtc_state->master_transcoder;
> + u32 ctl2 = 0;
> +
> + if (master_transcoder != INVALID_TRANSCODER) {
> + u8 master_select;
> +
> + if (master_transcoder == TRANSCODER_EDP)
> + master_select = 0;
> + else
> + master_select = master_transcoder + 1;
> +
> + ctl2 |= PORT_SYNC_MODE_ENABLE |
> + (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> + PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> + PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> + }
> +
> + intel_de_write(dev_priv,
> + TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder), ctl2);
> + }
> +
> + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> - temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> + ctl |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> }
>
> /*
> @@ -1576,11 +1598,11 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state)
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> - u32 temp;
> + u32 ctl;
>
> - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> - temp &= ~TRANS_DDI_FUNC_ENABLE;
> - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> }
>
> void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
> @@ -1588,20 +1610,23 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> - u32 val;
> + u32 ctl;
>
> - val = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> - val &= ~TRANS_DDI_FUNC_ENABLE;
> + if (INTEL_GEN(dev_priv) >= 11)
> + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
This should be set to 0 only for the slave where we enable the port sync mode so
set it to 0 only if if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
This will just ensure that we dont accidently set it to 0 for non slave transcoders
Manasi
> +
> + ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> + ctl &= ~TRANS_DDI_FUNC_ENABLE;
>
> if (INTEL_GEN(dev_priv) >= 12) {
> if (!intel_dp_mst_is_master_trans(crtc_state)) {
> - val &= ~(TGL_TRANS_DDI_PORT_MASK |
> + ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
> TRANS_DDI_MODE_SELECT_MASK);
> }
> } else {
> - val &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> + ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> }
> - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), val);
> + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
>
> if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> @@ -3405,21 +3430,6 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
> intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> }
>
> -static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_crtc_state)
> -{
> - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> -
> - if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
> - return;
> -
> - DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
> - transcoder_name(old_crtc_state->cpu_transcoder));
> -
> - intel_de_write(dev_priv,
> - TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
> -}
> -
> static void intel_ddi_post_disable(struct intel_encoder *encoder,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state *old_conn_state)
> @@ -3434,9 +3444,6 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
>
> intel_disable_pipe(old_crtc_state);
>
> - if (INTEL_GEN(dev_priv) >= 11)
> - icl_disable_transcoder_port_sync(old_crtc_state);
> -
> intel_ddi_disable_transcoder_func(old_crtc_state);
>
> intel_dsc_disable(old_crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 8f23c4d51c33..c49b4e6eb3d4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4998,37 +4998,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
> intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
> }
>
> -static void icl_enable_trans_port_sync(const struct intel_crtc_state *crtc_state)
> -{
> - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> - u32 trans_ddi_func_ctl2_val;
> - u8 master_select;
> -
> - /*
> - * Configure the master select and enable Transcoder Port Sync for
> - * Slave CRTCs transcoder.
> - */
> - if (crtc_state->master_transcoder == INVALID_TRANSCODER)
> - return;
> -
> - if (crtc_state->master_transcoder == TRANSCODER_EDP)
> - master_select = 0;
> - else
> - master_select = crtc_state->master_transcoder + 1;
> -
> - /* Set the master select bits for Tranascoder Port Sync */
> - trans_ddi_func_ctl2_val = (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> - PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> - PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> - /* Enable Transcoder Port Sync */
> - trans_ddi_func_ctl2_val |= PORT_SYNC_MODE_ENABLE;
> -
> - intel_de_write(dev_priv,
> - TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder),
> - trans_ddi_func_ctl2_val);
> -}
> -
> static void intel_fdi_normal_train(struct intel_crtc *crtc)
> {
> struct drm_device *dev = crtc->base.dev;
> @@ -7037,9 +7006,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> if (!transcoder_is_dsi(cpu_transcoder))
> intel_set_pipe_timings(new_crtc_state);
>
> - if (INTEL_GEN(dev_priv) >= 11)
> - icl_enable_trans_port_sync(new_crtc_state);
> -
> intel_set_pipe_src_size(new_crtc_state);
>
> if (cpu_transcoder != TRANSCODER_EDP &&
> --
> 2.24.1
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
@ 2020-03-18 22:37 ` Manasi Navare
2020-03-19 13:22 ` Ville Syrjälä
0 siblings, 1 reply; 41+ messages in thread
From: Manasi Navare @ 2020-03-18 22:37 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The entire crtc state has been reset before readout so
> master_transcoder is already set to INVALID.
But wont that mean that the master transcoder would be set to 0
on reset and what we want is actually setting that to INVALID
Manasi
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index c49b4e6eb3d4..12823d8f6afe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> pipe_config->shared_dpll = NULL;
> - pipe_config->master_transcoder = INVALID_TRANSCODER;
>
> ret = false;
>
> @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
>
> pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> pipe_config->shared_dpll = NULL;
> - pipe_config->master_transcoder = INVALID_TRANSCODER;
>
> ret = false;
> tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));
> --
> 2.24.1
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
@ 2020-03-18 22:44 ` Manasi Navare
0 siblings, 0 replies; 41+ messages in thread
From: Manasi Navare @ 2020-03-18 22:44 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Mar 13, 2020 at 06:48:22PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the port sync readout into the DDI code where it belongs.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 54 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display.c | 59 --------------------
> 2 files changed, 54 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 8d486282eea3..39f3e9452aad 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3844,6 +3844,57 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
> crtc_state->min_voltage_level = 2;
> }
>
> +static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
> + enum transcoder cpu_transcoder)
> +{
> + u32 ctl2, master_select;
> +
> + ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
> +
> + if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
> + return INVALID_TRANSCODER;
> +
> + master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
> +
> + if (master_select == 0)
> + return TRANSCODER_EDP;
> + else
> + return master_select - 1;
> +}
> +
> +static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> + u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_D);
> + enum transcoder cpu_transcoder;
> +
> + crtc_state->master_transcoder =
> + transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
> +
> + for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
> + enum intel_display_power_domain power_domain;
> + intel_wakeref_t trans_wakeref;
> +
> + power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> + trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
> + power_domain);
> +
> + if (!trans_wakeref)
> + continue;
> +
> + if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
> + crtc_state->cpu_transcoder)
> + crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
> +
> + intel_display_power_put(dev_priv, power_domain, trans_wakeref);
> + }
> +
> + drm_WARN_ON(&dev_priv->drm,
> + crtc_state->master_transcoder != INVALID_TRANSCODER &&
> + crtc_state->sync_mode_slaves_mask);
> +}
> +
> void intel_ddi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config)
> {
> @@ -3995,6 +4046,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
> intel_read_infoframe(encoder, pipe_config,
> HDMI_INFOFRAME_TYPE_DRM,
> &pipe_config->infoframes.drm);
> +
> + if (INTEL_GEN(dev_priv) >= 11)
> + icl_get_trans_port_sync_config(pipe_config);
> }
>
> static enum intel_output_type
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 12823d8f6afe..5c5a131db8b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11049,61 +11049,6 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc,
> }
> }
>
> -static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
> - enum transcoder cpu_transcoder)
> -{
> - u32 trans_port_sync, master_select;
> -
> - trans_port_sync = intel_de_read(dev_priv,
> - TRANS_DDI_FUNC_CTL2(cpu_transcoder));
> -
> - if ((trans_port_sync & PORT_SYNC_MODE_ENABLE) == 0)
> - return INVALID_TRANSCODER;
> -
> - master_select = trans_port_sync &
> - PORT_SYNC_MODE_MASTER_SELECT_MASK;
> - if (master_select == 0)
> - return TRANSCODER_EDP;
> - else
> - return master_select - 1;
> -}
> -
> -static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> - u32 transcoders;
> - enum transcoder cpu_transcoder;
> -
> - crtc_state->master_transcoder = transcoder_master_readout(dev_priv,
> - crtc_state->cpu_transcoder);
> -
> - transcoders = BIT(TRANSCODER_A) |
> - BIT(TRANSCODER_B) |
> - BIT(TRANSCODER_C) |
> - BIT(TRANSCODER_D);
> - for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
> - enum intel_display_power_domain power_domain;
> - intel_wakeref_t trans_wakeref;
> -
> - power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> - trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
> - power_domain);
> -
> - if (!trans_wakeref)
> - continue;
> -
> - if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
> - crtc_state->cpu_transcoder)
> - crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
> -
> - intel_display_power_put(dev_priv, power_domain, trans_wakeref);
> - }
> -
> - drm_WARN_ON(&dev_priv->drm,
> - crtc_state->master_transcoder != INVALID_TRANSCODER &&
> - crtc_state->sync_mode_slaves_mask);
> -}
> -
> static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> struct intel_crtc_state *pipe_config)
> {
> @@ -11235,10 +11180,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->pixel_multiplier = 1;
> }
>
> - if (INTEL_GEN(dev_priv) >= 11 &&
> - !transcoder_is_dsi(pipe_config->cpu_transcoder))
> - icl_get_trans_port_sync_config(pipe_config);
> -
> out:
> for_each_power_domain(power_domain, power_domain_mask)
> intel_display_power_put(dev_priv,
> --
> 2.24.1
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
@ 2020-03-18 22:53 ` Manasi Navare
0 siblings, 0 replies; 41+ messages in thread
From: Manasi Navare @ 2020-03-18 22:53 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Mar 13, 2020 at 06:48:23PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Clean up the TRANS_DDI_FUNC_CTL2 programming/readout by
> using REG_FIELD_PREP() & co.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++----
> drivers/gpu/drm/i915/i915_reg.h | 10 ++++------
> 2 files changed, 6 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 39f3e9452aad..8bb6c583abb8 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1573,9 +1573,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
> master_select = master_transcoder + 1;
>
> ctl2 |= PORT_SYNC_MODE_ENABLE |
> - (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> - PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> - PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> + PORT_SYNC_MODE_MASTER_SELECT(master_select);
> }
>
> intel_de_write(dev_priv,
> @@ -3854,7 +3852,7 @@ static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_pr
> if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
> return INVALID_TRANSCODER;
>
> - master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
> + master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
>
> if (master_select == 0)
> return TRANSCODER_EDP;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 309cb7d96b35..fc5c00bfed87 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9726,12 +9726,10 @@ enum skl_power_gate {
> #define _TRANS_DDI_FUNC_CTL2_EDP 0x6f404
> #define _TRANS_DDI_FUNC_CTL2_DSI0 0x6b404
> #define _TRANS_DDI_FUNC_CTL2_DSI1 0x6bc04
> -#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \
> - _TRANS_DDI_FUNC_CTL2_A)
> -#define PORT_SYNC_MODE_ENABLE (1 << 4)
> -#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) << 0)
> -#define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0)
> -#define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0
> +#define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, _TRANS_DDI_FUNC_CTL2_A)
> +#define PORT_SYNC_MODE_ENABLE REG_BIT(4)
> +#define PORT_SYNC_MODE_MASTER_SELECT_MASK REG_GENMASK(2, 0)
> +#define PORT_SYNC_MODE_MASTER_SELECT(x) REG_FIELD_PREP(PORT_SYNC_MODE_MASTER_SELECT_MASK, (x))
>
> /* DisplayPort Transport Control */
> #define _DP_TP_CTL_A 0x64040
> --
> 2.24.1
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
@ 2020-03-18 23:00 ` Manasi Navare
2020-03-27 17:15 ` Ville Syrjälä
0 siblings, 1 reply; 41+ messages in thread
From: Manasi Navare @ 2020-03-18 23:00 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Mar 13, 2020 at 06:48:24PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Dump the port sync stat in intel_dump_pipe_config().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.anavre@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 5c5a131db8b4..4840988dc58d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -12947,6 +12947,11 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
> transcoder_name(pipe_config->cpu_transcoder),
> pipe_config->pipe_bpp, pipe_config->dither);
>
> + drm_dbg_kms(&dev_priv->drm,
> + "port sync: master transcoder: %s, slave transcoder bitmask = 0x%x\n",
> + transcoder_name(pipe_config->master_transcoder),
> + pipe_config->sync_mode_slaves_mask);
> +
> if (pipe_config->has_pch_encoder)
> intel_dump_m_n_config(pipe_config, "fdi",
> pipe_config->fdi_lanes,
> --
> 2.24.1
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
@ 2020-03-18 23:32 ` Manasi Navare
0 siblings, 0 replies; 41+ messages in thread
From: Manasi Navare @ 2020-03-18 23:32 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Mar 13, 2020 at 06:48:26PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Transcoder port sync was introduced to the hardware in BDW. We
> can trivially enable it for SKL+ since the same codepaths are
> already used for ICL+ port sync. The only difference is the actual
> location of the bits we need to poke.
>
> We leave BDW out (at least for now) since it uses different modeset
> paths that haven't been adapted for port sync, and IIRC using the
> feature would involve some extra workarounds we've not implemented.
>
> Pre-BDW hardware does not support port sync so we'd have to tweak
> the modeset sequence to start the pipes as close together as possible
> and hope for the best. So far no one has seriously tried to implement
> that.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/27
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 70 +++++++++++++++++-------
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +-
> drivers/gpu/drm/i915/i915_reg.h | 3 +
> 3 files changed, 59 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 0fea2ec2cdd8..9e6eb0ee5ba4 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1450,6 +1450,14 @@ void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
> intel_de_write(dev_priv, TRANS_MSA_MISC(cpu_transcoder), temp);
> }
>
> +static u32 bdw_trans_port_sync_master_select(enum transcoder master_transcoder)
> +{
> + if (master_transcoder == TRANSCODER_EDP)
> + return 0;
> + else
> + return master_transcoder + 1;
> +}
> +
> /*
> * Returns the TRANS_DDI_FUNC_CTL value based on CRTC state.
> *
> @@ -1550,6 +1558,15 @@ intel_ddi_transcoder_func_reg_val_get(const struct intel_crtc_state *crtc_state)
> temp |= DDI_PORT_WIDTH(crtc_state->lane_count);
> }
>
> + if (IS_GEN_RANGE(dev_priv, 8, 10) &&
> + crtc_state->master_transcoder != INVALID_TRANSCODER) {
> + u8 master_select =
> + bdw_trans_port_sync_master_select(crtc_state->master_transcoder);
> +
> + temp |= TRANS_DDI_PORT_SYNC_ENABLE |
> + TRANS_DDI_PORT_SYNC_MASTER_SELECT(master_select);
> + }
> +
> return temp;
> }
>
> @@ -1565,12 +1582,8 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
> u32 ctl2 = 0;
>
> if (master_transcoder != INVALID_TRANSCODER) {
> - u8 master_select;
> -
> - if (master_transcoder == TRANSCODER_EDP)
> - master_select = 0;
> - else
> - master_select = master_transcoder + 1;
> + u8 master_select =
> + bdw_trans_port_sync_master_select(master_transcoder);
>
> ctl2 |= PORT_SYNC_MODE_ENABLE |
> PORT_SYNC_MODE_MASTER_SELECT(master_select);
> @@ -1614,8 +1627,13 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
>
> ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> +
> ctl &= ~TRANS_DDI_FUNC_ENABLE;
>
> + if (IS_GEN_RANGE(dev_priv, 8, 10))
> + ctl &= ~(TRANS_DDI_PORT_SYNC_ENABLE |
> + TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK);
> +
> if (INTEL_GEN(dev_priv) >= 12) {
> if (!intel_dp_mst_is_master_trans(crtc_state)) {
> ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
> @@ -1624,6 +1642,7 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> } else {
> ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> }
> +
> intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
>
> if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> @@ -3842,17 +3861,26 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
> crtc_state->min_voltage_level = 2;
> }
>
> -static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
> - enum transcoder cpu_transcoder)
> +static enum transcoder bdw_transcoder_master_readout(struct drm_i915_private *dev_priv,
> + enum transcoder cpu_transcoder)
> {
> - u32 ctl2, master_select;
> + u32 master_select;
>
> - ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
> + if (INTEL_GEN(dev_priv) >= 11) {
> + u32 ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
>
> - if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
> - return INVALID_TRANSCODER;
> + if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
> + return INVALID_TRANSCODER;
>
> - master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
> + master_select = REG_FIELD_GET(PORT_SYNC_MODE_MASTER_SELECT_MASK, ctl2);
> + } else {
> + u32 ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> +
> + if ((ctl & TRANS_DDI_PORT_SYNC_ENABLE) == 0)
> + return INVALID_TRANSCODER;
> +
> + master_select = REG_FIELD_GET(TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK, ctl);
> + }
>
> if (master_select == 0)
> return TRANSCODER_EDP;
> @@ -3860,7 +3888,7 @@ static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_pr
> return master_select - 1;
> }
>
> -static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> +static void bdw_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> @@ -3868,7 +3896,7 @@ static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> enum transcoder cpu_transcoder;
>
> crtc_state->master_transcoder =
> - transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
> + bdw_transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
>
> for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
> enum intel_display_power_domain power_domain;
> @@ -3881,7 +3909,7 @@ static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> if (!trans_wakeref)
> continue;
>
> - if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
> + if (bdw_transcoder_master_readout(dev_priv, cpu_transcoder) ==
> crtc_state->cpu_transcoder)
> crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
>
> @@ -4045,8 +4073,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
> HDMI_INFOFRAME_TYPE_DRM,
> &pipe_config->infoframes.drm);
>
> - if (INTEL_GEN(dev_priv) >= 11)
> - icl_get_trans_port_sync_config(pipe_config);
> + if (INTEL_GEN(dev_priv) >= 8)
> + bdw_get_trans_port_sync_config(pipe_config);
> }
>
> static enum intel_output_type
> @@ -4148,7 +4176,11 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state,
> u8 transcoders = 0;
> int i;
>
> - if (INTEL_GEN(dev_priv) < 11)
> + /*
> + * We don't enable port sync on BDW due to missing w/as and
> + * due to not having adjusted the modeset sequence appropriately.
> + */
> + if (INTEL_GEN(dev_priv) < 9)
> return 0;
>
> if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0a417cd2af2b..89d54f5fe60b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -6724,7 +6724,11 @@ static int intel_dp_connector_atomic_check(struct drm_connector *conn,
> if (ret)
> return ret;
>
> - if (INTEL_GEN(dev_priv) < 11)
> + /*
> + * We don't enable port sync on BDW due to missing w/as and
> + * due to not having adjusted the modeset sequence appropriately.
> + */
> + if (INTEL_GEN(dev_priv) < 9)
> return 0;
>
> if (!intel_connector_needs_modeset(state, conn))
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index fc5c00bfed87..fdee1da801bf 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9698,8 +9698,11 @@ enum skl_power_gate {
> #define TRANS_DDI_BPC_10 (1 << 20)
> #define TRANS_DDI_BPC_6 (2 << 20)
> #define TRANS_DDI_BPC_12 (3 << 20)
> +#define TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK REG_GENMASK(19, 18) /* bdw-cnl */
> +#define TRANS_DDI_PORT_SYNC_MASTER_SELECT(x) REG_FIELD_PREP(TRANS_DDI_PORT_SYNC_MASTER_SELECT_MASK, (x))
> #define TRANS_DDI_PVSYNC (1 << 17)
> #define TRANS_DDI_PHSYNC (1 << 16)
> +#define TRANS_DDI_PORT_SYNC_ENABLE REG_BIT(15) /* bdw-cnl */
> #define TRANS_DDI_EDP_INPUT_MASK (7 << 12)
> #define TRANS_DDI_EDP_INPUT_A_ON (0 << 12)
> #define TRANS_DDI_EDP_INPUT_A_ONOFF (4 << 12)
> --
> 2.24.1
>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Port sync for skl+ (rev3)
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
` (17 preceding siblings ...)
2020-03-18 22:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-03-19 0:19 ` Patchwork
18 siblings, 0 replies; 41+ messages in thread
From: Patchwork @ 2020-03-19 0:19 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Port sync for skl+ (rev3)
URL : https://patchwork.freedesktop.org/series/74691/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8154_full -> Patchwork_17014_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_17014_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +6 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl7/igt@gem_ctx_isolation@rcs0-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_exec_balancer@hang:
- shard-tglb: [PASS][3] -> [FAIL][4] ([i915#1277])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-tglb2/igt@gem_exec_balancer@hang.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-tglb5/igt@gem_exec_balancer@hang.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110854])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb4/igt@gem_exec_balancer@smoke.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb3/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@implicit-both-bsd2:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [i915#677]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb1/igt@gem_exec_schedule@implicit-both-bsd2.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb7/igt@gem_exec_schedule@implicit-both-bsd2.html
* igt@gem_exec_schedule@pi-common-bsd:
- shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb8/igt@gem_exec_schedule@pi-common-bsd.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb1/igt@gem_exec_schedule@pi-common-bsd.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276]) +29 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb3/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#112146]) +6 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb7/igt@gem_exec_schedule@reorder-wide-bsd.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_exec_whisper@basic-fds-priority:
- shard-iclb: [PASS][15] -> [INCOMPLETE][16] ([i915#1394] / [i915#1401])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb6/igt@gem_exec_whisper@basic-fds-priority.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb2/igt@gem_exec_whisper@basic-fds-priority.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [PASS][17] -> [FAIL][18] ([i915#644])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl6/igt@gem_ppgtt@flink-and-close-vma-leak.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-apl2/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +3 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-apl4/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [PASS][21] -> [FAIL][22] ([i915#454])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
* igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding:
- shard-skl: [PASS][23] -> [FAIL][24] ([i915#54])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-256x85-sliding.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-glk: [PASS][25] -> [FAIL][26] ([i915#79])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][27] -> [FAIL][28] ([i915#1188])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl5/igt@kms_hdr@bpc-switch.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-skl1/igt@kms_hdr@bpc-switch.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109441]) +2 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_vblank@pipe-c-ts-continuation-suspend:
- shard-skl: [PASS][33] -> [INCOMPLETE][34] ([i915#69])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl2/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
* igt@perf_pmu@busy-vcs1:
- shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#112080]) +11 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb2/igt@perf_pmu@busy-vcs1.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb5/igt@perf_pmu@busy-vcs1.html
#### Possible fixes ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-skl: [INCOMPLETE][37] ([i915#69]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl8/igt@gem_ctx_isolation@rcs0-s3.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-skl1/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_persistence@close-replace-race:
- shard-apl: [INCOMPLETE][39] ([fdo#103927] / [i915#1402]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl3/igt@gem_ctx_persistence@close-replace-race.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-apl8/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_exec_schedule@implicit-both-bsd:
- shard-iclb: [SKIP][41] ([i915#677]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb4/igt@gem_exec_schedule@implicit-both-bsd.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb3/igt@gem_exec_schedule@implicit-both-bsd.html
* igt@gem_exec_schedule@implicit-both-bsd1:
- shard-iclb: [SKIP][43] ([fdo#109276] / [i915#677]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb7/igt@gem_exec_schedule@implicit-both-bsd1.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb1/igt@gem_exec_schedule@implicit-both-bsd1.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][45] ([fdo#112146]) -> [PASS][46] +5 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb3/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@i915_pm_rpm@system-suspend-modeset:
- shard-kbl: [INCOMPLETE][47] ([i915#151] / [i915#155]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl2/igt@i915_pm_rpm@system-suspend-modeset.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-kbl1/igt@i915_pm_rpm@system-suspend-modeset.html
* igt@i915_suspend@forcewake:
- shard-apl: [DMESG-WARN][49] ([i915#180]) -> [PASS][50] +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl4/igt@i915_suspend@forcewake.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-apl7/igt@i915_suspend@forcewake.html
* igt@kms_atomic@plane_overlay_legacy:
- shard-snb: [SKIP][51] ([fdo#109271]) -> [PASS][52] +2 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-snb6/igt@kms_atomic@plane_overlay_legacy.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-snb6/igt@kms_atomic@plane_overlay_legacy.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +3 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-kbl2/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@cursor-vs-flip-toggle:
- shard-hsw: [FAIL][55] ([i915#57]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-hsw1/igt@kms_cursor_legacy@cursor-vs-flip-toggle.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: [FAIL][57] ([i915#79]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-glk5/igt@kms_flip@2x-flip-vs-expired-vblank.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [FAIL][59] ([i915#1188]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-skl4/igt@kms_hdr@bpc-switch-dpms.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][61] ([fdo#109642] / [fdo#111068]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb7/igt@kms_psr2_su@page_flip.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: [SKIP][63] ([fdo#109441]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb8/igt@kms_psr@psr2_dpms.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb2/igt@kms_psr@psr2_dpms.html
* igt@kms_setmode@basic:
- shard-hsw: [FAIL][65] ([i915#31]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-hsw7/igt@kms_setmode@basic.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-hsw4/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [SKIP][67] ([fdo#112080]) -> [PASS][68] +12 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb4/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][69] ([fdo#109276]) -> [PASS][70] +17 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [SKIP][71] ([i915#468]) -> [FAIL][72] ([i915#454])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-tglb7/igt@i915_pm_dc@dc6-dpms.html
* igt@runner@aborted:
- shard-apl: ([FAIL][73], [FAIL][74]) ([fdo#103927] / [i915#1402]) -> [FAIL][75] ([fdo#103927])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl3/igt@runner@aborted.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8154/shard-apl2/igt@runner@aborted.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/shard-apl7/igt@runner@aborted.html
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1277]: https://gitlab.freedesktop.org/drm/intel/issues/1277
[i915#1394]: https://gitlab.freedesktop.org/drm/intel/issues/1394
[i915#1401]: https://gitlab.freedesktop.org/drm/intel/issues/1401
[i915#1402]: https://gitlab.freedesktop.org/drm/intel/issues/1402
[i915#151]: https://gitlab.freedesktop.org/drm/intel/issues/151
[i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#57]: https://gitlab.freedesktop.org/drm/intel/issues/57
[i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8154 -> Patchwork_17014
CI-20190529: 20190529
CI_DRM_8154: 937a904e393752c47b8dfdeed993f04fd75af74d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5522: bd2b01af69c9720d54e68a8702a23e4ff3637746 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_17014: eea643cabc5fb832cbdffe3f04546c82dfd034a6 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_17014/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
2020-03-18 22:34 ` Manasi Navare
@ 2020-03-19 13:20 ` Ville Syrjälä
2020-03-20 18:36 ` Manasi Navare
0 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjälä @ 2020-03-19 13:20 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, Mar 18, 2020 at 03:34:38PM -0700, Manasi Navare wrote:
> On Fri, Mar 13, 2020 at 06:48:20PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > This port sync enable/disable stuff is misplaced. It's just another step
> > of the normal TRANS_DDI_FUNC_CTL enable. Move it to its natural place.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_ddi.c | 71 +++++++++++---------
> > drivers/gpu/drm/i915/display/intel_display.c | 34 ----------
> > 2 files changed, 39 insertions(+), 66 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 73d0f4648c06..8d486282eea3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -1558,12 +1558,34 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 temp;
> > + u32 ctl;
> >
> > - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > + if (INTEL_GEN(dev_priv) >= 11) {
> > + enum transcoder master_transcoder = crtc_state->master_transcoder;
> > + u32 ctl2 = 0;
> > +
> > + if (master_transcoder != INVALID_TRANSCODER) {
> > + u8 master_select;
> > +
> > + if (master_transcoder == TRANSCODER_EDP)
> > + master_select = 0;
> > + else
> > + master_select = master_transcoder + 1;
> > +
> > + ctl2 |= PORT_SYNC_MODE_ENABLE |
> > + (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> > + PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> > + PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> > + }
> > +
> > + intel_de_write(dev_priv,
> > + TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder), ctl2);
> > + }
> > +
> > + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> > - temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> > + ctl |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > }
> >
> > /*
> > @@ -1576,11 +1598,11 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state)
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 temp;
> > + u32 ctl;
> >
> > - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > - temp &= ~TRANS_DDI_FUNC_ENABLE;
> > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> > + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > }
> >
> > void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
> > @@ -1588,20 +1610,23 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > - u32 val;
> > + u32 ctl;
> >
> > - val = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > - val &= ~TRANS_DDI_FUNC_ENABLE;
> > + if (INTEL_GEN(dev_priv) >= 11)
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
>
> This should be set to 0 only for the slave where we enable the port sync mode so
> set it to 0 only if if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
>
> This will just ensure that we dont accidently set it to 0 for non slave transcoders
No, we should just write the value we want for every transcoder. If
there are bits in there that should be set then we should set them
explicitly. But I didn't think there's anything we want to set.
>
> Manasi
>
> > +
> > + ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> >
> > if (INTEL_GEN(dev_priv) >= 12) {
> > if (!intel_dp_mst_is_master_trans(crtc_state)) {
> > - val &= ~(TGL_TRANS_DDI_PORT_MASK |
> > + ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
> > TRANS_DDI_MODE_SELECT_MASK);
> > }
> > } else {
> > - val &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> > + ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> > }
> > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), val);
> > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> >
> > if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> > intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> > @@ -3405,21 +3430,6 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
> > intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> > }
> >
> > -static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_crtc_state)
> > -{
> > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > -
> > - if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
> > - return;
> > -
> > - DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
> > - transcoder_name(old_crtc_state->cpu_transcoder));
> > -
> > - intel_de_write(dev_priv,
> > - TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
> > -}
> > -
> > static void intel_ddi_post_disable(struct intel_encoder *encoder,
> > const struct intel_crtc_state *old_crtc_state,
> > const struct drm_connector_state *old_conn_state)
> > @@ -3434,9 +3444,6 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
> >
> > intel_disable_pipe(old_crtc_state);
> >
> > - if (INTEL_GEN(dev_priv) >= 11)
> > - icl_disable_transcoder_port_sync(old_crtc_state);
> > -
> > intel_ddi_disable_transcoder_func(old_crtc_state);
> >
> > intel_dsc_disable(old_crtc_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 8f23c4d51c33..c49b4e6eb3d4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -4998,37 +4998,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
> > intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
> > }
> >
> > -static void icl_enable_trans_port_sync(const struct intel_crtc_state *crtc_state)
> > -{
> > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > - u32 trans_ddi_func_ctl2_val;
> > - u8 master_select;
> > -
> > - /*
> > - * Configure the master select and enable Transcoder Port Sync for
> > - * Slave CRTCs transcoder.
> > - */
> > - if (crtc_state->master_transcoder == INVALID_TRANSCODER)
> > - return;
> > -
> > - if (crtc_state->master_transcoder == TRANSCODER_EDP)
> > - master_select = 0;
> > - else
> > - master_select = crtc_state->master_transcoder + 1;
> > -
> > - /* Set the master select bits for Tranascoder Port Sync */
> > - trans_ddi_func_ctl2_val = (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> > - PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> > - PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> > - /* Enable Transcoder Port Sync */
> > - trans_ddi_func_ctl2_val |= PORT_SYNC_MODE_ENABLE;
> > -
> > - intel_de_write(dev_priv,
> > - TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder),
> > - trans_ddi_func_ctl2_val);
> > -}
> > -
> > static void intel_fdi_normal_train(struct intel_crtc *crtc)
> > {
> > struct drm_device *dev = crtc->base.dev;
> > @@ -7037,9 +7006,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> > if (!transcoder_is_dsi(cpu_transcoder))
> > intel_set_pipe_timings(new_crtc_state);
> >
> > - if (INTEL_GEN(dev_priv) >= 11)
> > - icl_enable_trans_port_sync(new_crtc_state);
> > -
> > intel_set_pipe_src_size(new_crtc_state);
> >
> > if (cpu_transcoder != TRANSCODER_EDP &&
> > --
> > 2.24.1
> >
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments
2020-03-18 22:37 ` Manasi Navare
@ 2020-03-19 13:22 ` Ville Syrjälä
2020-03-20 23:12 ` Manasi Navare
0 siblings, 1 reply; 41+ messages in thread
From: Ville Syrjälä @ 2020-03-19 13:22 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, Mar 18, 2020 at 03:37:32PM -0700, Manasi Navare wrote:
> On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The entire crtc state has been reset before readout so
> > master_transcoder is already set to INVALID.
>
> But wont that mean that the master transcoder would be set to 0
> on reset and what we want is actually setting that to INVALID
No. Pls see intel_crtc_state_reset()
>
> Manasi
>
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 2 --
> > 1 file changed, 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index c49b4e6eb3d4..12823d8f6afe 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > pipe_config->shared_dpll = NULL;
> > - pipe_config->master_transcoder = INVALID_TRANSCODER;
> >
> > ret = false;
> >
> > @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
> >
> > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > pipe_config->shared_dpll = NULL;
> > - pipe_config->master_transcoder = INVALID_TRANSCODER;
> >
> > ret = false;
> > tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));
> > --
> > 2.24.1
> >
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs
2020-03-19 13:20 ` Ville Syrjälä
@ 2020-03-20 18:36 ` Manasi Navare
0 siblings, 0 replies; 41+ messages in thread
From: Manasi Navare @ 2020-03-20 18:36 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Thu, Mar 19, 2020 at 03:20:56PM +0200, Ville Syrjälä wrote:
> On Wed, Mar 18, 2020 at 03:34:38PM -0700, Manasi Navare wrote:
> > On Fri, Mar 13, 2020 at 06:48:20PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > This port sync enable/disable stuff is misplaced. It's just another step
> > > of the normal TRANS_DDI_FUNC_CTL enable. Move it to its natural place.
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_ddi.c | 71 +++++++++++---------
> > > drivers/gpu/drm/i915/display/intel_display.c | 34 ----------
> > > 2 files changed, 39 insertions(+), 66 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index 73d0f4648c06..8d486282eea3 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -1558,12 +1558,34 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > > - u32 temp;
> > > + u32 ctl;
> > >
> > > - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > > + if (INTEL_GEN(dev_priv) >= 11) {
> > > + enum transcoder master_transcoder = crtc_state->master_transcoder;
> > > + u32 ctl2 = 0;
> > > +
> > > + if (master_transcoder != INVALID_TRANSCODER) {
> > > + u8 master_select;
> > > +
> > > + if (master_transcoder == TRANSCODER_EDP)
> > > + master_select = 0;
> > > + else
> > > + master_select = master_transcoder + 1;
> > > +
> > > + ctl2 |= PORT_SYNC_MODE_ENABLE |
> > > + (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> > > + PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> > > + PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> > > + }
> > > +
> > > + intel_de_write(dev_priv,
> > > + TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder), ctl2);
> > > + }
> > > +
> > > + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
> > > - temp |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> > > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> > > + ctl |= TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
> > > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > > }
> > >
> > > /*
> > > @@ -1576,11 +1598,11 @@ intel_ddi_config_transcoder_func(const struct intel_crtc_state *crtc_state)
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > > - u32 temp;
> > > + u32 ctl;
> > >
> > > - temp = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > > - temp &= ~TRANS_DDI_FUNC_ENABLE;
> > > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), temp);
> > > + ctl = intel_ddi_transcoder_func_reg_val_get(crtc_state);
> > > + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> > > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > > }
> > >
> > > void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state)
> > > @@ -1588,20 +1610,23 @@ void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
> > > - u32 val;
> > > + u32 ctl;
> > >
> > > - val = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > > - val &= ~TRANS_DDI_FUNC_ENABLE;
> > > + if (INTEL_GEN(dev_priv) >= 11)
> > > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder), 0);
> >
> > This should be set to 0 only for the slave where we enable the port sync mode so
> > set it to 0 only if if (old_crtc_state->master_transcoder != INVALID_TRANSCODER)
> >
> > This will just ensure that we dont accidently set it to 0 for non slave transcoders
>
> No, we should just write the value we want for every transcoder. If
> there are bits in there that should be set then we should set them
> explicitly. But I didn't think there's anything we want to set.
>
Yes for now there is nothing that we need to set.
So for now,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> >
> > Manasi
> >
> > > +
> > > + ctl = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
> > > + ctl &= ~TRANS_DDI_FUNC_ENABLE;
> > >
> > > if (INTEL_GEN(dev_priv) >= 12) {
> > > if (!intel_dp_mst_is_master_trans(crtc_state)) {
> > > - val &= ~(TGL_TRANS_DDI_PORT_MASK |
> > > + ctl &= ~(TGL_TRANS_DDI_PORT_MASK |
> > > TRANS_DDI_MODE_SELECT_MASK);
> > > }
> > > } else {
> > > - val &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> > > + ctl &= ~(TRANS_DDI_PORT_MASK | TRANS_DDI_MODE_SELECT_MASK);
> > > }
> > > - intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), val);
> > > + intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl);
> > >
> > > if (dev_priv->quirks & QUIRK_INCREASE_DDI_DISABLED_TIME &&
> > > intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> > > @@ -3405,21 +3430,6 @@ static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
> > > intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> > > }
> > >
> > > -static void icl_disable_transcoder_port_sync(const struct intel_crtc_state *old_crtc_state)
> > > -{
> > > - struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
> > > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > -
> > > - if (old_crtc_state->master_transcoder == INVALID_TRANSCODER)
> > > - return;
> > > -
> > > - DRM_DEBUG_KMS("Disabling Transcoder Port Sync on Slave Transcoder %s\n",
> > > - transcoder_name(old_crtc_state->cpu_transcoder));
> > > -
> > > - intel_de_write(dev_priv,
> > > - TRANS_DDI_FUNC_CTL2(old_crtc_state->cpu_transcoder), 0);
> > > -}
> > > -
> > > static void intel_ddi_post_disable(struct intel_encoder *encoder,
> > > const struct intel_crtc_state *old_crtc_state,
> > > const struct drm_connector_state *old_conn_state)
> > > @@ -3434,9 +3444,6 @@ static void intel_ddi_post_disable(struct intel_encoder *encoder,
> > >
> > > intel_disable_pipe(old_crtc_state);
> > >
> > > - if (INTEL_GEN(dev_priv) >= 11)
> > > - icl_disable_transcoder_port_sync(old_crtc_state);
> > > -
> > > intel_ddi_disable_transcoder_func(old_crtc_state);
> > >
> > > intel_dsc_disable(old_crtc_state);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 8f23c4d51c33..c49b4e6eb3d4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -4998,37 +4998,6 @@ static void icl_set_pipe_chicken(struct intel_crtc *crtc)
> > > intel_de_write(dev_priv, PIPE_CHICKEN(pipe), tmp);
> > > }
> > >
> > > -static void icl_enable_trans_port_sync(const struct intel_crtc_state *crtc_state)
> > > -{
> > > - struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > - struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > - u32 trans_ddi_func_ctl2_val;
> > > - u8 master_select;
> > > -
> > > - /*
> > > - * Configure the master select and enable Transcoder Port Sync for
> > > - * Slave CRTCs transcoder.
> > > - */
> > > - if (crtc_state->master_transcoder == INVALID_TRANSCODER)
> > > - return;
> > > -
> > > - if (crtc_state->master_transcoder == TRANSCODER_EDP)
> > > - master_select = 0;
> > > - else
> > > - master_select = crtc_state->master_transcoder + 1;
> > > -
> > > - /* Set the master select bits for Tranascoder Port Sync */
> > > - trans_ddi_func_ctl2_val = (PORT_SYNC_MODE_MASTER_SELECT(master_select) &
> > > - PORT_SYNC_MODE_MASTER_SELECT_MASK) <<
> > > - PORT_SYNC_MODE_MASTER_SELECT_SHIFT;
> > > - /* Enable Transcoder Port Sync */
> > > - trans_ddi_func_ctl2_val |= PORT_SYNC_MODE_ENABLE;
> > > -
> > > - intel_de_write(dev_priv,
> > > - TRANS_DDI_FUNC_CTL2(crtc_state->cpu_transcoder),
> > > - trans_ddi_func_ctl2_val);
> > > -}
> > > -
> > > static void intel_fdi_normal_train(struct intel_crtc *crtc)
> > > {
> > > struct drm_device *dev = crtc->base.dev;
> > > @@ -7037,9 +7006,6 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
> > > if (!transcoder_is_dsi(cpu_transcoder))
> > > intel_set_pipe_timings(new_crtc_state);
> > >
> > > - if (INTEL_GEN(dev_priv) >= 11)
> > > - icl_enable_trans_port_sync(new_crtc_state);
> > > -
> > > intel_set_pipe_src_size(new_crtc_state);
> > >
> > > if (cpu_transcoder != TRANSCODER_EDP &&
> > > --
> > > 2.24.1
> > >
>
> --
> Ville Syrjälä
> Intel
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments
2020-03-19 13:22 ` Ville Syrjälä
@ 2020-03-20 23:12 ` Manasi Navare
0 siblings, 0 replies; 41+ messages in thread
From: Manasi Navare @ 2020-03-20 23:12 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
On Thu, Mar 19, 2020 at 03:22:06PM +0200, Ville Syrjälä wrote:
> On Wed, Mar 18, 2020 at 03:37:32PM -0700, Manasi Navare wrote:
> > On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > >
> > > The entire crtc state has been reset before readout so
> > > master_transcoder is already set to INVALID.
> >
> > But wont that mean that the master transcoder would be set to 0
> > on reset and what we want is actually setting that to INVALID
>
> No. Pls see intel_crtc_state_reset()
>
Okay got it with that
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
>
> >
> > Manasi
> >
> > >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.c | 2 --
> > > 1 file changed, 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > > index c49b4e6eb3d4..12823d8f6afe 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > > pipe_config->shared_dpll = NULL;
> > > - pipe_config->master_transcoder = INVALID_TRANSCODER;
> > >
> > > ret = false;
> > >
> > > @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc,
> > >
> > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe;
> > > pipe_config->shared_dpll = NULL;
> > > - pipe_config->master_transcoder = INVALID_TRANSCODER;
> > >
> > > ret = false;
> > > tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));
> > > --
> > > 2.24.1
> > >
>
> --
> Ville Syrjälä
> Intel
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
@ 2020-03-20 23:37 ` Souza, Jose
2020-03-20 23:54 ` Souza, Jose
0 siblings, 1 reply; 41+ messages in thread
From: Souza, Jose @ 2020-03-20 23:37 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
This will not work for MST, here a example
Previous state:
MST master pipe A
MST slave pipe B
New state:
Pipe A being disabled
On drm_atomic_helper_check_modeset() both intel_crtc_states will be
added to the state with crtc_state->uapi.mode_changed=true.
Then on the regular for_each_oldnew_intel_crtc_in_state() loop config
of CRTC B will have mst_master_transcoder=INVALID_TRANSCODER that
differs from TRANSCODER_A and will keep mode_changed set.
Then on the config_late loop it will skip the interation on the
needs_modeset() check keeping CRTC B with
mst_master_transcoder=INVALID_TRANSCODER.
That would be caugh by CI if this tests were merged and the TGL machine
with MST is still on: https://patchwork.freedesktop.org/series/72211/
On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Use the recently introduced encoder .compute_config_late() hook to
> do the MST master transcoder assignment. Avoids having to do it
> in a funny way before we know the CPU transcoder of each pipe.
>
> And now we can also properly use hw.active instead of uapi.active
> since it too has been calculated earlier for everyone.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 98 +++++++++++------
> ----
> 1 file changed, 51 insertions(+), 47 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 44f3fd251ca1..b9afc1135b9b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -88,56 +88,10 @@ static int
> intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> return 0;
> }
>
> -/*
> - * Iterate over all connectors and return the smallest transcoder in
> the MST
> - * stream
> - */
> -static enum transcoder
> -intel_dp_mst_master_trans_compute(struct intel_atomic_state *state,
> - struct intel_dp *mst_port)
> -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - struct intel_digital_connector_state *conn_state;
> - struct intel_connector *connector;
> - enum pipe ret = I915_MAX_PIPES;
> - int i;
> -
> - if (INTEL_GEN(dev_priv) < 12)
> - return INVALID_TRANSCODER;
> -
> - for_each_new_intel_connector_in_state(state, connector,
> conn_state, i) {
> - struct intel_crtc_state *crtc_state;
> - struct intel_crtc *crtc;
> -
> - if (connector->mst_port != mst_port || !conn_state-
> >base.crtc)
> - continue;
> -
> - crtc = to_intel_crtc(conn_state->base.crtc);
> - crtc_state = intel_atomic_get_new_crtc_state(state,
> crtc);
> - if (!crtc_state->uapi.active)
> - continue;
> -
> - /*
> - * Using crtc->pipe because crtc_state->cpu_transcoder
> is
> - * computed, so others CRTCs could have non-computed
> - * cpu_transcoder
> - */
> - if (crtc->pipe < ret)
> - ret = crtc->pipe;
> - }
> -
> - if (ret == I915_MAX_PIPES)
> - return INVALID_TRANSCODER;
> -
> - /* Simple cast works because TGL don't have a eDP transcoder */
> - return (enum transcoder)ret;
> -}
> -
> static int intel_dp_mst_compute_config(struct intel_encoder
> *encoder,
> struct intel_crtc_state
> *pipe_config,
> struct drm_connector_state
> *conn_state)
> {
> - struct intel_atomic_state *state =
> to_intel_atomic_state(conn_state->state);
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> struct intel_dp *intel_dp = &intel_mst->primary->dp;
> @@ -201,7 +155,56 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
>
> intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
>
> - pipe_config->mst_master_transcoder =
> intel_dp_mst_master_trans_compute(state, intel_dp);
> + return 0;
> +}
> +
> +/*
> + * Iterate over all connectors and return a mask of
> + * all CPU transcoders streaming over the same DP link.
> + */
> +static unsigned int
> +intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
> + struct intel_dp *mst_port)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_digital_connector_state *conn_state;
> + struct intel_connector *connector;
> + u8 transcoders = 0;
> + int i;
> +
> + if (INTEL_GEN(dev_priv) < 12)
> + return 0;
> +
> + for_each_new_intel_connector_in_state(state, connector,
> conn_state, i) {
> + const struct intel_crtc_state *crtc_state;
> + struct intel_crtc *crtc;
> +
> + if (connector->mst_port != mst_port || !conn_state-
> >base.crtc)
> + continue;
> +
> + crtc = to_intel_crtc(conn_state->base.crtc);
> + crtc_state = intel_atomic_get_new_crtc_state(state,
> crtc);
> +
> + if (!crtc_state->hw.active)
> + continue;
> +
> + transcoders |= BIT(crtc_state->cpu_transcoder);
> + }
> +
> + return transcoders;
> +}
> +
> +static int intel_dp_mst_compute_config_late(struct intel_encoder
> *encoder,
> + struct intel_crtc_state
> *crtc_state,
> + struct drm_connector_state
> *conn_state)
> +{
> + struct intel_atomic_state *state =
> to_intel_atomic_state(conn_state->state);
> + struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> + struct intel_dp *intel_dp = &intel_mst->primary->dp;
> +
> + /* lowest numbered transcoder will be designated master */
> + crtc_state->mst_master_transcoder =
> + ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
>
> return 0;
> }
> @@ -786,6 +789,7 @@ intel_dp_create_fake_mst_encoder(struct
> intel_digital_port *intel_dig_port, enum
> intel_encoder->pipe_mask = ~0;
>
> intel_encoder->compute_config = intel_dp_mst_compute_config;
> + intel_encoder->compute_config_late =
> intel_dp_mst_compute_config_late;
> intel_encoder->disable = intel_mst_disable_dp;
> intel_encoder->post_disable = intel_mst_post_disable_dp;
> intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder
2020-03-20 23:37 ` Souza, Jose
@ 2020-03-20 23:54 ` Souza, Jose
0 siblings, 0 replies; 41+ messages in thread
From: Souza, Jose @ 2020-03-20 23:54 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
Never mind, read the code again it will work.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
On Fri, 2020-03-20 at 23:37 +0000, Souza, Jose wrote:
> This will not work for MST, here a example
>
> Previous state:
> MST master pipe A
> MST slave pipe B
>
> New state:
> Pipe A being disabled
>
> On drm_atomic_helper_check_modeset() both intel_crtc_states will be
> added to the state with crtc_state->uapi.mode_changed=true.
> Then on the regular for_each_oldnew_intel_crtc_in_state() loop config
> of CRTC B will have mst_master_transcoder=INVALID_TRANSCODER that
> differs from TRANSCODER_A and will keep mode_changed set.
> Then on the config_late loop it will skip the interation on the
> needs_modeset() check keeping CRTC B with
> mst_master_transcoder=INVALID_TRANSCODER.
>
> That would be caugh by CI if this tests were merged and the TGL
> machine
> with MST is still on: https://patchwork.freedesktop.org/series/72211/
>
> On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Use the recently introduced encoder .compute_config_late() hook to
> > do the MST master transcoder assignment. Avoids having to do it
> > in a funny way before we know the CPU transcoder of each pipe.
> >
> > And now we can also properly use hw.active instead of uapi.active
> > since it too has been calculated earlier for everyone.
> >
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_dp_mst.c | 98 +++++++++++------
> > ----
> > 1 file changed, 51 insertions(+), 47 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 44f3fd251ca1..b9afc1135b9b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -88,56 +88,10 @@ static int
> > intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
> > return 0;
> > }
> >
> > -/*
> > - * Iterate over all connectors and return the smallest transcoder
> > in
> > the MST
> > - * stream
> > - */
> > -static enum transcoder
> > -intel_dp_mst_master_trans_compute(struct intel_atomic_state
> > *state,
> > - struct intel_dp *mst_port)
> > -{
> > - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > - struct intel_digital_connector_state *conn_state;
> > - struct intel_connector *connector;
> > - enum pipe ret = I915_MAX_PIPES;
> > - int i;
> > -
> > - if (INTEL_GEN(dev_priv) < 12)
> > - return INVALID_TRANSCODER;
> > -
> > - for_each_new_intel_connector_in_state(state, connector,
> > conn_state, i) {
> > - struct intel_crtc_state *crtc_state;
> > - struct intel_crtc *crtc;
> > -
> > - if (connector->mst_port != mst_port || !conn_state-
> > > base.crtc)
> > - continue;
> > -
> > - crtc = to_intel_crtc(conn_state->base.crtc);
> > - crtc_state = intel_atomic_get_new_crtc_state(state,
> > crtc);
> > - if (!crtc_state->uapi.active)
> > - continue;
> > -
> > - /*
> > - * Using crtc->pipe because crtc_state->cpu_transcoder
> > is
> > - * computed, so others CRTCs could have non-computed
> > - * cpu_transcoder
> > - */
> > - if (crtc->pipe < ret)
> > - ret = crtc->pipe;
> > - }
> > -
> > - if (ret == I915_MAX_PIPES)
> > - return INVALID_TRANSCODER;
> > -
> > - /* Simple cast works because TGL don't have a eDP transcoder */
> > - return (enum transcoder)ret;
> > -}
> > -
> > static int intel_dp_mst_compute_config(struct intel_encoder
> > *encoder,
> > struct intel_crtc_state
> > *pipe_config,
> > struct drm_connector_state
> > *conn_state)
> > {
> > - struct intel_atomic_state *state =
> > to_intel_atomic_state(conn_state->state);
> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> > struct intel_dp *intel_dp = &intel_mst->primary->dp;
> > @@ -201,7 +155,56 @@ static int intel_dp_mst_compute_config(struct
> > intel_encoder *encoder,
> >
> > intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
> >
> > - pipe_config->mst_master_transcoder =
> > intel_dp_mst_master_trans_compute(state, intel_dp);
> > + return 0;
> > +}
> > +
> > +/*
> > + * Iterate over all connectors and return a mask of
> > + * all CPU transcoders streaming over the same DP link.
> > + */
> > +static unsigned int
> > +intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
> > + struct intel_dp *mst_port)
> > +{
> > + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> > + const struct intel_digital_connector_state *conn_state;
> > + struct intel_connector *connector;
> > + u8 transcoders = 0;
> > + int i;
> > +
> > + if (INTEL_GEN(dev_priv) < 12)
> > + return 0;
> > +
> > + for_each_new_intel_connector_in_state(state, connector,
> > conn_state, i) {
> > + const struct intel_crtc_state *crtc_state;
> > + struct intel_crtc *crtc;
> > +
> > + if (connector->mst_port != mst_port || !conn_state-
> > > base.crtc)
> > + continue;
> > +
> > + crtc = to_intel_crtc(conn_state->base.crtc);
> > + crtc_state = intel_atomic_get_new_crtc_state(state,
> > crtc);
> > +
> > + if (!crtc_state->hw.active)
> > + continue;
> > +
> > + transcoders |= BIT(crtc_state->cpu_transcoder);
> > + }
> > +
> > + return transcoders;
> > +}
> > +
> > +static int intel_dp_mst_compute_config_late(struct intel_encoder
> > *encoder,
> > + struct intel_crtc_state
> > *crtc_state,
> > + struct drm_connector_state
> > *conn_state)
> > +{
> > + struct intel_atomic_state *state =
> > to_intel_atomic_state(conn_state->state);
> > + struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> > + struct intel_dp *intel_dp = &intel_mst->primary->dp;
> > +
> > + /* lowest numbered transcoder will be designated master */
> > + crtc_state->mst_master_transcoder =
> > + ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
> >
> > return 0;
> > }
> > @@ -786,6 +789,7 @@ intel_dp_create_fake_mst_encoder(struct
> > intel_digital_port *intel_dig_port, enum
> > intel_encoder->pipe_mask = ~0;
> >
> > intel_encoder->compute_config = intel_dp_mst_compute_config;
> > + intel_encoder->compute_config_late =
> > intel_dp_mst_compute_config_late;
> > intel_encoder->disable = intel_mst_disable_dp;
> > intel_encoder->post_disable = intel_mst_post_disable_dp;
> > intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump
2020-03-18 23:00 ` Manasi Navare
@ 2020-03-27 17:15 ` Ville Syrjälä
0 siblings, 0 replies; 41+ messages in thread
From: Ville Syrjälä @ 2020-03-27 17:15 UTC (permalink / raw)
To: Manasi Navare; +Cc: intel-gfx
On Wed, Mar 18, 2020 at 04:00:36PM -0700, Manasi Navare wrote:
> On Fri, Mar 13, 2020 at 06:48:24PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Dump the port sync stat in intel_dump_pipe_config().
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Reviewed-by: Manasi Navare <manasi.d.anavre@intel.com>
Pushed up to here. Thanks for the reviews so far.
>
> Manasi
>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 5 +++++
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 5c5a131db8b4..4840988dc58d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -12947,6 +12947,11 @@ static void intel_dump_pipe_config(const struct intel_crtc_state *pipe_config,
> > transcoder_name(pipe_config->cpu_transcoder),
> > pipe_config->pipe_bpp, pipe_config->dither);
> >
> > + drm_dbg_kms(&dev_priv->drm,
> > + "port sync: master transcoder: %s, slave transcoder bitmask = 0x%x\n",
> > + transcoder_name(pipe_config->master_transcoder),
> > + pipe_config->sync_mode_slaves_mask);
> > +
> > if (pipe_config->has_pch_encoder)
> > intel_dump_m_n_config(pipe_config, "fdi",
> > pipe_config->fdi_lanes,
> > --
> > 2.24.1
> >
--
Ville Syrjälä
Intel
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH v2 07/13] drm/i915: Store cpu_transcoder_mask in device info
2020-03-18 17:02 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
@ 2020-04-02 0:59 ` Souza, Jose
0 siblings, 0 replies; 41+ messages in thread
From: Souza, Jose @ 2020-04-02 0:59 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Wed, 2020-03-18 at 19:02 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We have a bunch of code that would like to know which
> CPU transcoders are actually present in the hardware. Rather than
> use various ad-hoc methods let's just include a full bitmask in
> the device info, alongside pipe_mask.
>
> v2: Rebase
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++--
> drivers/gpu/drm/i915/display/intel_display.c | 13 ++-------
> drivers/gpu/drm/i915/display/intel_display.h | 8 ++++--
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/i915_pci.c | 23 +++++++++++++++-
> drivers/gpu/drm/i915/intel_device_info.c | 29 ++++++++++++----
> ----
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> 7 files changed, 53 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 8bb6c583abb8..0fea2ec2cdd8 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1689,7 +1689,7 @@ bool intel_ddi_connector_get_hw_state(struct
> intel_connector *intel_connector)
> goto out;
> }
>
> - if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
> + if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
> cpu_transcoder = TRANSCODER_EDP;
> else
> cpu_transcoder = (enum transcoder) pipe;
> @@ -1751,7 +1751,7 @@ static void intel_ddi_get_encoder_pipes(struct
> intel_encoder *encoder,
> if (!(tmp & DDI_BUF_CTL_ENABLE))
> goto out;
>
> - if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A) {
> + if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
> {
> tmp = intel_de_read(dev_priv,
> TRANS_DDI_FUNC_CTL(TRANSCODER_EDP))
> ;
>
> @@ -4076,7 +4076,7 @@ static int intel_ddi_compute_config(struct
> intel_encoder *encoder,
> enum port port = encoder->port;
> int ret;
>
> - if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
> + if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP) && port == PORT_A)
> pipe_config->cpu_transcoder = TRANSCODER_EDP;
>
> if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI)) {
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 4840988dc58d..292cac64f1ac 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10855,7 +10855,7 @@ static bool hsw_get_transcoder_state(struct
> intel_crtc *crtc,
> panel_transcoder_mask |=
> BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
>
> - if (HAS_TRANSCODER_EDP(dev_priv))
> + if (HAS_TRANSCODER(dev_priv, TRANSCODER_EDP))
> panel_transcoder_mask |= BIT(TRANSCODER_EDP);
>
> /*
> @@ -18712,15 +18712,6 @@ void
> intel_modeset_driver_remove_noirq(struct drm_i915_private *i915)
>
> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
>
> -static bool
> -has_transcoder(struct drm_i915_private *dev_priv, enum transcoder
> cpu_transcoder)
> -{
> - if (cpu_transcoder == TRANSCODER_EDP)
> - return HAS_TRANSCODER_EDP(dev_priv);
> - else
> - return INTEL_INFO(dev_priv)->pipe_mask &
> BIT(cpu_transcoder);
> -}
> -
> struct intel_display_error_state {
>
> u32 power_well_driver;
> @@ -18829,7 +18820,7 @@ intel_display_capture_error_state(struct
> drm_i915_private *dev_priv)
> for (i = 0; i < ARRAY_SIZE(error->transcoder); i++) {
> enum transcoder cpu_transcoder = transcoders[i];
>
> - if (!has_transcoder(dev_priv, cpu_transcoder))
> + if (!HAS_TRANSCODER(dev_priv, cpu_transcoder))
> continue;
>
> error->transcoder[i].available = true;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index adb1225a3480..cc7f287804d7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -320,9 +320,13 @@ enum phy_fia {
> for_each_pipe(__dev_priv, __p) \
> for_each_if((__mask) & BIT(__p))
>
> -#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
> +#define for_each_cpu_transcoder(__dev_priv, __t) \
> for ((__t) = 0; (__t) < I915_MAX_TRANSCODERS; (__t)++) \
> - for_each_if ((__mask) & (1 << (__t)))
> + for_each_if (INTEL_INFO(__dev_priv)-
> >cpu_transcoder_mask & BIT(__t))
> +
> +#define for_each_cpu_transcoder_masked(__dev_priv, __t, __mask) \
> + for_each_cpu_transcoder(__dev_priv, __t) \
> + for_each_if ((__mask) & BIT(__t))
>
> #define for_each_universal_plane(__dev_priv, __pipe, __p)
> \
> for ((__p) = 0;
> \
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index a7ea1d855359..ea9170fd169b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1602,7 +1602,7 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915,
> #define HAS_DDI(dev_priv) (INTEL_INFO(dev_priv)-
> >display.has_ddi)
> #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)-
> >has_fpga_dbg)
> #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)-
> >display.has_psr)
> -#define HAS_TRANSCODER_EDP(dev_priv) (INTEL_INFO(dev_priv)-
> >trans_offsets[TRANSCODER_EDP] != 0)
> +#define HAS_TRANSCODER(dev_priv, trans) ((INTEL_INFO(dev_priv)
> ->cpu_transcoder_mask & BIT(trans)) != 0)
>
> #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)-
> >has_rc6)
> #define HAS_RC6p(dev_priv) (INTEL_INFO(dev_priv)-
> >has_rc6p)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c
> b/drivers/gpu/drm/i915/i915_pci.c
> index 2c80a0194c80..66738f2c4f28 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -160,6 +160,7 @@
> GEN(2), \
> .is_mobile = 1, \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
> .display.has_overlay = 1, \
> .display.cursor_needs_physical = 1, \
> .display.overlay_needs_physical = 1, \
> @@ -179,6 +180,7 @@
> #define I845_FEATURES \
> GEN(2), \
> .pipe_mask = BIT(PIPE_A), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A), \
> .display.has_overlay = 1, \
> .display.overlay_needs_physical = 1, \
> .display.has_gmch = 1, \
> @@ -218,6 +220,7 @@ static const struct intel_device_info i865g_info
> = {
> #define GEN3_FEATURES \
> GEN(3), \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
> .display.has_gmch = 1, \
> .gpu_reset_clobbers_display = true, \
> .engine_mask = BIT(RCS0), \
> @@ -303,6 +306,7 @@ static const struct intel_device_info pnv_m_info
> = {
> #define GEN4_FEATURES \
> GEN(4), \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
> .display.has_hotplug = 1, \
> .display.has_gmch = 1, \
> .gpu_reset_clobbers_display = true, \
> @@ -354,6 +358,7 @@ static const struct intel_device_info gm45_info =
> {
> #define GEN5_FEATURES \
> GEN(5), \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
> .display.has_hotplug = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0), \
> .has_snoop = true, \
> @@ -381,6 +386,7 @@ static const struct intel_device_info ilk_m_info
> = {
> #define GEN6_FEATURES \
> GEN(6), \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B), \
> .display.has_hotplug = 1, \
> .display.has_fbc = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> @@ -430,6 +436,7 @@ static const struct intel_device_info
> snb_m_gt2_info = {
> #define GEN7_FEATURES \
> GEN(7), \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> BIT(TRANSCODER_C), \
> .display.has_hotplug = 1, \
> .display.has_fbc = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
> @@ -482,6 +489,7 @@ static const struct intel_device_info ivb_q_info
> = {
> PLATFORM(INTEL_IVYBRIDGE),
> .gt = 2,
> .pipe_mask = 0, /* legal, last one wins */
> + .cpu_transcoder_mask = 0,
> .has_l3_dpf = 1,
> };
>
> @@ -490,6 +498,7 @@ static const struct intel_device_info vlv_info =
> {
> GEN(7),
> .is_lp = 1,
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
> .has_runtime_pm = 1,
> .has_rc6 = 1,
> .has_rps = true,
> @@ -511,6 +520,8 @@ static const struct intel_device_info vlv_info =
> {
> #define G75_FEATURES \
> GEN7_FEATURES, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
> \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> \
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
> .display.has_ddi = 1, \
> .has_fpga_dbg = 1, \
> .display.has_psr = 1, \
> @@ -581,6 +592,7 @@ static const struct intel_device_info chv_info =
> {
> PLATFORM(INTEL_CHERRYVIEW),
> GEN(8),
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C),
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> BIT(TRANSCODER_C),
> .display.has_hotplug = 1,
> .is_lp = 1,
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
> @@ -656,6 +668,9 @@ static const struct intel_device_info
> skl_gt4_info = {
> .display.has_hotplug = 1, \
> .engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
> \
> .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> \
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> + BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
> .has_64bit_reloc = 1, \
> .display.has_ddi = 1, \
> .has_fpga_dbg = 1, \
> @@ -759,6 +774,9 @@ static const struct intel_device_info cnl_info =
> {
> #define GEN11_FEATURES \
> GEN10_FEATURES, \
> GEN11_DEFAULT_PAGE_SIZES, \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> \
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
> + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
Some CNL SKUs don't have DSI transcoders but not worthy fix it.
Looks good
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> .pipe_offsets = { \
> [TRANSCODER_A] = PIPE_A_OFFSET, \
> [TRANSCODER_B] = PIPE_B_OFFSET, \
> @@ -799,6 +817,10 @@ static const struct intel_device_info ehl_info =
> {
> #define GEN12_FEATURES \
> GEN11_FEATURES, \
> GEN(12), \
> + .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) |
> BIT(PIPE_D), \
> + .cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> \
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_D) | \
> + BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1), \
> .pipe_offsets = { \
> [TRANSCODER_A] = PIPE_A_OFFSET, \
> [TRANSCODER_B] = PIPE_B_OFFSET, \
> @@ -822,7 +844,6 @@ static const struct intel_device_info ehl_info =
> {
> static const struct intel_device_info tgl_info = {
> GEN12_FEATURES,
> PLATFORM(INTEL_TIGERLAKE),
> - .pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) |
> BIT(PIPE_D),
> .display.has_modular_fia = 1,
> .engine_mask =
> BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) |
> BIT(VCS2),
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index 9ff89e142ff1..db8496b4c38d 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -980,25 +980,32 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
> drm_info(&dev_priv->drm,
> "Display fused off, disabling\n");
> info->pipe_mask = 0;
> + info->cpu_transcoder_mask = 0;
> } else if (fuse_strap & IVB_PIPE_C_DISABLE) {
> drm_info(&dev_priv->drm, "PipeC fused off\n");
> info->pipe_mask &= ~BIT(PIPE_C);
> + info->cpu_transcoder_mask &=
> ~BIT(TRANSCODER_C);
> }
> } else if (HAS_DISPLAY(dev_priv) && INTEL_GEN(dev_priv) >= 9) {
> u32 dfsm = I915_READ(SKL_DFSM);
> - u8 enabled_mask = info->pipe_mask;
>
> - if (dfsm & SKL_DFSM_PIPE_A_DISABLE)
> - enabled_mask &= ~BIT(PIPE_A);
> - if (dfsm & SKL_DFSM_PIPE_B_DISABLE)
> - enabled_mask &= ~BIT(PIPE_B);
> - if (dfsm & SKL_DFSM_PIPE_C_DISABLE)
> - enabled_mask &= ~BIT(PIPE_C);
> + if (dfsm & SKL_DFSM_PIPE_A_DISABLE) {
> + info->pipe_mask &= ~BIT(PIPE_A);
> + info->cpu_transcoder_mask &=
> ~BIT(TRANSCODER_A);
> + }
> + if (dfsm & SKL_DFSM_PIPE_B_DISABLE) {
> + info->pipe_mask &= ~BIT(PIPE_B);
> + info->cpu_transcoder_mask &=
> ~BIT(TRANSCODER_B);
> + }
> + if (dfsm & SKL_DFSM_PIPE_C_DISABLE) {
> + info->pipe_mask &= ~BIT(PIPE_C);
> + info->cpu_transcoder_mask &=
> ~BIT(TRANSCODER_C);
> + }
> if (INTEL_GEN(dev_priv) >= 12 &&
> - (dfsm & TGL_DFSM_PIPE_D_DISABLE))
> - enabled_mask &= ~BIT(PIPE_D);
> -
> - info->pipe_mask = enabled_mask;
> + (dfsm & TGL_DFSM_PIPE_D_DISABLE)) {
> + info->pipe_mask &= ~BIT(PIPE_D);
> + info->cpu_transcoder_mask &=
> ~BIT(TRANSCODER_D);
> + }
>
> if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
> info->display.has_hdcp = 0;
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h
> b/drivers/gpu/drm/i915/intel_device_info.h
> index 1ecb9df2de91..cce6a72c5ebc 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -168,6 +168,7 @@ struct intel_device_info {
> u32 display_mmio_offset;
>
> u8 pipe_mask;
> + u8 cpu_transcoder_mask;
>
> #define DEFINE_FLAG(name) u8 name:1
> DEV_INFO_FOR_EACH_FLAG(DEFINE_FLAG);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
@ 2020-04-02 1:18 ` Souza, Jose
0 siblings, 0 replies; 41+ messages in thread
From: Souza, Jose @ 2020-04-02 1:18 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We're going to want access to the atomic state for iterating
> the slave crtcs when enabling the port sync master crtc. Pass
> the atomic state all the way down.
>
> The alternative would be yet another encoder hook which we'll
> have to call after all the normal modeset stuff is done. Not
> really a fan of yet another hook just for this.
>
> Note that during readout state sanitation we are now going
> to pass NULL as the atomic state since we don't have one.
> We need to change that and then we can also s/crtc_state/crtc/
> and s/conn_state/conn/ for the encoder hooks as well.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 15 ++--
> drivers/gpu/drm/i915/display/intel_crt.c | 33 ++++---
> drivers/gpu/drm/i915/display/intel_ddi.c | 89 ++++++++++++-----
> --
> drivers/gpu/drm/i915/display/intel_ddi.h | 3 +-
> drivers/gpu/drm/i915/display/intel_display.c | 26 ++++--
> .../drm/i915/display/intel_display_types.h | 21 +++--
> drivers/gpu/drm/i915/display/intel_dp.c | 55 +++++++-----
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 21 +++--
> drivers/gpu/drm/i915/display/intel_dvo.c | 9 +-
> drivers/gpu/drm/i915/display/intel_hdcp.c | 3 +-
> drivers/gpu/drm/i915/display/intel_hdcp.h | 4 +-
> drivers/gpu/drm/i915/display/intel_hdmi.c | 59 +++++++-----
> drivers/gpu/drm/i915/display/intel_lvds.c | 22 +++--
> drivers/gpu/drm/i915/display/intel_panel.c | 3 +-
> drivers/gpu/drm/i915/display/intel_panel.h | 3 +-
> drivers/gpu/drm/i915/display/intel_sdvo.c | 17 ++--
> drivers/gpu/drm/i915/display/intel_tv.c | 9 +-
> drivers/gpu/drm/i915/display/vlv_dsi.c | 12 ++-
> 18 files changed, 260 insertions(+), 144 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 17cee6f80d8b..ea9907c3e5ba 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1088,7 +1088,8 @@ static void gen11_dsi_powerup_panel(struct
> intel_encoder *encoder)
> wait_for_cmds_dispatched_to_panel(encoder);
> }
>
> -static void gen11_dsi_pre_pll_enable(struct intel_encoder *encoder,
> +static void gen11_dsi_pre_pll_enable(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1099,7 +1100,8 @@ static void gen11_dsi_pre_pll_enable(struct
> intel_encoder *encoder,
> gen11_dsi_program_esc_clk_div(encoder, crtc_state);
> }
>
> -static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
> +static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1118,7 +1120,8 @@ static void gen11_dsi_pre_enable(struct
> intel_encoder *encoder,
> gen11_dsi_set_transcoder_timings(encoder, pipe_config);
> }
>
> -static void gen11_dsi_enable(struct intel_encoder *encoder,
> +static void gen11_dsi_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1264,7 +1267,8 @@ static void gen11_dsi_disable_io_power(struct
> intel_encoder *encoder)
> }
> }
>
> -static void gen11_dsi_disable(struct intel_encoder *encoder,
> +static void gen11_dsi_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -1290,7 +1294,8 @@ static void gen11_dsi_disable(struct
> intel_encoder *encoder,
> gen11_dsi_disable_io_power(encoder);
> }
>
> -static void gen11_dsi_post_disable(struct intel_encoder *encoder,
> +static void gen11_dsi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index 78f9b6cde810..80c91404046f 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -203,27 +203,31 @@ static void intel_crt_set_dpms(struct
> intel_encoder *encoder,
> intel_de_write(dev_priv, crt->adpa_reg, adpa);
> }
>
> -static void intel_disable_crt(struct intel_encoder *encoder,
> +static void intel_disable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> intel_crt_set_dpms(encoder, old_crtc_state, DRM_MODE_DPMS_OFF);
> }
>
> -static void pch_disable_crt(struct intel_encoder *encoder,
> +static void pch_disable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> }
>
> -static void pch_post_disable_crt(struct intel_encoder *encoder,
> +static void pch_post_disable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> - intel_disable_crt(encoder, old_crtc_state, old_conn_state);
> + intel_disable_crt(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> -static void hsw_disable_crt(struct intel_encoder *encoder,
> +static void hsw_disable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -234,7 +238,8 @@ static void hsw_disable_crt(struct intel_encoder
> *encoder,
> intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> }
>
> -static void hsw_post_disable_crt(struct intel_encoder *encoder,
> +static void hsw_post_disable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -250,19 +255,20 @@ static void hsw_post_disable_crt(struct
> intel_encoder *encoder,
>
> intel_ddi_disable_pipe_clock(old_crtc_state);
>
> - pch_post_disable_crt(encoder, old_crtc_state, old_conn_state);
> + pch_post_disable_crt(state, encoder, old_crtc_state,
> old_conn_state);
>
> lpt_disable_pch_transcoder(dev_priv);
> lpt_disable_iclkip(dev_priv);
>
> - intel_ddi_fdi_post_disable(encoder, old_crtc_state,
> old_conn_state);
> + intel_ddi_fdi_post_disable(state, encoder, old_crtc_state,
> old_conn_state);
>
> drm_WARN_ON(&dev_priv->drm, !old_crtc_state->has_pch_encoder);
>
> intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> }
>
> -static void hsw_pre_pll_enable_crt(struct intel_encoder *encoder,
> +static void hsw_pre_pll_enable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -273,7 +279,8 @@ static void hsw_pre_pll_enable_crt(struct
> intel_encoder *encoder,
> intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
> }
>
> -static void hsw_pre_enable_crt(struct intel_encoder *encoder,
> +static void hsw_pre_enable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -290,7 +297,8 @@ static void hsw_pre_enable_crt(struct
> intel_encoder *encoder,
> intel_ddi_enable_pipe_clock(crtc_state);
> }
>
> -static void hsw_enable_crt(struct intel_encoder *encoder,
> +static void hsw_enable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -314,7 +322,8 @@ static void hsw_enable_crt(struct intel_encoder
> *encoder,
> intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
> }
>
> -static void intel_enable_crt(struct intel_encoder *encoder,
> +static void intel_enable_crt(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9e6eb0ee5ba4..98475c81f1da 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3017,7 +3017,8 @@ static void intel_ddi_disable_fec_state(struct
> intel_encoder *encoder,
> intel_de_posting_read(dev_priv, intel_dp->regs.dp_tp_ctl);
> }
>
> -static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
> +static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3157,7 +3158,8 @@ static void tgl_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
> intel_dsc_enable(encoder, crtc_state);
> }
>
> -static void hsw_ddi_pre_enable_dp(struct intel_encoder *encoder,
> +static void hsw_ddi_pre_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3230,16 +3232,17 @@ static void hsw_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
> intel_dsc_enable(encoder, crtc_state);
> }
>
> -static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
> +static void intel_ddi_pre_enable_dp(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>
> if (INTEL_GEN(dev_priv) >= 12)
> - tgl_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
> + tgl_ddi_pre_enable_dp(state, encoder, crtc_state,
> conn_state);
> else
> - hsw_ddi_pre_enable_dp(encoder, crtc_state, conn_state);
> + hsw_ddi_pre_enable_dp(state, encoder, crtc_state,
> conn_state);
>
> /* MST will call a setting of MSA after an allocating of
> Virtual Channel
> * from MST encoder pre_enable callback.
> @@ -3251,7 +3254,8 @@ static void intel_ddi_pre_enable_dp(struct
> intel_encoder *encoder,
> }
> }
>
> -static void intel_ddi_pre_enable_hdmi(struct intel_encoder *encoder,
> +static void intel_ddi_pre_enable_hdmi(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3291,7 +3295,8 @@ static void intel_ddi_pre_enable_hdmi(struct
> intel_encoder *encoder,
> crtc_state, conn_state);
> }
>
> -static void intel_ddi_pre_enable(struct intel_encoder *encoder,
> +static void intel_ddi_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3320,12 +3325,14 @@ static void intel_ddi_pre_enable(struct
> intel_encoder *encoder,
> intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true);
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) {
> - intel_ddi_pre_enable_hdmi(encoder, crtc_state,
> conn_state);
> + intel_ddi_pre_enable_hdmi(state, encoder, crtc_state,
> + conn_state);
> } else {
> struct intel_lspcon *lspcon =
> enc_to_intel_lspcon(encoder);
>
> - intel_ddi_pre_enable_dp(encoder, crtc_state,
> conn_state);
> + intel_ddi_pre_enable_dp(state, encoder, crtc_state,
> + conn_state);
> if (lspcon->active) {
> struct intel_digital_port *dig_port =
> enc_to_dig_port(encoder);
> @@ -3368,7 +3375,8 @@ static void intel_disable_ddi_buf(struct
> intel_encoder *encoder,
> intel_wait_ddi_buf_idle(dev_priv, port);
> }
>
> -static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
> +static void intel_ddi_post_disable_dp(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3424,7 +3432,8 @@ static void intel_ddi_post_disable_dp(struct
> intel_encoder *encoder,
> intel_ddi_clk_disable(encoder);
> }
>
> -static void intel_ddi_post_disable_hdmi(struct intel_encoder
> *encoder,
> +static void intel_ddi_post_disable_hdmi(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct
> drm_connector_state *old_conn_state)
> {
> @@ -3447,7 +3456,8 @@ static void intel_ddi_post_disable_hdmi(struct
> intel_encoder *encoder,
> intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> }
>
> -static void intel_ddi_post_disable(struct intel_encoder *encoder,
> +static void intel_ddi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3485,11 +3495,11 @@ static void intel_ddi_post_disable(struct
> intel_encoder *encoder,
> */
>
> if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> - intel_ddi_post_disable_hdmi(encoder,
> - old_crtc_state,
> old_conn_state);
> + intel_ddi_post_disable_hdmi(state, encoder,
> old_crtc_state,
> + old_conn_state);
> else
> - intel_ddi_post_disable_dp(encoder,
> - old_crtc_state,
> old_conn_state);
> + intel_ddi_post_disable_dp(state, encoder,
> old_crtc_state,
> + old_conn_state);
>
> if (INTEL_GEN(dev_priv) >= 11)
> icl_unmap_plls_to_ports(encoder);
> @@ -3502,7 +3512,8 @@ static void intel_ddi_post_disable(struct
> intel_encoder *encoder,
> intel_tc_port_put_link(dig_port);
> }
>
> -void intel_ddi_fdi_post_disable(struct intel_encoder *encoder,
> +void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3536,7 +3547,8 @@ void intel_ddi_fdi_post_disable(struct
> intel_encoder *encoder,
> intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val);
> }
>
> -static void intel_enable_ddi_dp(struct intel_encoder *encoder,
> +static void intel_enable_ddi_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3577,7 +3589,8 @@ gen9_chicken_trans_reg_by_port(struct
> drm_i915_private *dev_priv,
> return CHICKEN_TRANS(trans[port]);
> }
>
> -static void intel_enable_ddi_hdmi(struct intel_encoder *encoder,
> +static void intel_enable_ddi_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3639,7 +3652,8 @@ static void intel_enable_ddi_hdmi(struct
> intel_encoder *encoder,
> intel_audio_codec_enable(encoder, crtc_state,
> conn_state);
> }
>
> -static void intel_enable_ddi(struct intel_encoder *encoder,
> +static void intel_enable_ddi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3650,9 +3664,9 @@ static void intel_enable_ddi(struct
> intel_encoder *encoder,
> intel_crtc_vblank_on(crtc_state);
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> - intel_enable_ddi_hdmi(encoder, crtc_state, conn_state);
> + intel_enable_ddi_hdmi(state, encoder, crtc_state,
> conn_state);
> else
> - intel_enable_ddi_dp(encoder, crtc_state, conn_state);
> + intel_enable_ddi_dp(state, encoder, crtc_state,
> conn_state);
>
> /* Enable hdcp if it's desired */
> if (conn_state->content_protection ==
> @@ -3662,7 +3676,8 @@ static void intel_enable_ddi(struct
> intel_encoder *encoder,
> (u8)conn_state->hdcp_content_type);
> }
>
> -static void intel_disable_ddi_dp(struct intel_encoder *encoder,
> +static void intel_disable_ddi_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3682,7 +3697,8 @@ static void intel_disable_ddi_dp(struct
> intel_encoder *encoder,
> false);
> }
>
> -static void intel_disable_ddi_hdmi(struct intel_encoder *encoder,
> +static void intel_disable_ddi_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3698,19 +3714,23 @@ static void intel_disable_ddi_hdmi(struct
> intel_encoder *encoder,
> connector->base.id, connector->name);
> }
>
> -static void intel_disable_ddi(struct intel_encoder *encoder,
> +static void intel_disable_ddi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> intel_hdcp_disable(to_intel_connector(old_conn_state-
> >connector));
>
> if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
> - intel_disable_ddi_hdmi(encoder, old_crtc_state,
> old_conn_state);
> + intel_disable_ddi_hdmi(state, encoder, old_crtc_state,
> + old_conn_state);
> else
> - intel_disable_ddi_dp(encoder, old_crtc_state,
> old_conn_state);
> + intel_disable_ddi_dp(state, encoder, old_crtc_state,
> + old_conn_state);
> }
>
> -static void intel_ddi_update_pipe_dp(struct intel_encoder *encoder,
> +static void intel_ddi_update_pipe_dp(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3721,18 +3741,20 @@ static void intel_ddi_update_pipe_dp(struct
> intel_encoder *encoder,
> intel_psr_update(intel_dp, crtc_state);
> intel_edp_drrs_enable(intel_dp, crtc_state);
>
> - intel_panel_update_backlight(encoder, crtc_state, conn_state);
> + intel_panel_update_backlight(state, encoder, crtc_state,
> conn_state);
> }
>
> -static void intel_ddi_update_pipe(struct intel_encoder *encoder,
> +static void intel_ddi_update_pipe(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
>
> if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> - intel_ddi_update_pipe_dp(encoder, crtc_state,
> conn_state);
> + intel_ddi_update_pipe_dp(state, encoder, crtc_state,
> + conn_state);
>
> - intel_hdcp_update_pipe(encoder, crtc_state, conn_state);
> + intel_hdcp_update_pipe(state, encoder, crtc_state, conn_state);
> }
>
> static void
> @@ -3761,7 +3783,8 @@ intel_ddi_update_complete(struct
> intel_atomic_state *state,
> }
>
> static void
> -intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
> +intel_ddi_pre_pll_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> b/drivers/gpu/drm/i915/display/intel_ddi.h
> index 55fd72b901fe..de4cd877c002 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -17,7 +17,8 @@ struct intel_dp;
> struct intel_dpll_hw_state;
> struct intel_encoder;
>
> -void intel_ddi_fdi_post_disable(struct intel_encoder *intel_encoder,
> +void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *intel_encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state);
> void hsw_fdi_link_train(struct intel_encoder *encoder,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 3926ac8f1f10..84e59f6ab8e4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -6689,7 +6689,8 @@ static void
> intel_encoders_pre_pll_enable(struct intel_atomic_state *state,
> continue;
>
> if (encoder->pre_pll_enable)
> - encoder->pre_pll_enable(encoder, crtc_state,
> conn_state);
> + encoder->pre_pll_enable(state, encoder,
> + crtc_state,
> conn_state);
> }
> }
>
> @@ -6710,7 +6711,8 @@ static void intel_encoders_pre_enable(struct
> intel_atomic_state *state,
> continue;
>
> if (encoder->pre_enable)
> - encoder->pre_enable(encoder, crtc_state,
> conn_state);
> + encoder->pre_enable(state, encoder,
> + crtc_state, conn_state);
> }
> }
>
> @@ -6731,7 +6733,8 @@ static void intel_encoders_enable(struct
> intel_atomic_state *state,
> continue;
>
> if (encoder->enable)
> - encoder->enable(encoder, crtc_state,
> conn_state);
> + encoder->enable(state, encoder,
> + crtc_state, conn_state);
> intel_opregion_notify_encoder(encoder, true);
> }
> }
> @@ -6754,7 +6757,8 @@ static void intel_encoders_disable(struct
> intel_atomic_state *state,
>
> intel_opregion_notify_encoder(encoder, false);
> if (encoder->disable)
> - encoder->disable(encoder, old_crtc_state,
> old_conn_state);
> + encoder->disable(state, encoder,
> + old_crtc_state,
> old_conn_state);
> }
> }
>
> @@ -6775,7 +6779,8 @@ static void intel_encoders_post_disable(struct
> intel_atomic_state *state,
> continue;
>
> if (encoder->post_disable)
> - encoder->post_disable(encoder, old_crtc_state,
> old_conn_state);
> + encoder->post_disable(state, encoder,
> + old_crtc_state,
> old_conn_state);
> }
> }
>
> @@ -6796,7 +6801,8 @@ static void
> intel_encoders_post_pll_disable(struct intel_atomic_state *state,
> continue;
>
> if (encoder->post_pll_disable)
> - encoder->post_pll_disable(encoder,
> old_crtc_state, old_conn_state);
> + encoder->post_pll_disable(state, encoder,
> + old_crtc_state,
> old_conn_state);
> }
> }
>
> @@ -6817,7 +6823,8 @@ static void intel_encoders_update_pipe(struct
> intel_atomic_state *state,
> continue;
>
> if (encoder->update_pipe)
> - encoder->update_pipe(encoder, crtc_state,
> conn_state);
> + encoder->update_pipe(state, encoder,
> + crtc_state, conn_state);
> }
> }
>
> @@ -18133,11 +18140,12 @@ static void intel_sanitize_encoder(struct
> intel_encoder *encoder)
> best_encoder = connector->base.state-
> >best_encoder;
> connector->base.state->best_encoder = &encoder-
> >base;
>
> + /* FIXME NULL atomic state passed! */
> if (encoder->disable)
> - encoder->disable(encoder, crtc_state,
> + encoder->disable(NULL, encoder,
> crtc_state,
> connector-
> >base.state);
> if (encoder->post_disable)
> - encoder->post_disable(encoder,
> crtc_state,
> + encoder->post_disable(NULL, encoder,
> crtc_state,
> connector-
> >base.state);
>
> connector->base.state->best_encoder =
> best_encoder;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 5e00e611f077..ad39386231d5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -146,28 +146,35 @@ struct intel_encoder {
> void (*update_prepare)(struct intel_atomic_state *,
> struct intel_encoder *,
> struct intel_crtc *);
> - void (*pre_pll_enable)(struct intel_encoder *,
> + void (*pre_pll_enable)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> - void (*pre_enable)(struct intel_encoder *,
> + void (*pre_enable)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> - void (*enable)(struct intel_encoder *,
> + void (*enable)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> void (*update_complete)(struct intel_atomic_state *,
> struct intel_encoder *,
> struct intel_crtc *);
> - void (*disable)(struct intel_encoder *,
> + void (*disable)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> - void (*post_disable)(struct intel_encoder *,
> + void (*post_disable)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> - void (*post_pll_disable)(struct intel_encoder *,
> + void (*post_pll_disable)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> - void (*update_pipe)(struct intel_encoder *,
> + void (*update_pipe)(struct intel_atomic_state *,
> + struct intel_encoder *,
> const struct intel_crtc_state *,
> const struct drm_connector_state *);
> /* Read out the current hw state of this connector, returning
> true if
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 89d54f5fe60b..d4c17a5e9be2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3393,7 +3393,8 @@ static void intel_dp_get_config(struct
> intel_encoder *encoder,
> }
> }
>
> -static void intel_disable_dp(struct intel_encoder *encoder,
> +static void intel_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3413,21 +3414,24 @@ static void intel_disable_dp(struct
> intel_encoder *encoder,
> intel_edp_panel_off(intel_dp);
> }
>
> -static void g4x_disable_dp(struct intel_encoder *encoder,
> +static void g4x_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> - intel_disable_dp(encoder, old_crtc_state, old_conn_state);
> + intel_disable_dp(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> -static void vlv_disable_dp(struct intel_encoder *encoder,
> +static void vlv_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> - intel_disable_dp(encoder, old_crtc_state, old_conn_state);
> + intel_disable_dp(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> -static void g4x_post_disable_dp(struct intel_encoder *encoder,
> +static void g4x_post_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3447,14 +3451,16 @@ static void g4x_post_disable_dp(struct
> intel_encoder *encoder,
> ilk_edp_pll_off(intel_dp, old_crtc_state);
> }
>
> -static void vlv_post_disable_dp(struct intel_encoder *encoder,
> +static void vlv_post_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> intel_dp_link_down(encoder, old_crtc_state);
> }
>
> -static void chv_post_disable_dp(struct intel_encoder *encoder,
> +static void chv_post_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -3580,7 +3586,8 @@ static void intel_dp_enable_port(struct
> intel_dp *intel_dp,
> intel_de_posting_read(dev_priv, intel_dp->output_reg);
> }
>
> -static void intel_enable_dp(struct intel_encoder *encoder,
> +static void intel_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3626,22 +3633,25 @@ static void intel_enable_dp(struct
> intel_encoder *encoder,
> }
> }
>
> -static void g4x_enable_dp(struct intel_encoder *encoder,
> +static void g4x_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> - intel_enable_dp(encoder, pipe_config, conn_state);
> + intel_enable_dp(state, encoder, pipe_config, conn_state);
> intel_edp_backlight_on(pipe_config, conn_state);
> }
>
> -static void vlv_enable_dp(struct intel_encoder *encoder,
> +static void vlv_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> intel_edp_backlight_on(pipe_config, conn_state);
> }
>
> -static void g4x_pre_enable_dp(struct intel_encoder *encoder,
> +static void g4x_pre_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3761,16 +3771,18 @@ static void
> vlv_init_panel_power_sequencer(struct intel_encoder *encoder,
> intel_dp_init_panel_power_sequencer_registers(intel_dp, true);
> }
>
> -static void vlv_pre_enable_dp(struct intel_encoder *encoder,
> +static void vlv_pre_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> vlv_phy_pre_encoder_enable(encoder, pipe_config);
>
> - intel_enable_dp(encoder, pipe_config, conn_state);
> + intel_enable_dp(state, encoder, pipe_config, conn_state);
> }
>
> -static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder,
> +static void vlv_dp_pre_pll_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3779,19 +3791,21 @@ static void vlv_dp_pre_pll_enable(struct
> intel_encoder *encoder,
> vlv_phy_pre_pll_enable(encoder, pipe_config);
> }
>
> -static void chv_pre_enable_dp(struct intel_encoder *encoder,
> +static void chv_pre_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> chv_phy_pre_encoder_enable(encoder, pipe_config);
>
> - intel_enable_dp(encoder, pipe_config, conn_state);
> + intel_enable_dp(state, encoder, pipe_config, conn_state);
>
> /* Second common lane will stay alive on its own now */
> chv_phy_release_cl2_override(encoder);
> }
>
> -static void chv_dp_pre_pll_enable(struct intel_encoder *encoder,
> +static void chv_dp_pre_pll_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -3800,7 +3814,8 @@ static void chv_dp_pre_pll_enable(struct
> intel_encoder *encoder,
> chv_phy_pre_pll_enable(encoder, pipe_config);
> }
>
> -static void chv_dp_post_pll_disable(struct intel_encoder *encoder,
> +static void chv_dp_post_pll_disable(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index b9afc1135b9b..5f54cc2d6b40 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -316,7 +316,8 @@ intel_dp_mst_atomic_check(struct drm_connector
> *connector,
> return ret;
> }
>
> -static void intel_mst_disable_dp(struct intel_encoder *encoder,
> +static void intel_mst_disable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -340,7 +341,8 @@ static void intel_mst_disable_dp(struct
> intel_encoder *encoder,
> old_crtc_state,
> old_conn_state);
> }
>
> -static void intel_mst_post_disable_dp(struct intel_encoder *encoder,
> +static void intel_mst_post_disable_dp(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -405,13 +407,14 @@ static void intel_mst_post_disable_dp(struct
> intel_encoder *encoder,
>
> intel_mst->connector = NULL;
> if (last_mst_stream)
> - intel_dig_port->base.post_disable(&intel_dig_port-
> >base,
> + intel_dig_port->base.post_disable(state,
> &intel_dig_port->base,
> old_crtc_state,
> NULL);
>
> DRM_DEBUG_KMS("active links %d\n", intel_dp->active_mst_links);
> }
>
> -static void intel_mst_pre_pll_enable_dp(struct intel_encoder
> *encoder,
> +static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct
> drm_connector_state *conn_state)
> {
> @@ -420,11 +423,12 @@ static void intel_mst_pre_pll_enable_dp(struct
> intel_encoder *encoder,
> struct intel_dp *intel_dp = &intel_dig_port->dp;
>
> if (intel_dp->active_mst_links == 0)
> - intel_dig_port->base.pre_pll_enable(&intel_dig_port-
> >base,
> + intel_dig_port->base.pre_pll_enable(state,
> &intel_dig_port->base,
> pipe_config, NULL);
> }
>
> -static void intel_mst_pre_enable_dp(struct intel_encoder *encoder,
> +static void intel_mst_pre_enable_dp(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -456,7 +460,7 @@ static void intel_mst_pre_enable_dp(struct
> intel_encoder *encoder,
> drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector-
> >port, true);
>
> if (first_mst_stream)
> - intel_dig_port->base.pre_enable(&intel_dig_port->base,
> + intel_dig_port->base.pre_enable(state, &intel_dig_port-
> >base,
> pipe_config, NULL);
>
> ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
> @@ -487,7 +491,8 @@ static void intel_mst_pre_enable_dp(struct
> intel_encoder *encoder,
> intel_dp_set_m_n(pipe_config, M1_N1);
> }
>
> -static void intel_mst_enable_dp(struct intel_encoder *encoder,
> +static void intel_mst_enable_dp(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
> b/drivers/gpu/drm/i915/display/intel_dvo.c
> index 341d5ce8b062..5cd09034519b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_dvo.c
> @@ -183,7 +183,8 @@ static void intel_dvo_get_config(struct
> intel_encoder *encoder,
> pipe_config->hw.adjusted_mode.crtc_clock = pipe_config-
> >port_clock;
> }
>
> -static void intel_disable_dvo(struct intel_encoder *encoder,
> +static void intel_disable_dvo(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -197,7 +198,8 @@ static void intel_disable_dvo(struct
> intel_encoder *encoder,
> intel_de_read(dev_priv, dvo_reg);
> }
>
> -static void intel_enable_dvo(struct intel_encoder *encoder,
> +static void intel_enable_dvo(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -272,7 +274,8 @@ static int intel_dvo_compute_config(struct
> intel_encoder *encoder,
> return 0;
> }
>
> -static void intel_dvo_pre_enable(struct intel_encoder *encoder,
> +static void intel_dvo_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index ee0f27ea2810..0ed9c5d33d75 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -2075,7 +2075,8 @@ int intel_hdcp_disable(struct intel_connector
> *connector)
> return ret;
> }
>
> -void intel_hdcp_update_pipe(struct intel_encoder *encoder,
> +void intel_hdcp_update_pipe(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h
> b/drivers/gpu/drm/i915/display/intel_hdcp.h
> index 7c12ad609b1f..86bbaec120cc 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.h
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
> @@ -11,6 +11,7 @@
> struct drm_connector;
> struct drm_connector_state;
> struct drm_i915_private;
> +struct intel_atomic_state;
> struct intel_connector;
> struct intel_crtc_state;
> struct intel_encoder;
> @@ -26,7 +27,8 @@ int intel_hdcp_init(struct intel_connector
> *connector,
> int intel_hdcp_enable(struct intel_connector *connector,
> enum transcoder cpu_transcoder, u8 content_type);
> int intel_hdcp_disable(struct intel_connector *connector);
> -void intel_hdcp_update_pipe(struct intel_encoder *encoder,
> +void intel_hdcp_update_pipe(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state);
> bool is_hdcp_supported(struct drm_i915_private *dev_priv, enum port
> port);
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
> b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index 39930232b253..484e067b100b 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1878,7 +1878,8 @@ static void intel_enable_hdmi_audio(struct
> intel_encoder *encoder,
> intel_audio_codec_enable(encoder, pipe_config, conn_state);
> }
>
> -static void g4x_enable_hdmi(struct intel_encoder *encoder,
> +static void g4x_enable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1900,7 +1901,8 @@ static void g4x_enable_hdmi(struct
> intel_encoder *encoder,
> intel_enable_hdmi_audio(encoder, pipe_config,
> conn_state);
> }
>
> -static void ibx_enable_hdmi(struct intel_encoder *encoder,
> +static void ibx_enable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1951,7 +1953,8 @@ static void ibx_enable_hdmi(struct
> intel_encoder *encoder,
> intel_enable_hdmi_audio(encoder, pipe_config,
> conn_state);
> }
>
> -static void cpt_enable_hdmi(struct intel_encoder *encoder,
> +static void cpt_enable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -2004,13 +2007,15 @@ static void cpt_enable_hdmi(struct
> intel_encoder *encoder,
> intel_enable_hdmi_audio(encoder, pipe_config,
> conn_state);
> }
>
> -static void vlv_enable_hdmi(struct intel_encoder *encoder,
> +static void vlv_enable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> }
>
> -static void intel_disable_hdmi(struct intel_encoder *encoder,
> +static void intel_disable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -2068,7 +2073,8 @@ static void intel_disable_hdmi(struct
> intel_encoder *encoder,
> intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> }
>
> -static void g4x_disable_hdmi(struct intel_encoder *encoder,
> +static void g4x_disable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -2076,10 +2082,11 @@ static void g4x_disable_hdmi(struct
> intel_encoder *encoder,
> intel_audio_codec_disable(encoder,
> old_crtc_state,
> old_conn_state);
>
> - intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
> + intel_disable_hdmi(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> -static void pch_disable_hdmi(struct intel_encoder *encoder,
> +static void pch_disable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -2088,11 +2095,12 @@ static void pch_disable_hdmi(struct
> intel_encoder *encoder,
> old_crtc_state,
> old_conn_state);
> }
>
> -static void pch_post_disable_hdmi(struct intel_encoder *encoder,
> +static void pch_post_disable_hdmi(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> - intel_disable_hdmi(encoder, old_crtc_state, old_conn_state);
> + intel_disable_hdmi(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> static int intel_hdmi_source_max_tmds_clock(struct intel_encoder
> *encoder)
> @@ -2474,7 +2482,8 @@ int intel_hdmi_compute_config(struct
> intel_encoder *encoder,
> }
> }
>
> - intel_hdmi_compute_gcp_infoframe(encoder, pipe_config,
> conn_state);
> + intel_hdmi_compute_gcp_infoframe(encoder, pipe_config,
> + conn_state);
>
> if (!intel_hdmi_compute_avi_infoframe(encoder, pipe_config,
> conn_state)) {
> DRM_DEBUG_KMS("bad AVI infoframe\n");
> @@ -2664,7 +2673,8 @@ static int intel_hdmi_get_modes(struct
> drm_connector *connector)
> return intel_connector_update_modes(connector, edid);
> }
>
> -static void intel_hdmi_pre_enable(struct intel_encoder *encoder,
> +static void intel_hdmi_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -2678,7 +2688,8 @@ static void intel_hdmi_pre_enable(struct
> intel_encoder *encoder,
> pipe_config, conn_state);
> }
>
> -static void vlv_hdmi_pre_enable(struct intel_encoder *encoder,
> +static void vlv_hdmi_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -2695,12 +2706,13 @@ static void vlv_hdmi_pre_enable(struct
> intel_encoder *encoder,
> pipe_config->has_infoframe,
> pipe_config, conn_state);
>
> - g4x_enable_hdmi(encoder, pipe_config, conn_state);
> + g4x_enable_hdmi(state, encoder, pipe_config, conn_state);
>
> vlv_wait_port_ready(dev_priv, dport, 0x0);
> }
>
> -static void vlv_hdmi_pre_pll_enable(struct intel_encoder *encoder,
> +static void vlv_hdmi_pre_pll_enable(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -2709,7 +2721,8 @@ static void vlv_hdmi_pre_pll_enable(struct
> intel_encoder *encoder,
> vlv_phy_pre_pll_enable(encoder, pipe_config);
> }
>
> -static void chv_hdmi_pre_pll_enable(struct intel_encoder *encoder,
> +static void chv_hdmi_pre_pll_enable(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -2718,14 +2731,16 @@ static void chv_hdmi_pre_pll_enable(struct
> intel_encoder *encoder,
> chv_phy_pre_pll_enable(encoder, pipe_config);
> }
>
> -static void chv_hdmi_post_pll_disable(struct intel_encoder *encoder,
> +static void chv_hdmi_post_pll_disable(struct intel_atomic_state
> *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> chv_phy_post_pll_disable(encoder, old_crtc_state);
> }
>
> -static void vlv_hdmi_post_disable(struct intel_encoder *encoder,
> +static void vlv_hdmi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -2733,7 +2748,8 @@ static void vlv_hdmi_post_disable(struct
> intel_encoder *encoder,
> vlv_phy_reset_lanes(encoder, old_crtc_state);
> }
>
> -static void chv_hdmi_post_disable(struct intel_encoder *encoder,
> +static void chv_hdmi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -2748,7 +2764,8 @@ static void chv_hdmi_post_disable(struct
> intel_encoder *encoder,
> vlv_dpio_put(dev_priv);
> }
>
> -static void chv_hdmi_pre_enable(struct intel_encoder *encoder,
> +static void chv_hdmi_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -2766,7 +2783,7 @@ static void chv_hdmi_pre_enable(struct
> intel_encoder *encoder,
> pipe_config->has_infoframe,
> pipe_config, conn_state);
>
> - g4x_enable_hdmi(encoder, pipe_config, conn_state);
> + g4x_enable_hdmi(state, encoder, pipe_config, conn_state);
>
> vlv_wait_port_ready(dev_priv, dport, 0x0);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c
> b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 9a067effcfa0..fe591f82163e 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -220,7 +220,8 @@ static void intel_lvds_pps_init_hw(struct
> drm_i915_private *dev_priv,
> REG_FIELD_PREP(PP_REFERENCE_DIVIDER_MASK, pps-
> >divider) | REG_FIELD_PREP(PANEL_POWER_CYCLE_DELAY_MASK,
> DIV_ROUND_UP(pps->t4, 1000) + 1));
> }
>
> -static void intel_pre_enable_lvds(struct intel_encoder *encoder,
> +static void intel_pre_enable_lvds(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -301,7 +302,8 @@ static void intel_pre_enable_lvds(struct
> intel_encoder *encoder,
> /*
> * Sets the power state for the panel.
> */
> -static void intel_enable_lvds(struct intel_encoder *encoder,
> +static void intel_enable_lvds(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -323,7 +325,8 @@ static void intel_enable_lvds(struct
> intel_encoder *encoder,
> intel_panel_enable_backlight(pipe_config, conn_state);
> }
>
> -static void intel_disable_lvds(struct intel_encoder *encoder,
> +static void intel_disable_lvds(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -341,28 +344,31 @@ static void intel_disable_lvds(struct
> intel_encoder *encoder,
> intel_de_posting_read(dev_priv, lvds_encoder->reg);
> }
>
> -static void gmch_disable_lvds(struct intel_encoder *encoder,
> +static void gmch_disable_lvds(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
>
> {
> intel_panel_disable_backlight(old_conn_state);
>
> - intel_disable_lvds(encoder, old_crtc_state, old_conn_state);
> + intel_disable_lvds(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> -static void pch_disable_lvds(struct intel_encoder *encoder,
> +static void pch_disable_lvds(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> intel_panel_disable_backlight(old_conn_state);
> }
>
> -static void pch_post_disable_lvds(struct intel_encoder *encoder,
> +static void pch_post_disable_lvds(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> - intel_disable_lvds(encoder, old_crtc_state, old_conn_state);
> + intel_disable_lvds(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> static enum drm_mode_status
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 276f43870802..f8ccfe67429e 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -1931,7 +1931,8 @@ static int pwm_setup_backlight(struct
> intel_connector *connector,
> return 0;
> }
>
> -void intel_panel_update_backlight(struct intel_encoder *encoder,
> +void intel_panel_update_backlight(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.h
> b/drivers/gpu/drm/i915/display/intel_panel.h
> index cedeea443336..11f2f6b628d8 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.h
> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
> @@ -37,7 +37,8 @@ int intel_panel_setup_backlight(struct
> drm_connector *connector,
> enum pipe pipe);
> void intel_panel_enable_backlight(const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state);
> -void intel_panel_update_backlight(struct intel_encoder *encoder,
> +void intel_panel_update_backlight(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state);
> void intel_panel_disable_backlight(const struct drm_connector_state
> *old_conn_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c
> b/drivers/gpu/drm/i915/display/intel_sdvo.c
> index 637d8fe2f8c2..e6306cbb7a3a 100644
> --- a/drivers/gpu/drm/i915/display/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c
> @@ -1430,7 +1430,8 @@ static void intel_sdvo_update_props(struct
> intel_sdvo *intel_sdvo,
> #undef UPDATE_PROPERTY
> }
>
> -static void intel_sdvo_pre_enable(struct intel_encoder
> *intel_encoder,
> +static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *intel_encoder,
> const struct intel_crtc_state
> *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1727,7 +1728,8 @@ static void intel_sdvo_enable_audio(struct
> intel_sdvo *intel_sdvo,
> SDVO_AUDIO_PRESENCE_DETECT);
> }
>
> -static void intel_disable_sdvo(struct intel_encoder *encoder,
> +static void intel_disable_sdvo(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -1775,20 +1777,23 @@ static void intel_disable_sdvo(struct
> intel_encoder *encoder,
> }
> }
>
> -static void pch_disable_sdvo(struct intel_encoder *encoder,
> +static void pch_disable_sdvo(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> }
>
> -static void pch_post_disable_sdvo(struct intel_encoder *encoder,
> +static void pch_post_disable_sdvo(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> - intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
> + intel_disable_sdvo(state, encoder, old_crtc_state,
> old_conn_state);
> }
>
> -static void intel_enable_sdvo(struct intel_encoder *encoder,
> +static void intel_enable_sdvo(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/intel_tv.c
> b/drivers/gpu/drm/i915/display/intel_tv.c
> index d2e3a3a323e9..b6003fc9e268 100644
> --- a/drivers/gpu/drm/i915/display/intel_tv.c
> +++ b/drivers/gpu/drm/i915/display/intel_tv.c
> @@ -914,7 +914,8 @@ intel_tv_get_hw_state(struct intel_encoder
> *encoder, enum pipe *pipe)
> }
>
> static void
> -intel_enable_tv(struct intel_encoder *encoder,
> +intel_enable_tv(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *pipe_config,
> const struct drm_connector_state *conn_state)
> {
> @@ -930,7 +931,8 @@ intel_enable_tv(struct intel_encoder *encoder,
> }
>
> static void
> -intel_disable_tv(struct intel_encoder *encoder,
> +intel_disable_tv(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state *old_conn_state)
> {
> @@ -1414,7 +1416,8 @@ static void set_color_conversion(struct
> drm_i915_private *dev_priv,
> (color_conversion->bv << 16) | color_conversion-
> >av);
> }
>
> -static void intel_tv_pre_enable(struct intel_encoder *encoder,
> +static void intel_tv_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c
> b/drivers/gpu/drm/i915/display/vlv_dsi.c
> index f4c362dc6e15..a277d7d6b3bf 100644
> --- a/drivers/gpu/drm/i915/display/vlv_dsi.c
> +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
> @@ -759,7 +759,8 @@ static void intel_dsi_unprepare(struct
> intel_encoder *encoder);
> * DSI port enable has to be done before pipe and plane enable, so
> we do it in
> * the pre_enable hook instead of the enable hook.
> */
> -static void intel_dsi_pre_enable(struct intel_encoder *encoder,
> +static void intel_dsi_pre_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *pipe_config,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -858,7 +859,8 @@ static void intel_dsi_pre_enable(struct
> intel_encoder *encoder,
> intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
> }
>
> -static void bxt_dsi_enable(struct intel_encoder *encoder,
> +static void bxt_dsi_enable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state
> *conn_state)
> {
> @@ -871,7 +873,8 @@ static void bxt_dsi_enable(struct intel_encoder
> *encoder,
> * DSI port disable has to be done after pipe and plane disable, so
> we do it in
> * the post_disable hook.
> */
> -static void intel_dsi_disable(struct intel_encoder *encoder,
> +static void intel_dsi_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
> @@ -906,7 +909,8 @@ static void intel_dsi_clear_device_ready(struct
> intel_encoder *encoder)
> vlv_dsi_clear_device_ready(encoder);
> }
>
> -static void intel_dsi_post_disable(struct intel_encoder *encoder,
> +static void intel_dsi_post_disable(struct intel_atomic_state *state,
> + struct intel_encoder *encoder,
> const struct intel_crtc_state
> *old_crtc_state,
> const struct drm_connector_state
> *old_conn_state)
> {
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
@ 2020-04-02 1:25 ` Souza, Jose
0 siblings, 0 replies; 41+ messages in thread
From: Souza, Jose @ 2020-04-02 1:25 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Remove the copy pasted port sync crtc enable functions and instead
> just split the normal function into the two parts we need.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 128 +++++++--------
> ----
> 1 file changed, 45 insertions(+), 83 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 292cac64f1ac..b56a5a49418f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -14909,11 +14909,13 @@ static void intel_pipe_fastset(const struct
> intel_crtc_state *old_crtc_state,
> }
>
> static void commit_pipe_config(struct intel_atomic_state *state,
> - struct intel_crtc_state *old_crtc_state,
> - struct intel_crtc_state *new_crtc_state)
> + struct intel_crtc *crtc)
> {
> - struct intel_crtc *crtc = to_intel_crtc(new_crtc_state-
> >uapi.crtc);
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> bool modeset = needs_modeset(new_crtc_state);
>
> /*
> @@ -14939,22 +14941,35 @@ static void commit_pipe_config(struct
> intel_atomic_state *state,
> dev_priv->display.atomic_update_watermarks(state,
> crtc);
> }
>
> -static void intel_update_crtc(struct intel_crtc *crtc,
> - struct intel_atomic_state *state,
> - struct intel_crtc_state *old_crtc_state,
> - struct intel_crtc_state *new_crtc_state)
> +static void intel_enable_crtc(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> +
> + if (!needs_modeset(new_crtc_state))
> + return;
> +
> + intel_crtc_update_active_timings(new_crtc_state);
> +
> + dev_priv->display.crtc_enable(state, crtc);
> +
> + /* vblanks work again, re-enable pipe CRC. */
> + intel_crtc_enable_pipe_crc(crtc);
> +}
> +
> +static void intel_update_crtc(struct intel_atomic_state *state,
> + struct intel_crtc *crtc)
> +{
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> + const struct intel_crtc_state *old_crtc_state =
> + intel_atomic_get_old_crtc_state(state, crtc);
> + struct intel_crtc_state *new_crtc_state =
> + intel_atomic_get_new_crtc_state(state, crtc);
> bool modeset = needs_modeset(new_crtc_state);
>
> - if (modeset) {
> - intel_crtc_update_active_timings(new_crtc_state);
> -
> - dev_priv->display.crtc_enable(state, crtc);
> -
> - /* vblanks work again, re-enable pipe CRC. */
> - intel_crtc_enable_pipe_crc(crtc);
> - } else {
> + if (!modeset) {
> if (new_crtc_state->preload_luts &&
> (new_crtc_state->uapi.color_mgmt_changed ||
> new_crtc_state->update_pipe))
> @@ -14974,7 +14989,7 @@ static void intel_update_crtc(struct
> intel_crtc *crtc,
> /* Perform vblank evasion around commit operation */
> intel_pipe_update_start(new_crtc_state);
>
> - commit_pipe_config(state, old_crtc_state, new_crtc_state);
> + commit_pipe_config(state, crtc);
>
> if (INTEL_GEN(dev_priv) >= 9)
> skl_update_planes_on_crtc(state, crtc);
> @@ -15081,30 +15096,19 @@ static void
> intel_commit_modeset_disables(struct intel_atomic_state *state)
>
> static void intel_commit_modeset_enables(struct intel_atomic_state
> *state)
> {
> + struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> - struct intel_crtc_state *old_crtc_state, *new_crtc_state;
> int i;
>
> - for_each_oldnew_intel_crtc_in_state(state, crtc,
> old_crtc_state, new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i) {
> if (!new_crtc_state->hw.active)
> continue;
>
> - intel_update_crtc(crtc, state, old_crtc_state,
> - new_crtc_state);
> + intel_enable_crtc(state, crtc);
> + intel_update_crtc(state, crtc);
> }
> }
>
> -static void intel_crtc_enable_trans_port_sync(struct intel_crtc
> *crtc,
> - struct intel_atomic_state
> *state,
> - struct intel_crtc_state
> *new_crtc_state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> -
> - intel_crtc_update_active_timings(new_crtc_state);
> - dev_priv->display.crtc_enable(state, crtc);
> - intel_crtc_enable_pipe_crc(crtc);
> -}
> -
> static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
> struct intel_atomic_state
> *state)
> {
> @@ -15121,41 +15125,6 @@ static void
> intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
> intel_dp_stop_link_train(intel_dp);
> }
>
> -/*
> - * TODO: This is only called from port sync and it is identical to
> what will be
> - * executed again in intel_update_crtc() over port sync pipes
> - */
> -static void intel_post_crtc_enable_updates(struct intel_crtc *crtc,
> - struct intel_atomic_state
> *state)
> -{
> - struct intel_crtc_state *new_crtc_state =
> - intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_crtc_state *old_crtc_state =
> - intel_atomic_get_old_crtc_state(state, crtc);
> - bool modeset = needs_modeset(new_crtc_state);
> -
> - if (new_crtc_state->update_pipe && !new_crtc_state->enable_fbc)
> - intel_fbc_disable(crtc);
> - else
> - intel_fbc_enable(state, crtc);
> -
> - /* Perform vblank evasion around commit operation */
> - intel_pipe_update_start(new_crtc_state);
> - commit_pipe_config(state, old_crtc_state, new_crtc_state);
> - skl_update_planes_on_crtc(state, crtc);
> - intel_pipe_update_end(new_crtc_state);
> -
> - /*
> - * We usually enable FIFO underrun interrupts as part of the
> - * CRTC enable sequence during modesets. But when we inherit a
> - * valid pipe configuration from the BIOS we need to take care
> - * of enabling them on the CRTC's first fastset.
> - */
> - if (new_crtc_state->update_pipe && !modeset &&
> - old_crtc_state->hw.mode.private_flags &
> I915_MODE_FLAG_INHERITED)
> - intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
> -}
> -
> static void intel_update_trans_port_sync_crtcs(struct intel_crtc
> *crtc,
> struct
> intel_atomic_state *state,
> struct intel_crtc_state
> *old_crtc_state,
> @@ -15179,14 +15148,10 @@ static void
> intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
> /* Enable seq for slave with with DP_TP_CTL left Idle until the
> * master is ready
> */
> - intel_crtc_enable_trans_port_sync(slave_crtc,
> - state,
> - new_slave_crtc_state);
> + intel_enable_crtc(state, slave_crtc);
>
> /* Enable seq for master with with DP_TP_CTL left Idle */
> - intel_crtc_enable_trans_port_sync(crtc,
> - state,
> - new_crtc_state);
> + intel_enable_crtc(state, crtc);
>
> /* Set Slave's DP_TP_CTL to Normal */
> intel_set_dp_tp_ctl_normal(slave_crtc,
> @@ -15198,10 +15163,8 @@ static void
> intel_update_trans_port_sync_crtcs(struct intel_crtc *crtc,
> state);
>
> /* Now do the post crtc enable for all master and slaves */
> - intel_post_crtc_enable_updates(slave_crtc,
> - state);
> - intel_post_crtc_enable_updates(crtc,
> - state);
> + intel_update_crtc(state, slave_crtc);
> + intel_update_crtc(state, crtc);
> }
>
> static void icl_dbuf_slice_pre_update(struct intel_atomic_state
> *state)
> @@ -15275,8 +15238,7 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> entries[pipe] = new_crtc_state->wm.skl.ddb;
> update_pipes &= ~BIT(pipe);
>
> - intel_update_crtc(crtc, state, old_crtc_state,
> - new_crtc_state);
> + intel_update_crtc(state, crtc);
>
> /*
> * If this is an already active pipe, it's DDB
> changed,
> @@ -15324,8 +15286,8 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> modeset_pipes &= ~BIT(slave_crtc->pipe);
>
> } else {
> - intel_update_crtc(crtc, state, old_crtc_state,
> - new_crtc_state);
> + intel_enable_crtc(state, crtc);
> + intel_update_crtc(state, crtc);
> }
> }
>
> @@ -15334,8 +15296,7 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> * other pipes, right now it is only MST slaves as both port
> sync slave
> * and master are enabled together
> */
> - for_each_oldnew_intel_crtc_in_state(state, crtc,
> old_crtc_state,
> - new_crtc_state, i) {
> + for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i) {
> enum pipe pipe = crtc->pipe;
>
> if ((modeset_pipes & BIT(pipe)) == 0)
> @@ -15347,7 +15308,8 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> entries[pipe] = new_crtc_state->wm.skl.ddb;
> modeset_pipes &= ~BIT(pipe);
>
> - intel_update_crtc(crtc, state, old_crtc_state,
> new_crtc_state);
> + intel_enable_crtc(state, crtc);
> + intel_update_crtc(state, crtc);
> }
>
> drm_WARN_ON(&dev_priv->drm, modeset_pipes);
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
@ 2020-04-03 0:32 ` Souza, Jose
2020-04-03 17:25 ` Ville Syrjälä
0 siblings, 1 reply; 41+ messages in thread
From: Souza, Jose @ 2020-04-03 0:32 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Don't assume there is just one port sync slave. We might have
> several.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 98 ++++++++++------
> ----
> 1 file changed, 49 insertions(+), 49 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index b56a5a49418f..33f38c8a5da4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15009,18 +15009,6 @@ static void intel_update_crtc(struct
> intel_atomic_state *state,
> intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
> }
>
> -static struct intel_crtc *intel_get_slave_crtc(const struct
> intel_crtc_state *new_crtc_state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(new_crtc_state-
> >uapi.crtc->dev);
> - enum transcoder slave_transcoder;
> -
> - drm_WARN_ON(&dev_priv->drm,
> - !is_power_of_2(new_crtc_state-
> >sync_mode_slaves_mask));
> -
> - slave_transcoder = ffs(new_crtc_state->sync_mode_slaves_mask) -
> 1;
> - return intel_get_crtc_for_pipe(dev_priv,
> - (enum pipe)slave_transcoder);
> -}
>
> static void intel_old_crtc_state_disables(struct intel_atomic_state
> *state,
> struct intel_crtc_state
> *old_crtc_state,
> @@ -15109,8 +15097,8 @@ static void
> intel_commit_modeset_enables(struct intel_atomic_state *state)
> }
> }
>
> -static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
> - struct intel_atomic_state
> *state)
> +static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state
> *state,
> + struct intel_crtc *crtc)
> {
> struct drm_connector *uninitialized_var(conn);
> struct drm_connector_state *conn_state;
> @@ -15125,45 +15113,55 @@ static void
> intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
> intel_dp_stop_link_train(intel_dp);
> }
>
> -static void intel_update_trans_port_sync_crtcs(struct intel_crtc
> *crtc,
> - struct
> intel_atomic_state *state,
> - struct intel_crtc_state
> *old_crtc_state,
> - struct intel_crtc_state
> *new_crtc_state)
> +static void intel_update_trans_port_sync_crtcs(struct
> intel_atomic_state *state,
> + struct intel_crtc *crtc)
> {
> - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> - struct intel_crtc *slave_crtc =
> intel_get_slave_crtc(new_crtc_state);
> - struct intel_crtc_state *new_slave_crtc_state =
> - intel_atomic_get_new_crtc_state(state, slave_crtc);
> - struct intel_crtc_state *old_slave_crtc_state =
> - intel_atomic_get_old_crtc_state(state, slave_crtc);
> + struct drm_i915_private *i915 = to_i915(state->base.dev);
> + const struct intel_crtc_state *new_slave_crtc_state;
> + const struct intel_crtc_state *new_crtc_state;
> + struct intel_crtc *slave_crtc;
> + int i;
>
> - drm_WARN_ON(&i915->drm, !slave_crtc || !new_slave_crtc_state ||
> - !old_slave_crtc_state);
> + for_each_new_intel_crtc_in_state(state, slave_crtc,
> + new_slave_crtc_state, i) {
> + if (new_slave_crtc_state->master_transcoder !=
> + new_crtc_state->cpu_transcoder)
Missing new_crtc_state initialization.
With that:
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> + continue;
> +
> + drm_dbg_kms(&i915->drm,
> + "Updating transcoder port sync slave
> [CRTC:%d:%s]\n",
> + slave_crtc->base.base.id, slave_crtc-
> >base.name);
> +
> + intel_enable_crtc(state, slave_crtc);
> + }
>
> drm_dbg_kms(&i915->drm,
> - "Updating Transcoder Port Sync Master CRTC = %d %s
> and Slave CRTC %d %s\n",
> - crtc->base.base.id, crtc->base.name,
> - slave_crtc->base.base.id, slave_crtc->base.name);
> + "Updating transcoder port sync master
> [CRTC:%d:%s]\n",
> + crtc->base.base.id, crtc->base.name);
>
> - /* Enable seq for slave with with DP_TP_CTL left Idle until the
> - * master is ready
> - */
> - intel_enable_crtc(state, slave_crtc);
> -
> - /* Enable seq for master with with DP_TP_CTL left Idle */
> intel_enable_crtc(state, crtc);
>
> - /* Set Slave's DP_TP_CTL to Normal */
> - intel_set_dp_tp_ctl_normal(slave_crtc,
> - state);
> + for_each_new_intel_crtc_in_state(state, slave_crtc,
> + new_slave_crtc_state, i) {
> + if (new_slave_crtc_state->master_transcoder !=
> + new_crtc_state->cpu_transcoder)
> + continue;
> +
> + intel_set_dp_tp_ctl_normal(state, slave_crtc);
> + }
>
> - /* Set Master's DP_TP_CTL To Normal */
> usleep_range(200, 400);
> - intel_set_dp_tp_ctl_normal(crtc,
> - state);
> + intel_set_dp_tp_ctl_normal(state, crtc);
> +
> + for_each_new_intel_crtc_in_state(state, slave_crtc,
> + new_slave_crtc_state, i) {
> + if (new_slave_crtc_state->master_transcoder !=
> + new_crtc_state->cpu_transcoder)
> + continue;
> +
> + intel_update_crtc(state, slave_crtc);
> + }
>
> - /* Now do the post crtc enable for all master and slaves */
> - intel_update_crtc(state, slave_crtc);
> intel_update_crtc(state, crtc);
> }
>
> @@ -15275,16 +15273,18 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
> modeset_pipes &= ~BIT(pipe);
>
> if (is_trans_port_sync_mode(new_crtc_state)) {
> + const struct intel_crtc_state
> *new_slave_crtc_state;
> struct intel_crtc *slave_crtc;
> + int i;
>
> - intel_update_trans_port_sync_crtcs(crtc, state,
> - old_crtc_sta
> te,
> - new_crtc_sta
> te);
> + intel_update_trans_port_sync_crtcs(state,
> crtc);
>
> - slave_crtc =
> intel_get_slave_crtc(new_crtc_state);
> - /* TODO: update entries[] of slave */
> - modeset_pipes &= ~BIT(slave_crtc->pipe);
> + for_each_new_intel_crtc_in_state(state,
> slave_crtc,
> + new_slave_crtc
> _state, i) {
>
> + /* TODO: update entries[] of slave */
> + modeset_pipes &= ~BIT(slave_crtc-
> >pipe);
> + }
> } else {
> intel_enable_crtc(state, crtc);
> intel_update_crtc(state, crtc);
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
@ 2020-04-03 0:44 ` Souza, Jose
0 siblings, 0 replies; 41+ messages in thread
From: Souza, Jose @ 2020-04-03 0:44 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Currently only port sync pipes do the sequence such that
> we first do the modeset part for every pipe and then do
> the plane/etc. updates. Let's follow that apporach for
> all pipes in skl+ so that we can properly integrate the
> port sync into the normal modeset flow.
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 44 ++++++++++------
> ----
> 1 file changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 33f38c8a5da4..3926ac8f1f10 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15152,17 +15152,6 @@ static void
> intel_update_trans_port_sync_crtcs(struct intel_atomic_state *state,
>
> usleep_range(200, 400);
> intel_set_dp_tp_ctl_normal(state, crtc);
> -
> - for_each_new_intel_crtc_in_state(state, slave_crtc,
> - new_slave_crtc_state, i) {
> - if (new_slave_crtc_state->master_transcoder !=
> - new_crtc_state->cpu_transcoder)
> - continue;
> -
> - intel_update_crtc(state, slave_crtc);
> - }
> -
> - intel_update_crtc(state, crtc);
> }
>
> static void icl_dbuf_slice_pre_update(struct intel_atomic_state
> *state)
> @@ -15251,6 +15240,8 @@ static void skl_commit_modeset_enables(struct
> intel_atomic_state *state)
> }
> }
>
> + update_pipes = modeset_pipes;
> +
> /*
> * Enable all pipes that needs a modeset and do not depends on
> other
> * pipes
> @@ -15266,10 +15257,6 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
> is_trans_port_sync_slave(new_crtc_state))
> continue;
>
> - drm_WARN_ON(&dev_priv->drm,
> skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
> -
> entries, I915_MAX_PIPES, pipe));
> -
> - entries[pipe] = new_crtc_state->wm.skl.ddb;
> modeset_pipes &= ~BIT(pipe);
>
> if (is_trans_port_sync_mode(new_crtc_state)) {
> @@ -15287,14 +15274,13 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
> }
> } else {
> intel_enable_crtc(state, crtc);
> - intel_update_crtc(state, crtc);
> }
> }
>
> /*
> - * Finally enable all pipes that needs a modeset and depends on
> - * other pipes, right now it is only MST slaves as both port
> sync slave
> - * and master are enabled together
> + * Then we enable all remaining pipes that depend on other
> + * pipes, right now it is only MST slaves as both port sync
> + * slave and master are enabled together
> */
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i) {
> enum pipe pipe = crtc->pipe;
> @@ -15302,18 +15288,32 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
> if ((modeset_pipes & BIT(pipe)) == 0)
> continue;
>
> + modeset_pipes &= ~BIT(pipe);
> +
> + intel_enable_crtc(state, crtc);
> + }
> +
> + /*
> + * Finally we do the plane updates/etc. for all pipes that got
> enabled.
> + */
> + for_each_oldnew_intel_crtc_in_state(state, crtc,
> old_crtc_state,
> + new_crtc_state, i) {
> + enum pipe pipe = crtc->pipe;
> +
> + if ((update_pipes & BIT(pipe)) == 0)
> + continue;
> +
> drm_WARN_ON(&dev_priv->drm,
> skl_ddb_allocation_overlaps(&new_crtc_state->wm.skl.ddb,
>
> entries, I915_MAX_PIPES, pipe));
>
> entries[pipe] = new_crtc_state->wm.skl.ddb;
> - modeset_pipes &= ~BIT(pipe);
> + update_pipes &= ~BIT(pipe);
>
> - intel_enable_crtc(state, crtc);
> intel_update_crtc(state, crtc);
> }
>
> drm_WARN_ON(&dev_priv->drm, modeset_pipes);
> -
> + drm_WARN_ON(&dev_priv->drm, update_pipes);
> }
>
> static void intel_atomic_helper_free_state(struct drm_i915_private
> *dev_priv)
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
@ 2020-04-03 0:59 ` Souza, Jose
0 siblings, 0 replies; 41+ messages in thread
From: Souza, Jose @ 2020-04-03 0:59 UTC (permalink / raw)
To: ville.syrjala, intel-gfx
On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the final DP_TP_CTL frobbing of port sync to the master
> encoder's enable hook. Now neatly out of sight from the high level
> modeset code.
>
> And thus we've eliminated all the special casing of port sync
> in the high level modeset code.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 37 ++++++++
> drivers/gpu/drm/i915/display/intel_display.c | 99 ++++------------
> ----
> 2 files changed, 53 insertions(+), 83 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 98475c81f1da..856c56f84833 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3547,6 +3547,41 @@ void intel_ddi_fdi_post_disable(struct
> intel_atomic_state *state,
> intel_de_write(dev_priv, FDI_RX_CTL(PIPE_A), val);
> }
>
> +static void trans_port_sync_stop_link_train(struct
> intel_atomic_state *state,
> + struct intel_encoder
> *encoder,
> + const struct
> intel_crtc_state *crtc_state)
> +{
> + const struct drm_connector_state *conn_state;
> + struct drm_connector *conn;
> + int i;
> +
> + if (!crtc_state->sync_mode_slaves_mask)
> + return;
> +
> + for_each_new_connector_in_state(&state->base, conn, conn_state,
> i) {
> + struct intel_encoder *slave_encoder =
> + to_intel_encoder(conn_state->best_encoder);
> + struct intel_crtc *slave_crtc =
> to_intel_crtc(conn_state->crtc);
> + const struct intel_crtc_state *slave_crtc_state;
> +
> + if (!slave_crtc)
> + continue;
> +
> + slave_crtc_state =
> + intel_atomic_get_new_crtc_state(state,
> slave_crtc);
> +
> + if (slave_crtc_state->master_transcoder !=
> + crtc_state->cpu_transcoder)
> + continue;
> +
> + intel_dp_stop_link_train(enc_to_intel_dp(slave_encoder)
> );
> + }
> +
> + usleep_range(200, 400);
> +
> + intel_dp_stop_link_train(enc_to_intel_dp(encoder));
> +}
> +
> static void intel_enable_ddi_dp(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state
> *crtc_state,
> @@ -3567,6 +3602,8 @@ static void intel_enable_ddi_dp(struct
> intel_atomic_state *state,
>
> if (crtc_state->has_audio)
> intel_audio_codec_enable(encoder, crtc_state,
> conn_state);
> +
> + trans_port_sync_stop_link_train(state, encoder, crtc_state);
> }
>
> static i915_reg_t
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 84e59f6ab8e4..cdae7a680e4a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -544,19 +544,25 @@ needs_modeset(const struct intel_crtc_state
> *state)
> return drm_atomic_crtc_needs_modeset(&state->uapi);
> }
>
> -bool
> -is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
> -{
> - return (crtc_state->master_transcoder != INVALID_TRANSCODER ||
> - crtc_state->sync_mode_slaves_mask);
> -}
> -
> static bool
> is_trans_port_sync_slave(const struct intel_crtc_state *crtc_state)
> {
> return crtc_state->master_transcoder != INVALID_TRANSCODER;
> }
>
> +static bool
> +is_trans_port_sync_master(const struct intel_crtc_state *crtc_state)
> +{
> + return crtc_state->sync_mode_slaves_mask != 0;
> +}
> +
> +bool
> +is_trans_port_sync_mode(const struct intel_crtc_state *crtc_state)
> +{
> + return is_trans_port_sync_master(crtc_state) ||
> + is_trans_port_sync_slave(crtc_state);
> +}
> +
> /*
> * Platform specific helpers to calculate the port PLL loopback-
> (clock.m),
> * and post-divider (clock.p) values, pre- (clock.vco) and post-
> divided fast
> @@ -15104,63 +15110,6 @@ static void
> intel_commit_modeset_enables(struct intel_atomic_state *state)
> }
> }
>
> -static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state
> *state,
> - struct intel_crtc *crtc)
> -{
> - struct drm_connector *uninitialized_var(conn);
> - struct drm_connector_state *conn_state;
> - struct intel_dp *intel_dp;
> - int i;
> -
> - for_each_new_connector_in_state(&state->base, conn, conn_state,
> i) {
> - if (conn_state->crtc == &crtc->base)
> - break;
> - }
> - intel_dp = intel_attached_dp(to_intel_connector(conn));
> - intel_dp_stop_link_train(intel_dp);
> -}
> -
> -static void intel_update_trans_port_sync_crtcs(struct
> intel_atomic_state *state,
> - struct intel_crtc *crtc)
> -{
> - struct drm_i915_private *i915 = to_i915(state->base.dev);
> - const struct intel_crtc_state *new_slave_crtc_state;
> - const struct intel_crtc_state *new_crtc_state;
> - struct intel_crtc *slave_crtc;
> - int i;
> -
> - for_each_new_intel_crtc_in_state(state, slave_crtc,
> - new_slave_crtc_state, i) {
> - if (new_slave_crtc_state->master_transcoder !=
> - new_crtc_state->cpu_transcoder)
> - continue;
> -
> - drm_dbg_kms(&i915->drm,
> - "Updating transcoder port sync slave
> [CRTC:%d:%s]\n",
> - slave_crtc->base.base.id, slave_crtc-
> >base.name);
> -
> - intel_enable_crtc(state, slave_crtc);
> - }
> -
> - drm_dbg_kms(&i915->drm,
> - "Updating transcoder port sync master
> [CRTC:%d:%s]\n",
> - crtc->base.base.id, crtc->base.name);
> -
> - intel_enable_crtc(state, crtc);
> -
> - for_each_new_intel_crtc_in_state(state, slave_crtc,
> - new_slave_crtc_state, i) {
> - if (new_slave_crtc_state->master_transcoder !=
> - new_crtc_state->cpu_transcoder)
> - continue;
> -
> - intel_set_dp_tp_ctl_normal(state, slave_crtc);
> - }
> -
> - usleep_range(200, 400);
> - intel_set_dp_tp_ctl_normal(state, crtc);
> -}
> -
> static void icl_dbuf_slice_pre_update(struct intel_atomic_state
> *state)
> {
> struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> @@ -15261,33 +15210,17 @@ static void
> skl_commit_modeset_enables(struct intel_atomic_state *state)
> continue;
>
> if (intel_dp_mst_is_slave_trans(new_crtc_state) ||
> - is_trans_port_sync_slave(new_crtc_state))
> + is_trans_port_sync_master(new_crtc_state))
> continue;
>
> modeset_pipes &= ~BIT(pipe);
>
> - if (is_trans_port_sync_mode(new_crtc_state)) {
> - const struct intel_crtc_state
> *new_slave_crtc_state;
> - struct intel_crtc *slave_crtc;
> - int i;
> -
> - intel_update_trans_port_sync_crtcs(state,
> crtc);
> -
> - for_each_new_intel_crtc_in_state(state,
> slave_crtc,
> - new_slave_crtc
> _state, i) {
> -
> - /* TODO: update entries[] of slave */
> - modeset_pipes &= ~BIT(slave_crtc-
> >pipe);
> - }
> - } else {
> - intel_enable_crtc(state, crtc);
> - }
> + intel_enable_crtc(state, crtc);
> }
>
> /*
> * Then we enable all remaining pipes that depend on other
> - * pipes, right now it is only MST slaves as both port sync
> - * slave and master are enabled together
> + * pipes: MST slaves and port sync masters.
> */
> for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state,
> i) {
> enum pipe pipe = crtc->pipe;
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^ permalink raw reply [flat|nested] 41+ messages in thread
* Re: [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes
2020-04-03 0:32 ` Souza, Jose
@ 2020-04-03 17:25 ` Ville Syrjälä
0 siblings, 0 replies; 41+ messages in thread
From: Ville Syrjälä @ 2020-04-03 17:25 UTC (permalink / raw)
To: Souza, Jose; +Cc: intel-gfx
On Fri, Apr 03, 2020 at 12:32:20AM +0000, Souza, Jose wrote:
> On Fri, 2020-03-13 at 18:48 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Don't assume there is just one port sync slave. We might have
> > several.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 98 ++++++++++------
> > ----
> > 1 file changed, 49 insertions(+), 49 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > index b56a5a49418f..33f38c8a5da4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15009,18 +15009,6 @@ static void intel_update_crtc(struct
> > intel_atomic_state *state,
> > intel_crtc_arm_fifo_underrun(crtc, new_crtc_state);
> > }
> >
> > -static struct intel_crtc *intel_get_slave_crtc(const struct
> > intel_crtc_state *new_crtc_state)
> > -{
> > - struct drm_i915_private *dev_priv = to_i915(new_crtc_state-
> > >uapi.crtc->dev);
> > - enum transcoder slave_transcoder;
> > -
> > - drm_WARN_ON(&dev_priv->drm,
> > - !is_power_of_2(new_crtc_state-
> > >sync_mode_slaves_mask));
> > -
> > - slave_transcoder = ffs(new_crtc_state->sync_mode_slaves_mask) -
> > 1;
> > - return intel_get_crtc_for_pipe(dev_priv,
> > - (enum pipe)slave_transcoder);
> > -}
> >
> > static void intel_old_crtc_state_disables(struct intel_atomic_state
> > *state,
> > struct intel_crtc_state
> > *old_crtc_state,
> > @@ -15109,8 +15097,8 @@ static void
> > intel_commit_modeset_enables(struct intel_atomic_state *state)
> > }
> > }
> >
> > -static void intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
> > - struct intel_atomic_state
> > *state)
> > +static void intel_set_dp_tp_ctl_normal(struct intel_atomic_state
> > *state,
> > + struct intel_crtc *crtc)
> > {
> > struct drm_connector *uninitialized_var(conn);
> > struct drm_connector_state *conn_state;
> > @@ -15125,45 +15113,55 @@ static void
> > intel_set_dp_tp_ctl_normal(struct intel_crtc *crtc,
> > intel_dp_stop_link_train(intel_dp);
> > }
> >
> > -static void intel_update_trans_port_sync_crtcs(struct intel_crtc
> > *crtc,
> > - struct
> > intel_atomic_state *state,
> > - struct intel_crtc_state
> > *old_crtc_state,
> > - struct intel_crtc_state
> > *new_crtc_state)
> > +static void intel_update_trans_port_sync_crtcs(struct
> > intel_atomic_state *state,
> > + struct intel_crtc *crtc)
> > {
> > - struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > - struct intel_crtc *slave_crtc =
> > intel_get_slave_crtc(new_crtc_state);
> > - struct intel_crtc_state *new_slave_crtc_state =
> > - intel_atomic_get_new_crtc_state(state, slave_crtc);
> > - struct intel_crtc_state *old_slave_crtc_state =
> > - intel_atomic_get_old_crtc_state(state, slave_crtc);
> > + struct drm_i915_private *i915 = to_i915(state->base.dev);
> > + const struct intel_crtc_state *new_slave_crtc_state;
> > + const struct intel_crtc_state *new_crtc_state;
> > + struct intel_crtc *slave_crtc;
> > + int i;
> >
> > - drm_WARN_ON(&i915->drm, !slave_crtc || !new_slave_crtc_state ||
> > - !old_slave_crtc_state);
> > + for_each_new_intel_crtc_in_state(state, slave_crtc,
> > + new_slave_crtc_state, i) {
> > + if (new_slave_crtc_state->master_transcoder !=
> > + new_crtc_state->cpu_transcoder)
>
> Missing new_crtc_state initialization.
Whoops. Fixed.
>
> With that:
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
<snip>
> > - /* TODO: update entries[] of slave */
> > - modeset_pipes &= ~BIT(slave_crtc->pipe);
> > + for_each_new_intel_crtc_in_state(state,
> > slave_crtc,
> > + new_slave_crtc
> > _state, i) {
> >
> > + /* TODO: update entries[] of slave */
> > + modeset_pipes &= ~BIT(slave_crtc-
> > >pipe);
Noticed another problem here. Instead of clearing modeset_pipes for
the slaves of the current crtc we clear it for all crtcs. Fixed to do
the same master_transcoder check as above.
> > + }
> > } else {
> > intel_enable_crtc(state, crtc);
> > intel_update_crtc(state, crtc);
--
Ville Syrjälä
Intel
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 41+ messages in thread
end of thread, other threads:[~2020-04-03 17:25 UTC | newest]
Thread overview: 41+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
2020-03-20 23:37 ` Souza, Jose
2020-03-20 23:54 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
2020-03-18 22:34 ` Manasi Navare
2020-03-19 13:20 ` Ville Syrjälä
2020-03-20 18:36 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
2020-03-18 22:37 ` Manasi Navare
2020-03-19 13:22 ` Ville Syrjälä
2020-03-20 23:12 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
2020-03-18 22:44 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
2020-03-18 22:53 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
2020-03-18 23:00 ` Manasi Navare
2020-03-27 17:15 ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
2020-03-18 17:02 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-04-02 0:59 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
2020-03-18 23:32 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
2020-04-02 1:25 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
2020-04-03 0:32 ` Souza, Jose
2020-04-03 17:25 ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
2020-04-03 0:44 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
2020-04-02 1:18 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
2020-04-03 0:59 ` Souza, Jose
2020-03-16 14:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+ Patchwork
2020-03-18 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2) Patchwork
2020-03-18 18:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-18 21:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3) Patchwork
2020-03-18 22:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-19 0:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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