intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Animesh Manna <animesh.manna@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v5 4/7] drm/i915/dp: Preparation for DP phy compliance auto test
Date: Mon, 16 Mar 2020 16:07:56 +0530	[thread overview]
Message-ID: <20200316103759.12867-5-animesh.manna@intel.com> (raw)
In-Reply-To: <20200316103759.12867-1-animesh.manna@intel.com>

During DP phy compliance auto test mode, sink will request
combination of different test pattern with differnt level of
vswing, pre-emphasis. Function added to prepare for it.

Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c       | 24 +++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 5e00e611f077..42d0b102c2cf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1238,6 +1238,7 @@ struct intel_dp_compliance_data {
 	u8 video_pattern;
 	u16 hdisplay, vdisplay;
 	u8 bpc;
+	struct drm_dp_phy_test_params phytest;
 };
 
 struct intel_dp_compliance {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0a417cd2af2b..16a4a48c8168 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5001,9 +5001,33 @@ static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp)
 	return test_result;
 }
 
+static u8 intel_dp_prepare_phytest(struct intel_dp *intel_dp)
+{
+	struct drm_dp_phy_test_params *data =
+		&intel_dp->compliance.test_data.phytest;
+
+	if (drm_dp_get_phy_test_pattern(&intel_dp->aux, data)) {
+		DRM_DEBUG_KMS("DP Phy Test pattern AUX read failure\n");
+		return DP_TEST_NAK;
+	}
+
+	/*
+	 * link_mst is set to false to avoid executing mst related code
+	 * during compliance testing.
+	 */
+	intel_dp->link_mst = false;
+
+	return DP_TEST_ACK;
+}
+
 static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
 {
 	u8 test_result = DP_TEST_NAK;
+
+	test_result = intel_dp_prepare_phytest(intel_dp);
+	if (test_result != DP_TEST_ACK)
+		DRM_ERROR("Phy test preparation failed\n");
+
 	return test_result;
 }
 
-- 
2.24.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-03-16 10:49 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-16 10:37 [Intel-gfx] [PATCH v5 0/7] DP Phy compliance auto test Animesh Manna
2020-03-16 10:37 ` [Intel-gfx] [PATCH v5 1/7] drm/amd/display: Align macro name as per DP spec Animesh Manna
2020-03-16 10:37 ` [Intel-gfx] [PATCH v5 2/7] drm/dp: get/set phy compliance pattern Animesh Manna
2020-03-16 10:37 ` [Intel-gfx] [PATCH v5 3/7] drm/i915/dp: Made intel_dp_adjust_train() non-static Animesh Manna
2020-03-16 10:37 ` Animesh Manna [this message]
2020-03-16 10:37 ` [Intel-gfx] [PATCH v5 5/7] drm/i915/dp: Add debugfs entry for DP phy compliance Animesh Manna
2020-03-16 10:37 ` [Intel-gfx] [PATCH v5 6/7] drm/i915/dp: Register definition for DP compliance register Animesh Manna
2020-03-17  0:13   ` Manasi Navare
2020-03-18  6:35     ` [Intel-gfx] [PATCH v6 " Animesh Manna
2020-03-18 20:04       ` Manasi Navare
2020-03-19  6:39         ` Manna, Animesh
2020-03-19 16:02           ` Ville Syrjälä
2020-03-19 21:51             ` Manasi Navare
2020-03-24  5:11               ` [Intel-gfx] [PATCH v7 " Animesh Manna
2020-03-27 18:45                 ` Manasi Navare
2020-03-30  4:01                   ` Manna, Animesh
2020-03-31  0:22                     ` Manasi Navare
2020-03-16 10:37 ` [Intel-gfx] [PATCH v5 7/7] drm/i915/dp: Program vswing, pre-emphasis, test-pattern Animesh Manna
2020-04-06 15:09   ` Manasi Navare
2020-03-16 19:33 ` [Intel-gfx] ✓ Fi.CI.BAT: success for DP Phy compliance auto test (rev7) Patchwork
2020-03-17  3:48 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-03-18  8:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for DP Phy compliance auto test (rev8) Patchwork
2020-03-18 10:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-03-24  5:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for DP Phy compliance auto test (rev9) Patchwork
2020-03-24  6:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-24  7:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200316103759.12867-5-animesh.manna@intel.com \
    --to=animesh.manna@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).