* [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/
@ 2020-03-16 11:38 Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 2/4] drm/i915/gt: Pull restoration of GGTT fences underneath the GT Chris Wilson
` (6 more replies)
0 siblings, 7 replies; 8+ messages in thread
From: Chris Wilson @ 2020-03-16 11:38 UTC (permalink / raw)
To: intel-gfx
Since the fence registers control HW detiling through the GGTT
aperture, make them a part of the intel_ggtt under gt/
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/Makefile | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
.../intel_ggtt_fencing.c} | 27 +++++++------------
.../intel_ggtt_fencing.h} | 9 +++----
drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
drivers/gpu/drm/i915/gvt/aperture_gm.c | 2 +-
drivers/gpu/drm/i915/i915_drv.c | 6 ++---
drivers/gpu/drm/i915/i915_drv.h | 1 -
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_vma.h | 1 -
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 +-
12 files changed, 24 insertions(+), 34 deletions(-)
rename drivers/gpu/drm/i915/{i915_gem_fence_reg.c => gt/intel_ggtt_fencing.c} (97%)
rename drivers/gpu/drm/i915/{i915_gem_fence_reg.h => gt/intel_ggtt_fencing.h} (92%)
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 9f887a86e555..1b2ed963179c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -92,6 +92,7 @@ gt-y += \
gt/intel_engine_pool.o \
gt/intel_engine_user.o \
gt/intel_ggtt.o \
+ gt/intel_ggtt_fencing.o \
gt/intel_gt.o \
gt/intel_gt_irq.o \
gt/intel_gt_pm.o \
@@ -153,7 +154,6 @@ i915-y += \
i915_buddy.o \
i915_cmd_parser.o \
i915_gem_evict.o \
- i915_gem_fence_reg.o \
i915_gem_gtt.o \
i915_gem.o \
i915_globals.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index aed498a0d032..a7b72fa569a7 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -65,7 +65,7 @@ static int ggtt_init_hw(struct i915_ggtt *ggtt)
ggtt->mappable_end);
}
- i915_ggtt_init_fences(ggtt);
+ intel_ggtt_init_fences(ggtt);
return 0;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
similarity index 97%
rename from drivers/gpu/drm/i915/i915_gem_fence_reg.c
rename to drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index d152b648c73c..94af75673a58 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -233,16 +233,9 @@ static int fence_update(struct i915_fence_reg *fence,
int ret;
if (vma) {
- if (!i915_vma_is_map_and_fenceable(vma))
- return -EINVAL;
-
- if (drm_WARN(&uncore->i915->drm,
- !i915_gem_object_get_stride(vma->obj) ||
- !i915_gem_object_get_tiling(vma->obj),
- "bogus fence setup with stride: 0x%x, tiling mode: %i\n",
- i915_gem_object_get_stride(vma->obj),
- i915_gem_object_get_tiling(vma->obj)))
- return -EINVAL;
+ GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
+ GEM_BUG_ON(!i915_gem_object_get_stride(vma->obj) ||
+ !i915_gem_object_get_tiling(vma->obj));
ret = i915_vma_sync(vma);
if (ret)
@@ -276,7 +269,7 @@ static int fence_update(struct i915_fence_reg *fence,
/*
* We only need to update the register itself if the device is awake.
* If the device is currently powered down, we will defer the write
- * to the runtime resume, see i915_gem_restore_fences().
+ * to the runtime resume, see intel_ggtt_restore_fences().
*
* This only works for removing the fence register, on acquisition
* the caller must hold the rpm wakeref. The fence register must
@@ -487,14 +480,14 @@ void i915_unreserve_fence(struct i915_fence_reg *fence)
}
/**
- * i915_gem_restore_fences - restore fence state
+ * intel_ggtt_restore_fences - restore fence state
* @ggtt: Global GTT
*
* Restore the hw fence state to match the software tracking again, to be called
* after a gpu reset and on resume. Note that on runtime suspend we only cancel
* the fences, to be reacquired by the user later.
*/
-void i915_gem_restore_fences(struct i915_ggtt *ggtt)
+void intel_ggtt_restore_fences(struct i915_ggtt *ggtt)
{
int i;
@@ -746,7 +739,7 @@ static void detect_bit_6_swizzle(struct i915_ggtt *ggtt)
* bit 17 of its physical address and therefore being interpreted differently
* by the GPU.
*/
-static void i915_gem_swizzle_page(struct page *page)
+static void swizzle_page(struct page *page)
{
char temp[64];
char *vaddr;
@@ -791,7 +784,7 @@ i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
for_each_sgt_page(page, sgt_iter, pages) {
char new_bit_17 = page_to_phys(page) >> 17;
if ((new_bit_17 & 0x1) != (test_bit(i, obj->bit_17) != 0)) {
- i915_gem_swizzle_page(page);
+ swizzle_page(page);
set_page_dirty(page);
}
i++;
@@ -836,7 +829,7 @@ i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
}
}
-void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
+void intel_ggtt_init_fences(struct i915_ggtt *ggtt)
{
struct drm_i915_private *i915 = ggtt->vm.i915;
struct intel_uncore *uncore = ggtt->vm.gt->uncore;
@@ -875,7 +868,7 @@ void i915_ggtt_init_fences(struct i915_ggtt *ggtt)
}
ggtt->num_fences = num_fences;
- i915_gem_restore_fences(ggtt);
+ intel_ggtt_restore_fences(ggtt);
}
void intel_gt_init_swizzling(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/i915_gem_fence_reg.h b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
similarity index 92%
rename from drivers/gpu/drm/i915/i915_gem_fence_reg.h
rename to drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
index 7bd521cd7cd7..3b3eb5bf1b75 100644
--- a/drivers/gpu/drm/i915/i915_gem_fence_reg.h
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
@@ -22,8 +22,8 @@
*
*/
-#ifndef __I915_FENCE_REG_H__
-#define __I915_FENCE_REG_H__
+#ifndef __INTEL_GGTT_FENCING_H__
+#define __INTEL_GGTT_FENCING_H__
#include <linux/list.h>
#include <linux/types.h>
@@ -53,18 +53,17 @@ struct i915_fence_reg {
bool dirty;
};
-/* i915_gem_fence_reg.c */
struct i915_fence_reg *i915_reserve_fence(struct i915_ggtt *ggtt);
void i915_unreserve_fence(struct i915_fence_reg *fence);
-void i915_gem_restore_fences(struct i915_ggtt *ggtt);
+void intel_ggtt_restore_fences(struct i915_ggtt *ggtt);
void i915_gem_object_do_bit_17_swizzle(struct drm_i915_gem_object *obj,
struct sg_table *pages);
void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
struct sg_table *pages);
-void i915_ggtt_init_fences(struct i915_ggtt *ggtt);
+void intel_ggtt_init_fences(struct i915_ggtt *ggtt);
void intel_gt_init_swizzling(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index b3116fe8d180..ce6ff9d3a350 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -26,7 +26,7 @@
#include <drm/drm_mm.h>
#include "gt/intel_reset.h"
-#include "i915_gem_fence_reg.h"
+#include "gt/intel_ggtt_fencing.h"
#include "i915_selftest.h"
#include "i915_vma_types.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 8b170c1876b3..9a15bdf31c7f 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -750,7 +750,7 @@ static int gt_reset(struct intel_gt *gt, intel_engine_mask_t stalled_mask)
for_each_engine(engine, gt, id)
__intel_engine_reset(engine, stalled_mask & engine->mask);
- i915_gem_restore_fences(gt->ggtt);
+ intel_ggtt_restore_fences(gt->ggtt);
return err;
}
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 8b13f091cee2..0d6d59871308 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -35,7 +35,7 @@
*/
#include "i915_drv.h"
-#include "i915_gem_fence_reg.h"
+#include "gt/intel_ggtt_fencing.h"
#include "gvt.h"
static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 82d9df15b22b..832140f4ea3d 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1288,7 +1288,7 @@ static int i915_drm_resume(struct drm_device *dev)
drm_err(&dev_priv->drm, "failed to re-enable GGTT\n");
i915_ggtt_resume(&dev_priv->ggtt);
- i915_gem_restore_fences(&dev_priv->ggtt);
+ intel_ggtt_restore_fences(&dev_priv->ggtt);
intel_csr_ucode_resume(dev_priv);
@@ -1606,7 +1606,7 @@ static int intel_runtime_suspend(struct device *kdev)
intel_gt_runtime_resume(&dev_priv->gt);
- i915_gem_restore_fences(&dev_priv->ggtt);
+ intel_ggtt_restore_fences(&dev_priv->ggtt);
enable_rpm_wakeref_asserts(rpm);
@@ -1687,7 +1687,7 @@ static int intel_runtime_resume(struct device *kdev)
* we can do is to hope that things will still work (and disable RPM).
*/
intel_gt_runtime_resume(&dev_priv->gt);
- i915_gem_restore_fences(&dev_priv->ggtt);
+ intel_ggtt_restore_fences(&dev_priv->ggtt);
/*
* On VLV/CHV display interrupts are part of the display
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1f5b9a584f71..ddd5b40cbbbc 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -92,7 +92,6 @@
#include "intel_wopcm.h"
#include "i915_gem.h"
-#include "i915_gem_fence_reg.h"
#include "i915_gem_gtt.h"
#include "i915_gpu_error.h"
#include "i915_perf_types.h"
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ca5420012a22..2c53be0bd9fd 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1156,7 +1156,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
/* Minimal basic recovery for KMS */
ret = i915_ggtt_enable_hw(dev_priv);
i915_ggtt_resume(&dev_priv->ggtt);
- i915_gem_restore_fences(&dev_priv->ggtt);
+ intel_ggtt_restore_fences(&dev_priv->ggtt);
intel_init_clock_gating(dev_priv);
}
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index e1ced1df13e1..2764c277326f 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -33,7 +33,6 @@
#include "gem/i915_gem_object.h"
#include "i915_gem_gtt.h"
-#include "i915_gem_fence_reg.h"
#include "i915_active.h"
#include "i915_request.h"
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index 623759b73bb4..7ea517a21e0b 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -125,7 +125,7 @@ static void pm_resume(struct drm_i915_private *i915)
*/
with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
i915_ggtt_resume(&i915->ggtt);
- i915_gem_restore_fences(&i915->ggtt);
+ intel_ggtt_restore_fences(&i915->ggtt);
i915_gem_resume(i915);
}
--
2.20.1
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [CI 2/4] drm/i915/gt: Pull restoration of GGTT fences underneath the GT
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
@ 2020-03-16 11:38 ` Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 3/4] drm/i915: Remove manual save/resume of fence register state Chris Wilson
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2020-03-16 11:38 UTC (permalink / raw)
To: intel-gfx
Make the GT responsible for restoring its fence when it wakes up from
suspend.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 ++
drivers/gpu/drm/i915/gt/intel_gt_pm.c | 1 +
drivers/gpu/drm/i915/i915_drv.c | 4 ----
drivers/gpu/drm/i915/i915_gem.c | 1 -
drivers/gpu/drm/i915/selftests/i915_gem.c | 2 --
5 files changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index a7b72fa569a7..bde4f64a41f7 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -1195,6 +1195,8 @@ void i915_ggtt_resume(struct i915_ggtt *ggtt)
if (INTEL_GEN(ggtt->vm.i915) >= 8)
setup_private_pat(ggtt->vm.gt->uncore);
+
+ intel_ggtt_restore_fences(ggtt);
}
static struct scatterlist *
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index 8b653c0f5e5f..2e40400d1ecd 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -324,6 +324,7 @@ int intel_gt_runtime_resume(struct intel_gt *gt)
{
GT_TRACE(gt, "\n");
intel_gt_init_swizzling(gt);
+ intel_ggtt_restore_fences(gt->ggtt);
return intel_uc_runtime_resume(>->uc);
}
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 832140f4ea3d..48ba37e35bea 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1288,7 +1288,6 @@ static int i915_drm_resume(struct drm_device *dev)
drm_err(&dev_priv->drm, "failed to re-enable GGTT\n");
i915_ggtt_resume(&dev_priv->ggtt);
- intel_ggtt_restore_fences(&dev_priv->ggtt);
intel_csr_ucode_resume(dev_priv);
@@ -1606,8 +1605,6 @@ static int intel_runtime_suspend(struct device *kdev)
intel_gt_runtime_resume(&dev_priv->gt);
- intel_ggtt_restore_fences(&dev_priv->ggtt);
-
enable_rpm_wakeref_asserts(rpm);
return ret;
@@ -1687,7 +1684,6 @@ static int intel_runtime_resume(struct device *kdev)
* we can do is to hope that things will still work (and disable RPM).
*/
intel_gt_runtime_resume(&dev_priv->gt);
- intel_ggtt_restore_fences(&dev_priv->ggtt);
/*
* On VLV/CHV display interrupts are part of the display
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2c53be0bd9fd..762b50b08d73 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1156,7 +1156,6 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
/* Minimal basic recovery for KMS */
ret = i915_ggtt_enable_hw(dev_priv);
i915_ggtt_resume(&dev_priv->ggtt);
- intel_ggtt_restore_fences(&dev_priv->ggtt);
intel_init_clock_gating(dev_priv);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem.c b/drivers/gpu/drm/i915/selftests/i915_gem.c
index 7ea517a21e0b..88d400b9df88 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem.c
@@ -125,8 +125,6 @@ static void pm_resume(struct drm_i915_private *i915)
*/
with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
i915_ggtt_resume(&i915->ggtt);
- intel_ggtt_restore_fences(&i915->ggtt);
-
i915_gem_resume(i915);
}
}
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [CI 3/4] drm/i915: Remove manual save/resume of fence register state
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 2/4] drm/i915/gt: Pull restoration of GGTT fences underneath the GT Chris Wilson
@ 2020-03-16 11:38 ` Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 4/4] drm/i915/gt: Allocate i915_fence_reg array Chris Wilson
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2020-03-16 11:38 UTC (permalink / raw)
To: intel-gfx
Since we always reload the fence register state on runtime resume,
having it explicitly in the S0ix resume code is redundant. Indeed, it
is not even being used!
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ddd5b40cbbbc..a7ea1d855359 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -539,7 +539,6 @@ struct i915_suspend_saved_registers {
u32 saveSWF0[16];
u32 saveSWF1[16];
u32 saveSWF3[3];
- u64 saveFENCE[I915_MAX_NUM_FENCES];
u32 savePCH_PORT_HOTPLUG;
u16 saveGCDGMBUS;
};
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] [CI 4/4] drm/i915/gt: Allocate i915_fence_reg array
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 2/4] drm/i915/gt: Pull restoration of GGTT fences underneath the GT Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 3/4] drm/i915: Remove manual save/resume of fence register state Chris Wilson
@ 2020-03-16 11:38 ` Chris Wilson
2020-03-16 19:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/ Patchwork
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Chris Wilson @ 2020-03-16 11:38 UTC (permalink / raw)
To: intel-gfx
Since the number of fence regs can vary dramactically between platforms,
allocate the array on demand so we don't waste as much space.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 ++++--
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 10 ++++++++++
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h | 1 +
drivers/gpu/drm/i915/gt/intel_gtt.h | 5 +++--
drivers/gpu/drm/i915/i915_vma.h | 1 +
5 files changed, 19 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index bde4f64a41f7..8fcf14372d7a 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -698,11 +698,13 @@ static void ggtt_cleanup_hw(struct i915_ggtt *ggtt)
*/
void i915_ggtt_driver_release(struct drm_i915_private *i915)
{
+ struct i915_ggtt *ggtt = &i915->ggtt;
struct pagevec *pvec;
- fini_aliasing_ppgtt(&i915->ggtt);
+ fini_aliasing_ppgtt(ggtt);
- ggtt_cleanup_hw(&i915->ggtt);
+ intel_ggtt_fini_fences(ggtt);
+ ggtt_cleanup_hw(ggtt);
pvec = &i915->mm.wc_stash.pvec;
if (pvec->nr) {
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index 94af75673a58..b6ba68c42546 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -857,6 +857,11 @@ void intel_ggtt_init_fences(struct i915_ggtt *ggtt)
if (intel_vgpu_active(i915))
num_fences = intel_uncore_read(uncore,
vgtif_reg(avail_rs.fence_num));
+ ggtt->fence_regs = kcalloc(num_fences,
+ sizeof(*ggtt->fence_regs),
+ GFP_KERNEL);
+ if (!ggtt->fence_regs)
+ num_fences = 0;
/* Initialize fence registers to zero */
for (i = 0; i < num_fences; i++) {
@@ -871,6 +876,11 @@ void intel_ggtt_init_fences(struct i915_ggtt *ggtt)
intel_ggtt_restore_fences(ggtt);
}
+void intel_ggtt_fini_fences(struct i915_ggtt *ggtt)
+{
+ kfree(ggtt->fence_regs);
+}
+
void intel_gt_init_swizzling(struct intel_gt *gt)
{
struct drm_i915_private *i915 = gt->i915;
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
index 3b3eb5bf1b75..9850f6a85d2a 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h
@@ -64,6 +64,7 @@ void i915_gem_object_save_bit_17_swizzle(struct drm_i915_gem_object *obj,
struct sg_table *pages);
void intel_ggtt_init_fences(struct i915_ggtt *ggtt);
+void intel_ggtt_fini_fences(struct i915_ggtt *ggtt);
void intel_gt_init_swizzling(struct intel_gt *gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h b/drivers/gpu/drm/i915/gt/intel_gtt.h
index ce6ff9d3a350..d93ebdf3fa0e 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -26,7 +26,6 @@
#include <drm/drm_mm.h>
#include "gt/intel_reset.h"
-#include "gt/intel_ggtt_fencing.h"
#include "i915_selftest.h"
#include "i915_vma_types.h"
@@ -135,6 +134,8 @@ typedef u64 gen8_pte_t;
#define GEN8_PDE_IPS_64K BIT(11)
#define GEN8_PDE_PS_2M BIT(7)
+struct i915_fence_reg;
+
#define for_each_sgt_daddr(__dp, __iter, __sgt) \
__for_each_sgt_daddr(__dp, __iter, __sgt, I915_GTT_PAGE_SIZE)
@@ -333,7 +334,7 @@ struct i915_ggtt {
u32 pin_bias;
unsigned int num_fences;
- struct i915_fence_reg fence_regs[I915_MAX_NUM_FENCES];
+ struct i915_fence_reg *fence_regs;
struct list_head fence_list;
/**
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 2764c277326f..b958ad07f212 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -30,6 +30,7 @@
#include <drm/drm_mm.h>
+#include "gt/intel_ggtt_fencing.h"
#include "gem/i915_gem_object.h"
#include "i915_gem_gtt.h"
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
` (2 preceding siblings ...)
2020-03-16 11:38 ` [Intel-gfx] [CI 4/4] drm/i915/gt: Allocate i915_fence_reg array Chris Wilson
@ 2020-03-16 19:37 ` Patchwork
2020-03-16 19:55 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-03-16 19:37 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
URL : https://patchwork.freedesktop.org/series/74738/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
24d226d21d96 drm/i915: Move GGTT fence registers under gt/
-:47: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#47:
rename from drivers/gpu/drm/i915/i915_gem_fence_reg.c
total: 0 errors, 1 warnings, 0 checks, 205 lines checked
d4f53935c4b1 drm/i915/gt: Pull restoration of GGTT fences underneath the GT
44619e18bb07 drm/i915: Remove manual save/resume of fence register state
03a2376f90fc drm/i915/gt: Allocate i915_fence_reg array
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
` (3 preceding siblings ...)
2020-03-16 19:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/ Patchwork
@ 2020-03-16 19:55 ` Patchwork
2020-03-16 20:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-17 4:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-03-16 19:55 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
URL : https://patchwork.freedesktop.org/series/74738/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
Error: Cannot open file ./drivers/gpu/drm/i915/i915_gem_fence_reg.c
Error: Cannot open file ./drivers/gpu/drm/i915/i915_gem_fence_reg.c
Error: Cannot open file ./drivers/gpu/drm/i915/i915_gem_fence_reg.c
Error: Cannot open file ./drivers/gpu/drm/i915/i915_gem_fence_reg.c
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -internal ./drivers/gpu/drm/i915/i915_gem_fence_reg.c' failed with return code 2
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -function fence register handling ./drivers/gpu/drm/i915/i915_gem_fence_reg.c' failed with return code 1
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -function tiling swizzling details ./drivers/gpu/drm/i915/i915_gem_fence_reg.c' failed with return code 1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
` (4 preceding siblings ...)
2020-03-16 19:55 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
@ 2020-03-16 20:02 ` Patchwork
2020-03-17 4:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-03-16 20:02 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
URL : https://patchwork.freedesktop.org/series/74738/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8137 -> Patchwork_16977
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/index.html
Known issues
------------
Here are the changes found in Patchwork_16977 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-skl-6700k2: [PASS][1] -> [INCOMPLETE][2] ([i915#69])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/fi-skl-6700k2/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/fi-skl-6700k2/igt@gem_exec_suspend@basic-s3.html
* igt@i915_selftest@live@gem_contexts:
- fi-cml-s: [PASS][3] -> [DMESG-FAIL][4] ([i915#877])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/fi-cml-s/igt@i915_selftest@live@gem_contexts.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/fi-cml-s/igt@i915_selftest@live@gem_contexts.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-tgl-y: [FAIL][5] ([CI#94]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/fi-tgl-y/igt@gem_exec_suspend@basic-s4-devices.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [FAIL][7] ([i915#217]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
- fi-kbl-7500u: [FAIL][9] ([i915#323]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
Participating hosts (48 -> 44)
------------------------------
Additional (2): fi-skl-6770hq fi-tgl-dsi
Missing (6): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-cfl-8700k fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8137 -> Patchwork_16977
CI-20190529: 20190529
CI_DRM_8137: 5786b5e77cc17a1b494b9bdf3c3f29eedc2e2e7d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5510: e100092d50105463f58db531fa953c70cc58bb10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16977: 03a2376f90fc4cac76b7918c3f92593348ff2e5e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
03a2376f90fc drm/i915/gt: Allocate i915_fence_reg array
44619e18bb07 drm/i915: Remove manual save/resume of fence register state
d4f53935c4b1 drm/i915/gt: Pull restoration of GGTT fences underneath the GT
24d226d21d96 drm/i915: Move GGTT fence registers under gt/
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
` (5 preceding siblings ...)
2020-03-16 20:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-03-17 4:34 ` Patchwork
6 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2020-03-17 4:34 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/
URL : https://patchwork.freedesktop.org/series/74738/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8137_full -> Patchwork_16977_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_16977_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16977_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_16977_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_parallel@bcs0-fds:
- shard-kbl: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-kbl7/igt@gem_exec_parallel@bcs0-fds.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-kbl1/igt@gem_exec_parallel@bcs0-fds.html
* igt@gem_linear_blits@interruptible:
- shard-apl: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl8/igt@gem_linear_blits@interruptible.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl1/igt@gem_linear_blits@interruptible.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@sysfs_preempt_timeout@timeout@rcs0}:
- shard-skl: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl5/igt@sysfs_preempt_timeout@timeout@rcs0.html
New tests
---------
New tests have been introduced between CI_DRM_8137_full and Patchwork_16977_full:
### New IGT tests (2) ###
* igt@sysfs_preempt_timeout@idempotent:
- Statuses :
- Exec time: [None] s
* igt@sysfs_timeslice_duration@timeout:
- Statuses :
- Exec time: [None] s
Known issues
------------
Here are the changes found in Patchwork_16977_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_persistence@close-replace-race:
- shard-glk: [PASS][6] -> [INCOMPLETE][7] ([i915#1402] / [i915#58] / [k.org#198133])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-glk3/igt@gem_ctx_persistence@close-replace-race.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-glk3/igt@gem_ctx_persistence@close-replace-race.html
* igt@gem_exec_schedule@implicit-both-bsd1:
- shard-iclb: [PASS][8] -> [SKIP][9] ([fdo#109276] / [i915#677]) +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb4/igt@gem_exec_schedule@implicit-both-bsd1.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb6/igt@gem_exec_schedule@implicit-both-bsd1.html
* igt@gem_exec_schedule@pi-userfault-bsd:
- shard-iclb: [PASS][10] -> [SKIP][11] ([i915#677])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb7/igt@gem_exec_schedule@pi-userfault-bsd.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb2/igt@gem_exec_schedule@pi-userfault-bsd.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][12] -> [SKIP][13] ([fdo#112146]) +6 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@i915_pm_backlight@fade_with_suspend:
- shard-skl: [PASS][14] -> [INCOMPLETE][15] ([i915#69])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl2/igt@i915_pm_backlight@fade_with_suspend.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl4/igt@i915_pm_backlight@fade_with_suspend.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][16] -> [FAIL][17] ([i915#454])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb8/igt@i915_pm_dc@dc6-psr.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rps@reset:
- shard-iclb: [PASS][18] -> [FAIL][19] ([i915#413])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb5/igt@i915_pm_rps@reset.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb6/igt@i915_pm_rps@reset.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-snb: [PASS][20] -> [SKIP][21] ([fdo#109271]) +1 similar issue
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-snb5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-snb5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-glk: [PASS][22] -> [FAIL][23] ([i915#72])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-glk4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-kbl: [PASS][24] -> [DMESG-WARN][25] ([i915#180]) +3 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-apl: [PASS][26] -> [DMESG-WARN][27] ([i915#180]) +2 similar issues
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl3/igt@kms_hdr@bpc-switch-suspend.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl4/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_cursor@pipe-b-overlay-size-64:
- shard-apl: [PASS][28] -> [INCOMPLETE][29] ([fdo#103927])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl3/igt@kms_plane_cursor@pipe-b-overlay-size-64.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl6/igt@kms_plane_cursor@pipe-b-overlay-size-64.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][30] -> [SKIP][31] ([fdo#109441]) +2 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][32] -> [FAIL][33] ([i915#31])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl2/igt@kms_setmode@basic.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl3/igt@kms_setmode@basic.html
- shard-glk: [PASS][34] -> [FAIL][35] ([i915#31])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-glk2/igt@kms_setmode@basic.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-glk4/igt@kms_setmode@basic.html
- shard-kbl: [PASS][36] -> [FAIL][37] ([i915#31])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-kbl7/igt@kms_setmode@basic.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-kbl7/igt@kms_setmode@basic.html
* igt@perf@short-reads:
- shard-kbl: [PASS][38] -> [FAIL][39] ([i915#51])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-kbl4/igt@perf@short-reads.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-kbl4/igt@perf@short-reads.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [PASS][40] -> [SKIP][41] ([fdo#112080]) +14 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb8/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][42] -> [SKIP][43] ([fdo#109276]) +23 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_exec_parallel@bcs0-fds:
- shard-apl: [FAIL][44] -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl6/igt@gem_exec_parallel@bcs0-fds.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl2/igt@gem_exec_parallel@bcs0-fds.html
- shard-tglb: [FAIL][46] -> [PASS][47]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-tglb3/igt@gem_exec_parallel@bcs0-fds.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-tglb2/igt@gem_exec_parallel@bcs0-fds.html
- shard-glk: [FAIL][48] -> [PASS][49]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-glk8/igt@gem_exec_parallel@bcs0-fds.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-glk1/igt@gem_exec_parallel@bcs0-fds.html
* igt@gem_exec_schedule@implicit-read-write-bsd2:
- shard-iclb: [SKIP][50] ([fdo#109276] / [i915#677]) -> [PASS][51] +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb8/igt@gem_exec_schedule@implicit-read-write-bsd2.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb2/igt@gem_exec_schedule@implicit-read-write-bsd2.html
* igt@gem_exec_schedule@pi-distinct-iova-bsd:
- shard-iclb: [SKIP][52] ([i915#677]) -> [PASS][53] +3 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb1/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb5/igt@gem_exec_schedule@pi-distinct-iova-bsd.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][54] ([fdo#109276]) -> [PASS][55] +21 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb8/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb4/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [SKIP][56] ([fdo#112146]) -> [PASS][57] +6 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb8/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-hsw: [DMESG-WARN][58] ([fdo#111870]) -> [PASS][59]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw7/igt@gem_userptr_blits@dmabuf-unsync.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw1/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-kbl: [DMESG-WARN][60] ([i915#180]) -> [PASS][61] +2 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-kbl2/igt@gem_workarounds@suspend-resume-fd.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-kbl3/igt@gem_workarounds@suspend-resume-fd.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [DMESG-WARN][62] ([i915#716]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl3/igt@gen9_exec_parse@allowed-single.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl1/igt@gen9_exec_parse@allowed-single.html
* igt@i915_selftest@live@execlists:
- shard-skl: [INCOMPLETE][64] ([i915#656]) -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl3/igt@i915_selftest@live@execlists.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl6/igt@i915_selftest@live@execlists.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [FAIL][66] ([i915#72]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-glk1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-glk9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled:
- shard-skl: [FAIL][68] ([fdo#108145] / [i915#177] / [i915#52] / [i915#54]) -> [PASS][69]
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl7/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-untiled.html
* igt@kms_flip@flip-vs-suspend:
- shard-apl: [DMESG-WARN][70] ([i915#180]) -> [PASS][71]
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl6/igt@kms_flip@flip-vs-suspend.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl2/igt@kms_flip@flip-vs-suspend.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][72] ([fdo#108145]) -> [PASS][73]
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [SKIP][74] ([fdo#109441]) -> [PASS][75] +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb8/igt@kms_psr@psr2_no_drrs.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
* igt@kms_setmode@basic:
- shard-skl: [FAIL][76] ([i915#31]) -> [PASS][77]
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl9/igt@kms_setmode@basic.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl10/igt@kms_setmode@basic.html
* igt@perf_pmu@busy-vcs1:
- shard-iclb: [SKIP][78] ([fdo#112080]) -> [PASS][79] +16 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-iclb6/igt@perf_pmu@busy-vcs1.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-iclb1/igt@perf_pmu@busy-vcs1.html
* {igt@sysfs_heartbeat_interval@precise@rcs0}:
- shard-skl: [FAIL][80] -> [PASS][81] +1 similar issue
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-skl4/igt@sysfs_heartbeat_interval@precise@rcs0.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-skl5/igt@sysfs_heartbeat_interval@precise@rcs0.html
#### Warnings ####
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: [SKIP][82] ([i915#468]) -> [FAIL][83] ([i915#454])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-tglb2/igt@i915_pm_dc@dc6-dpms.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-tglb6/igt@i915_pm_dc@dc6-dpms.html
* igt@runner@aborted:
- shard-hsw: ([FAIL][84], [FAIL][85], [FAIL][86], [FAIL][87], [FAIL][88], [FAIL][89], [FAIL][90], [FAIL][91]) ([fdo#111870]) -> ([FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99], [FAIL][100]) ([fdo#111870] / [i915#478])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw7/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw6/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw6/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw2/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw1/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw5/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw5/igt@runner@aborted.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-hsw2/igt@runner@aborted.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw6/igt@runner@aborted.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw1/igt@runner@aborted.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw4/igt@runner@aborted.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw4/igt@runner@aborted.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw1/igt@runner@aborted.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw1/igt@runner@aborted.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw1/igt@runner@aborted.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw5/igt@runner@aborted.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-hsw2/igt@runner@aborted.html
- shard-apl: ([FAIL][101], [FAIL][102]) ([fdo#103927] / [i915#1402]) -> [FAIL][103] ([i915#1402])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl3/igt@runner@aborted.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8137/shard-apl1/igt@runner@aborted.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/shard-apl7/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[i915#1402]: https://gitlab.freedesktop.org/drm/intel/issues/1402
[i915#177]: https://gitlab.freedesktop.org/drm/intel/issues/177
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#31]: https://gitlab.freedesktop.org/drm/intel/issues/31
[i915#413]: https://gitlab.freedesktop.org/drm/intel/issues/413
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#468]: https://gitlab.freedesktop.org/drm/intel/issues/468
[i915#478]: https://gitlab.freedesktop.org/drm/intel/issues/478
[i915#51]: https://gitlab.freedesktop.org/drm/intel/issues/51
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#58]: https://gitlab.freedesktop.org/drm/intel/issues/58
[i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
[i915#677]: https://gitlab.freedesktop.org/drm/intel/issues/677
[i915#69]: https://gitlab.freedesktop.org/drm/intel/issues/69
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
[k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_8137 -> Patchwork_16977
CI-20190529: 20190529
CI_DRM_8137: 5786b5e77cc17a1b494b9bdf3c3f29eedc2e2e7d @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5510: e100092d50105463f58db531fa953c70cc58bb10 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16977: 03a2376f90fc4cac76b7918c3f92593348ff2e5e @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16977/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-03-17 4:34 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-03-16 11:38 [Intel-gfx] [CI 1/4] drm/i915: Move GGTT fence registers under gt/ Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 2/4] drm/i915/gt: Pull restoration of GGTT fences underneath the GT Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 3/4] drm/i915: Remove manual save/resume of fence register state Chris Wilson
2020-03-16 11:38 ` [Intel-gfx] [CI 4/4] drm/i915/gt: Allocate i915_fence_reg array Chris Wilson
2020-03-16 19:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/4] drm/i915: Move GGTT fence registers under gt/ Patchwork
2020-03-16 19:55 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-03-16 20:02 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-17 4:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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