Hi Swathi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip next-20200518]
[cannot apply to v5.7-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]

url:    https://github.com/0day-ci/linux/commits/Swathi-Dhanavanthri/drm-i915-ehl-Extend-w-a-14010685332-to-JSP-MCC/20200519-184947
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-allyesconfig (attached as .config)
compiler: clang version 11.0.0 (https://github.com/llvm/llvm-project 135b877874fae96b4372c8a3fbfaa8ff44ff86e3)
reproduce:
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # install x86_64 cross compiling tool for clang build
        # apt-get install binutils-x86-64-linux-gnu
        # save the attached .config to linux build tree
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kbuild test robot <lkp@intel.com>

All warnings (new ones prefixed by >>, old ones prefixed by <<):

>> drivers/gpu/drm/i915/i915_irq.c:2906:42: warning: converting the enum constant to a boolean [-Wint-in-bool-context]
if (INTEL_PCH_TYPE(dev_priv) == PCH_ICP || PCH_JSP || PCH_MCC) {
^
drivers/gpu/drm/i915/i915_irq.c:2906:53: warning: converting the enum constant to a boolean [-Wint-in-bool-context]
if (INTEL_PCH_TYPE(dev_priv) == PCH_ICP || PCH_JSP || PCH_MCC) {
^
2 warnings generated.

vim +2906 drivers/gpu/drm/i915/i915_irq.c

  2867	
  2868	static void gen11_display_irq_reset(struct drm_i915_private *dev_priv)
  2869	{
  2870		struct intel_uncore *uncore = &dev_priv->uncore;
  2871		enum pipe pipe;
  2872	
  2873		intel_uncore_write(uncore, GEN11_DISPLAY_INT_CTL, 0);
  2874	
  2875		if (INTEL_GEN(dev_priv) >= 12) {
  2876			enum transcoder trans;
  2877	
  2878			for (trans = TRANSCODER_A; trans <= TRANSCODER_D; trans++) {
  2879				enum intel_display_power_domain domain;
  2880	
  2881				domain = POWER_DOMAIN_TRANSCODER(trans);
  2882				if (!intel_display_power_is_enabled(dev_priv, domain))
  2883					continue;
  2884	
  2885				intel_uncore_write(uncore, TRANS_PSR_IMR(trans), 0xffffffff);
  2886				intel_uncore_write(uncore, TRANS_PSR_IIR(trans), 0xffffffff);
  2887			}
  2888		} else {
  2889			intel_uncore_write(uncore, EDP_PSR_IMR, 0xffffffff);
  2890			intel_uncore_write(uncore, EDP_PSR_IIR, 0xffffffff);
  2891		}
  2892	
  2893		for_each_pipe(dev_priv, pipe)
  2894			if (intel_display_power_is_enabled(dev_priv,
  2895							   POWER_DOMAIN_PIPE(pipe)))
  2896				GEN8_IRQ_RESET_NDX(uncore, DE_PIPE, pipe);
  2897	
  2898		GEN3_IRQ_RESET(uncore, GEN8_DE_PORT_);
  2899		GEN3_IRQ_RESET(uncore, GEN8_DE_MISC_);
  2900		GEN3_IRQ_RESET(uncore, GEN11_DE_HPD_);
  2901	
  2902		if (INTEL_PCH_TYPE(dev_priv) >= PCH_ICP)
  2903			GEN3_IRQ_RESET(uncore, SDE);
  2904	
  2905		/* Wa_14010685332:icl,jsl,ehl */
> 2906		if (INTEL_PCH_TYPE(dev_priv) == PCH_ICP || PCH_JSP || PCH_MCC) {
  2907			intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
  2908					 SBCLK_RUN_REFCLK_DIS, SBCLK_RUN_REFCLK_DIS);
  2909			intel_uncore_rmw(uncore, SOUTH_CHICKEN1,
  2910					 SBCLK_RUN_REFCLK_DIS, 0);
  2911		}
  2912	}
  2913	

---
0-DAY CI Kernel Test Service, Intel Corporation
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