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From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH] drm/i915/gt: Immediately check for ACK after submission
Date: Thu, 21 May 2020 13:28:51 +0100	[thread overview]
Message-ID: <20200521122851.20256-1-chris@chris-wilson.co.uk> (raw)

In an extreme case this may reduce the ACK latency by handling the
immediate HW response from a ready engine. That reduction in latency
should not actually impact any submission latency since on the direct
submit path we try and clear any pending interrupts first. On the
indirect reprioritisation or timeslicing paths, latency is not the
primary concern as the HW is still executing and will remain so until we
are able to preempt it (i.e. no reduction in effective pipeline stalls).

Still this may help mitigate the loss of softirq, which is a huge
concern.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/1874
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index de5be57ed6d2..df77ed2a0a53 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -2528,7 +2528,7 @@ gen8_csb_parse(const struct intel_engine_execlists *execlists, const u32 *csb)
 	return *csb & (GEN8_CTX_STATUS_IDLE_ACTIVE | GEN8_CTX_STATUS_PREEMPTED);
 }
 
-static void process_csb(struct intel_engine_cs *engine)
+static bool process_csb(struct intel_engine_cs *engine)
 {
 	struct intel_engine_execlists * const execlists = &engine->execlists;
 	const u32 * const buf = execlists->csb_status;
@@ -2557,7 +2557,7 @@ static void process_csb(struct intel_engine_cs *engine)
 	head = execlists->csb_head;
 	tail = READ_ONCE(*execlists->csb_write);
 	if (unlikely(head == tail))
-		return;
+		return false;
 
 	/*
 	 * Hopefully paired with a wmb() in HW!
@@ -2692,6 +2692,7 @@ static void process_csb(struct intel_engine_cs *engine)
 	 * invalidation before.
 	 */
 	invalidate_csb_entries(&buf[0], &buf[num_entries - 1]);
+	return true;
 }
 
 static void __execlists_submission_tasklet(struct intel_engine_cs *const engine)
@@ -3116,9 +3117,11 @@ static void execlists_submission_tasklet(unsigned long data)
 	if (!READ_ONCE(engine->execlists.pending[0]) || timeout) {
 		unsigned long flags;
 
-		spin_lock_irqsave(&engine->active.lock, flags);
-		__execlists_submission_tasklet(engine);
-		spin_unlock_irqrestore(&engine->active.lock, flags);
+		do {
+			spin_lock_irqsave(&engine->active.lock, flags);
+			__execlists_submission_tasklet(engine);
+			spin_unlock_irqrestore(&engine->active.lock, flags);
+		} while (process_csb(engine));
 
 		/* Recheck after serialising with direct-submission */
 		if (unlikely(timeout && preempt_timeout(engine)))
-- 
2.20.1

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             reply	other threads:[~2020-05-21 12:29 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-21 12:28 Chris Wilson [this message]
2020-05-21 13:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Immediately check for ACK after submission Patchwork
2020-05-22  6:21 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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