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* [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup
@ 2020-07-16 17:20 Ville Syrjala
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Ville Syrjala
                   ` (17 more replies)
  0 siblings, 18 replies; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

I started by splitting Alexei's SKL PCI ID fix into
logical chunks, and then ocd kicked in a bit...

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>

Alexei Podtelezhnikov (4):
  drm/i915: Update Haswell PCI IDs
  drm/i915: Reclassify SKL 0x192a as GT3
  drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
  drm/i915: Add SKL GT1.5 PCI IDs

Ville Syrjälä (10):
  drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
  drm/i915: Ocd the HSW PCI ID hex numbers
  drm/i915: Sort HSW PCI IDs
  drm/i915: Sort SKL PCI IDs
  drm/i915: Sort KBL PCI IDs
  drm/i915: Sort CML PCI IDs
  drm/i915: Sort CFL PCI IDs
  drm/i915: Sort CNL PCI IDs
  drm/i915: Sort ICL PCI IDs
  drm/i915: Sort EHL/JSL PCI IDs

 include/drm/i915_pciids.h | 141 +++++++++++++++++++-------------------
 1 file changed, 72 insertions(+), 69 deletions(-)

-- 
2.26.2

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^ permalink raw reply	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-09-23 23:46   ` Srivatsa, Anusha
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 02/14] drm/i915: Reclassify SKL 0x192a as GT3 Ville Syrjala
                   ` (16 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Alexei Podtelezhnikov <apodtele@gmail.com>

Reclassify 0x0426 as GT3 (GT2+) according to specifications and the second
least significant digit.

Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
[vsyrjala: s/GT2/GT3/ in the comment]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 8e7ae30ebcbb..51831c6f603c 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -221,7 +221,6 @@
 	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
 
@@ -246,6 +245,7 @@
 	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
 	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
+	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
 
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 02/14] drm/i915: Reclassify SKL 0x192a as GT3
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT Ville Syrjala
                   ` (15 subsequent siblings)
  17 siblings, 0 replies; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Alexei Podtelezhnikov <apodtele@gmail.com>

Reclassify 0x192A according to specifications. Of note, the
second to last digit seems to correspond to GT#.

Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
[vsyrjala: Split separate changes into separate patches]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 51831c6f603c..d4c054e3b95f 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -363,6 +363,7 @@
 	INTEL_SKL_ULT_GT3_IDS(info), \
 	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
+	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
 	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
 	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
 
@@ -370,7 +371,6 @@
 	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
 	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
 	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
-	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT4 */ \
 	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
 
 #define INTEL_SKL_IDS(info)	 \
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Ville Syrjala
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 02/14] drm/i915: Reclassify SKL 0x192a as GT3 Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-09-24  0:32   ` Srivatsa, Anusha
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Ville Syrjala
                   ` (14 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Alexei Podtelezhnikov <apodtele@gmail.com>

Reclassify 0x1923, 0x1927 according to specifications. Of note,
the second to last digit seems to correspond to GT#.

Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
[vsyrjala: Split separate changes into separate patches,
           Sort the IDs]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index d4c054e3b95f..9df3697f074d 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -357,12 +357,12 @@
 	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
 
 #define INTEL_SKL_ULT_GT3_IDS(info) \
-	INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */
+	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
+	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
+	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3 */
 
 #define INTEL_SKL_GT3_IDS(info) \
 	INTEL_SKL_ULT_GT3_IDS(info), \
-	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
 	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
 	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
 	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (2 preceding siblings ...)
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-09-24  0:37   ` Srivatsa, Anusha
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments Ville Syrjala
                   ` (13 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Alexei Podtelezhnikov <apodtele@gmail.com>

Add three new devices 0x1913, 0x1915, and 0x1917 also known as
iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15.

Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
[vsyrjala: Split separate changes into separate patchs,
           Sort the IDs]
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 9df3697f074d..c906088ccffe 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -329,17 +329,20 @@
 	INTEL_VGA_DEVICE(0x22b3, info)
 
 #define INTEL_SKL_ULT_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
+	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
+	INTEL_VGA_DEVICE(0x1913, info)  /* ULT GT1.5 */
 
 #define INTEL_SKL_ULX_GT1_IDS(info) \
-	INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
+	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
+	INTEL_VGA_DEVICE(0x1915, info)  /* ULX GT1.5 */
 
 #define INTEL_SKL_GT1_IDS(info)	\
 	INTEL_SKL_ULT_GT1_IDS(info), \
 	INTEL_SKL_ULX_GT1_IDS(info), \
 	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
 	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
-	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
+	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
+	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
 
 #define INTEL_SKL_ULT_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (3 preceding siblings ...)
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-09-24  0:40   ` Srivatsa, Anusha
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers Ville Syrjala
                   ` (12 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Bunch of the SKL SKUs currently documented as GT3/4 seem to actually
be GT3e/4e. Fix up the comments.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index c906088ccffe..3792ab5f20ff 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -361,19 +361,19 @@
 
 #define INTEL_SKL_ULT_GT3_IDS(info) \
 	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
-	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3 */
+	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3e */ \
+	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3e */
 
 #define INTEL_SKL_GT3_IDS(info) \
 	INTEL_SKL_ULT_GT3_IDS(info), \
 	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
-	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
-	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
+	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3e */ \
+	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3e */
 
 #define INTEL_SKL_GT4_IDS(info) \
 	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
-	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
-	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
+	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
+	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \
 	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
 
 #define INTEL_SKL_IDS(info)	 \
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (4 preceding siblings ...)
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-09-24  0:42   ` Srivatsa, Anusha
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs Ville Syrjala
                   ` (11 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Most of the HSW PCI IDs are upper case hex numbers, but a
few are lower case. Make it consistent so these don't
stick out like a sore thumb.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 3792ab5f20ff..026db4d496e9 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -181,7 +181,7 @@
 	INTEL_HSW_ULT_GT1_IDS(info), \
 	INTEL_HSW_ULX_GT1_IDS(info), \
 	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
-	INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
+	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
 	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
@@ -209,7 +209,7 @@
 	INTEL_HSW_ULT_GT2_IDS(info), \
 	INTEL_HSW_ULX_GT2_IDS(info), \
 	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
-	INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
+	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
 	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
@@ -234,7 +234,7 @@
 #define INTEL_HSW_GT3_IDS(info) \
 	INTEL_HSW_ULT_GT3_IDS(info), \
 	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
-	INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
+	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
 	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (5 preceding siblings ...)
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers Ville Syrjala
@ 2020-07-16 17:20 ` Ville Syrjala
  2020-09-24  0:44   ` Srivatsa, Anusha
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Ville Syrjala
                   ` (10 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:20 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the HSW PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 026db4d496e9..4870c3c9f9b2 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -170,9 +170,9 @@
 
 #define INTEL_HSW_ULT_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
-	INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0A06, info)  /* ULT GT1 mobile */
+	INTEL_VGA_DEVICE(0x0A0B, info)  /* ULT GT1 reserved */
 
 #define INTEL_HSW_ULX_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
@@ -181,26 +181,26 @@
 	INTEL_HSW_ULT_GT1_IDS(info), \
 	INTEL_HSW_ULX_GT1_IDS(info), \
 	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
 	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
 	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
 	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
 	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
+	INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */	\
 	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
 	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
-	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
-	INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */
+	INTEL_VGA_DEVICE(0x0D0E, info)  /* CRW GT1 reserved */
 
 #define INTEL_HSW_ULT_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */	\
 	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
-	INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0A16, info)  /* ULT GT2 mobile */
+	INTEL_VGA_DEVICE(0x0A1B, info)  /* ULT GT2 reserved */ \
 
 #define INTEL_HSW_ULX_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
@@ -209,45 +209,45 @@
 	INTEL_HSW_ULT_GT2_IDS(info), \
 	INTEL_HSW_ULX_GT2_IDS(info), \
 	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
 	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
 	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
 	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
+	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
 	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
 	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
-	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
-	INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
+	INTEL_VGA_DEVICE(0x0D1E, info)  /* CRW GT2 reserved */
 
 #define INTEL_HSW_ULT_GT3_IDS(info) \
 	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
 	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
 
 #define INTEL_HSW_GT3_IDS(info) \
 	INTEL_HSW_ULT_GT3_IDS(info), \
 	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
 	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
 	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
 	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
+	INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
 	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
 	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
-	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
-	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
+	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */
 
 #define INTEL_HSW_IDS(info) \
 	INTEL_HSW_GT1_IDS(info), \
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (6 preceding siblings ...)
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  0:49   ` Srivatsa, Anusha
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL " Ville Syrjala
                   ` (9 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the SKL PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 4870c3c9f9b2..5185ac789038 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -340,8 +340,8 @@
 	INTEL_SKL_ULT_GT1_IDS(info), \
 	INTEL_SKL_ULX_GT1_IDS(info), \
 	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
-	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
 	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
+	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
 	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
 
 #define INTEL_SKL_ULT_GT2_IDS(info) \
@@ -355,8 +355,8 @@
 	INTEL_SKL_ULT_GT2_IDS(info), \
 	INTEL_SKL_ULX_GT2_IDS(info), \
 	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
-	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
 	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
+	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
 	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
 
 #define INTEL_SKL_ULT_GT3_IDS(info) \
@@ -372,9 +372,9 @@
 
 #define INTEL_SKL_GT4_IDS(info) \
 	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
+	INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
 	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
-	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \
-	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
+	INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
 
 #define INTEL_SKL_IDS(info)	 \
 	INTEL_SKL_GT1_IDS(info), \
-- 
2.26.2

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (7 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  0:50   ` Srivatsa, Anusha
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML " Ville Syrjala
                   ` (8 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the KBL PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 5185ac789038..db409171d9c3 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -406,8 +406,8 @@
 	INTEL_KBL_ULX_GT1_IDS(info), \
 	INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
 	INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
-	INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
-	INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
+	INTEL_VGA_DEVICE(0x590A, info), /* SRV GT1 */ \
+	INTEL_VGA_DEVICE(0x590B, info) /* Halo GT1 */
 
 #define INTEL_KBL_ULT_GT2_IDS(info) \
 	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
@@ -419,10 +419,10 @@
 #define INTEL_KBL_GT2_IDS(info)	\
 	INTEL_KBL_ULT_GT2_IDS(info), \
 	INTEL_KBL_ULX_GT2_IDS(info), \
-	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
 	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
-	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
+	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
 	INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
+	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
 	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
 
 #define INTEL_KBL_ULT_GT3_IDS(info) \
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (8 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL " Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  0:53   ` Srivatsa, Anusha
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL " Ville Syrjala
                   ` (7 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the CML PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index db409171d9c3..2d36cbce0ac0 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -447,10 +447,10 @@
 
 /* CML GT1 */
 #define INTEL_CML_GT1_IDS(info)	\
-	INTEL_VGA_DEVICE(0x9BA5, info), \
-	INTEL_VGA_DEVICE(0x9BA8, info), \
+	INTEL_VGA_DEVICE(0x9BA2, info), \
 	INTEL_VGA_DEVICE(0x9BA4, info), \
-	INTEL_VGA_DEVICE(0x9BA2, info)
+	INTEL_VGA_DEVICE(0x9BA5, info), \
+	INTEL_VGA_DEVICE(0x9BA8, info)
 
 #define INTEL_CML_U_GT1_IDS(info) \
 	INTEL_VGA_DEVICE(0x9B21, info), \
@@ -459,11 +459,11 @@
 
 /* CML GT2 */
 #define INTEL_CML_GT2_IDS(info)	\
-	INTEL_VGA_DEVICE(0x9BC5, info), \
-	INTEL_VGA_DEVICE(0x9BC8, info), \
-	INTEL_VGA_DEVICE(0x9BC4, info), \
 	INTEL_VGA_DEVICE(0x9BC2, info), \
+	INTEL_VGA_DEVICE(0x9BC4, info), \
+	INTEL_VGA_DEVICE(0x9BC5, info), \
 	INTEL_VGA_DEVICE(0x9BC6, info), \
+	INTEL_VGA_DEVICE(0x9BC8, info), \
 	INTEL_VGA_DEVICE(0x9BE6, info), \
 	INTEL_VGA_DEVICE(0x9BF6, info)
 
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (9 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML " Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  0:55   ` Srivatsa, Anusha
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL " Ville Syrjala
                   ` (6 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the CFL PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 2d36cbce0ac0..c48c2b76aa7d 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -497,8 +497,8 @@
 	INTEL_VGA_DEVICE(0x3E9C, info)
 
 #define INTEL_CFL_H_GT2_IDS(info) \
-	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
-	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
+	INTEL_VGA_DEVICE(0x3E94, info),  /* Halo GT2 */ \
+	INTEL_VGA_DEVICE(0x3E9B, info) /* Halo GT2 */
 
 /* CFL U GT2 */
 #define INTEL_CFL_U_GT2_IDS(info) \
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (10 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL " Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  0:59   ` Srivatsa, Anusha
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Ville Syrjala
                   ` (5 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the CNL PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index c48c2b76aa7d..33a72e6eadd8 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -543,23 +543,23 @@
 
 /* CNL */
 #define INTEL_CNL_PORT_F_IDS(info) \
-	INTEL_VGA_DEVICE(0x5A54, info), \
-	INTEL_VGA_DEVICE(0x5A5C, info), \
 	INTEL_VGA_DEVICE(0x5A44, info), \
-	INTEL_VGA_DEVICE(0x5A4C, info)
+	INTEL_VGA_DEVICE(0x5A4C, info), \
+	INTEL_VGA_DEVICE(0x5A54, info), \
+	INTEL_VGA_DEVICE(0x5A5C, info)
 
 #define INTEL_CNL_IDS(info) \
 	INTEL_CNL_PORT_F_IDS(info), \
-	INTEL_VGA_DEVICE(0x5A51, info), \
-	INTEL_VGA_DEVICE(0x5A59, info), \
+	INTEL_VGA_DEVICE(0x5A40, info), \
 	INTEL_VGA_DEVICE(0x5A41, info), \
-	INTEL_VGA_DEVICE(0x5A49, info), \
-	INTEL_VGA_DEVICE(0x5A52, info), \
-	INTEL_VGA_DEVICE(0x5A5A, info), \
 	INTEL_VGA_DEVICE(0x5A42, info), \
+	INTEL_VGA_DEVICE(0x5A49, info), \
 	INTEL_VGA_DEVICE(0x5A4A, info), \
 	INTEL_VGA_DEVICE(0x5A50, info), \
-	INTEL_VGA_DEVICE(0x5A40, info)
+	INTEL_VGA_DEVICE(0x5A51, info), \
+	INTEL_VGA_DEVICE(0x5A52, info), \
+	INTEL_VGA_DEVICE(0x5A59, info), \
+	INTEL_VGA_DEVICE(0x5A5A, info)
 
 /* ICL */
 #define INTEL_ICL_PORT_F_IDS(info) \
-- 
2.26.2

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (11 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL " Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  1:01   ` Srivatsa, Anusha
  2020-10-23 23:55   ` Lucas De Marchi
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL " Ville Syrjala
                   ` (4 subsequent siblings)
  17 siblings, 2 replies; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the ICL PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 33a72e6eadd8..45da1b45c01e 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -564,18 +564,18 @@
 /* ICL */
 #define INTEL_ICL_PORT_F_IDS(info) \
 	INTEL_VGA_DEVICE(0x8A50, info), \
-	INTEL_VGA_DEVICE(0x8A5C, info), \
-	INTEL_VGA_DEVICE(0x8A59, info),	\
-	INTEL_VGA_DEVICE(0x8A58, info),	\
 	INTEL_VGA_DEVICE(0x8A52, info), \
+	INTEL_VGA_DEVICE(0x8A53, info), \
+	INTEL_VGA_DEVICE(0x8A54, info), \
+	INTEL_VGA_DEVICE(0x8A56, info), \
+	INTEL_VGA_DEVICE(0x8A57, info), \
+	INTEL_VGA_DEVICE(0x8A58, info),	\
+	INTEL_VGA_DEVICE(0x8A59, info),	\
 	INTEL_VGA_DEVICE(0x8A5A, info), \
 	INTEL_VGA_DEVICE(0x8A5B, info), \
-	INTEL_VGA_DEVICE(0x8A57, info), \
-	INTEL_VGA_DEVICE(0x8A56, info), \
-	INTEL_VGA_DEVICE(0x8A71, info), \
+	INTEL_VGA_DEVICE(0x8A5C, info), \
 	INTEL_VGA_DEVICE(0x8A70, info), \
-	INTEL_VGA_DEVICE(0x8A53, info), \
-	INTEL_VGA_DEVICE(0x8A54, info)
+	INTEL_VGA_DEVICE(0x8A71, info)
 
 #define INTEL_ICL_11_IDS(info) \
 	INTEL_ICL_PORT_F_IDS(info), \
-- 
2.26.2

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL PCI IDs
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (12 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Ville Syrjala
@ 2020-07-16 17:21 ` Ville Syrjala
  2020-09-24  1:04   ` Srivatsa, Anusha
  2020-07-16 18:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: PCI ID cleanup Patchwork
                   ` (3 subsequent siblings)
  17 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjala @ 2020-07-16 17:21 UTC (permalink / raw)
  To: intel-gfx

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Sort the EHL/JSL PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 include/drm/i915_pciids.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 45da1b45c01e..880ffe8571e8 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -585,16 +585,16 @@
 /* EHL/JSL */
 #define INTEL_EHL_IDS(info) \
 	INTEL_VGA_DEVICE(0x4500, info),	\
-	INTEL_VGA_DEVICE(0x4571, info), \
-	INTEL_VGA_DEVICE(0x4551, info), \
 	INTEL_VGA_DEVICE(0x4541, info), \
-	INTEL_VGA_DEVICE(0x4E71, info), \
-	INTEL_VGA_DEVICE(0x4557, info), \
+	INTEL_VGA_DEVICE(0x4551, info), \
 	INTEL_VGA_DEVICE(0x4555, info), \
-	INTEL_VGA_DEVICE(0x4E61, info), \
-	INTEL_VGA_DEVICE(0x4E57, info), \
+	INTEL_VGA_DEVICE(0x4557, info), \
+	INTEL_VGA_DEVICE(0x4571, info), \
+	INTEL_VGA_DEVICE(0x4E51, info), \
 	INTEL_VGA_DEVICE(0x4E55, info), \
-	INTEL_VGA_DEVICE(0x4E51, info)
+	INTEL_VGA_DEVICE(0x4E57, info), \
+	INTEL_VGA_DEVICE(0x4E61, info), \
+	INTEL_VGA_DEVICE(0x4E71, info)
 
 /* TGL */
 #define INTEL_TGL_12_IDS(info) \
-- 
2.26.2

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^ permalink raw reply related	[flat|nested] 36+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: PCI ID cleanup
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (13 preceding siblings ...)
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL " Ville Syrjala
@ 2020-07-16 18:25 ` Patchwork
  2020-07-16 18:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
                   ` (2 subsequent siblings)
  17 siblings, 0 replies; 36+ messages in thread
From: Patchwork @ 2020-07-16 18:25 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: PCI ID cleanup
URL   : https://patchwork.freedesktop.org/series/79561/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.0
Fast mode used, each commit won't be checked separately.


_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: PCI ID cleanup
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (14 preceding siblings ...)
  2020-07-16 18:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: PCI ID cleanup Patchwork
@ 2020-07-16 18:46 ` Patchwork
  2020-07-16 19:51 ` [Intel-gfx] [PATCH 00/14] " Alexei Podtelezhnikov
  2020-07-16 23:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
  17 siblings, 0 replies; 36+ messages in thread
From: Patchwork @ 2020-07-16 18:46 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 6015 bytes --]

== Series Details ==

Series: drm/i915: PCI ID cleanup
URL   : https://patchwork.freedesktop.org/series/79561/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_8757 -> Patchwork_18192
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/index.html

Known issues
------------

  Here are the changes found in Patchwork_18192 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-tgl-u2:          [PASS][1] -> [FAIL][2] ([i915#1888])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence:
    - fi-tgl-u2:          [PASS][3] -> [DMESG-WARN][4] ([i915#402])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-tgl-u2/igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence.html

  * igt@vgem_basic@setversion:
    - fi-tgl-y:           [PASS][5] -> [DMESG-WARN][6] ([i915#402]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-y/igt@vgem_basic@setversion.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-tgl-y/igt@vgem_basic@setversion.html

  
#### Possible fixes ####

  * igt@i915_module_load@reload:
    - fi-tgl-u2:          [DMESG-WARN][7] ([i915#402]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-u2/igt@i915_module_load@reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-tgl-u2/igt@i915_module_load@reload.html
    - fi-icl-y:           [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-icl-y/igt@i915_module_load@reload.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-icl-y/igt@i915_module_load@reload.html

  * igt@i915_pm_rpm@module-reload:
    - fi-cml-s:           [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-cml-s/igt@i915_pm_rpm@module-reload.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-cml-s/igt@i915_pm_rpm@module-reload.html

  * igt@kms_busy@basic@flip:
    - fi-tgl-y:           [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-y/igt@kms_busy@basic@flip.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-tgl-y/igt@kms_busy@basic@flip.html

  * igt@prime_self_import@basic-with_two_bos:
    - fi-tgl-y:           [DMESG-WARN][15] ([i915#402]) -> [PASS][16] +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html

  
#### Warnings ####

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-kbl-x1275:       [DMESG-WARN][17] ([i915#62] / [i915#92]) -> [DMESG-WARN][18] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-kbl-x1275/igt@kms_force_connector_basic@force-connector-state.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-kbl-x1275:       [DMESG-WARN][19] ([i915#1982] / [i915#62] / [i915#92]) -> [DMESG-WARN][20] ([i915#62] / [i915#92])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
  [i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (45 -> 40)
------------------------------

  Missing    (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper 


Build changes
-------------

  * Linux: CI_DRM_8757 -> Patchwork_18192

  CI-20190529: 20190529
  CI_DRM_8757: 6802049b80a49f5f45c2bc2dd3e6d189204dc2bb @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5738: bc8b56fe177af34fbde7b96f1f66614a0014c6ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18192: e65cc9c4b7954706e66eaef7e8d093304a181512 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

e65cc9c4b795 drm/i915: Sort EHL/JSL PCI IDs
329d44540132 drm/i915: Sort ICL PCI IDs
aff97f798802 drm/i915: Sort CNL PCI IDs
76cfb7577a2d drm/i915: Sort CFL PCI IDs
c4c8ec039a4b drm/i915: Sort CML PCI IDs
4cb1c89ee008 drm/i915: Sort KBL PCI IDs
fcad728f0c92 drm/i915: Sort SKL PCI IDs
c09d231222bd drm/i915: Sort HSW PCI IDs
5ed2b4221ffd drm/i915: Ocd the HSW PCI ID hex numbers
bee506d94b72 drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
345f9ef4bf23 drm/i915: Add SKL GT1.5 PCI IDs
ce652760cc0e drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
62d97091362e drm/i915: Reclassify SKL 0x192a as GT3
1c76bbe03444 drm/i915: Update Haswell PCI IDs

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/index.html

[-- Attachment #1.2: Type: text/html, Size: 7733 bytes --]

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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (15 preceding siblings ...)
  2020-07-16 18:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-07-16 19:51 ` Alexei Podtelezhnikov
  2020-07-16 23:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork
  17 siblings, 0 replies; 36+ messages in thread
From: Alexei Podtelezhnikov @ 2020-07-16 19:51 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 1047 bytes --]



> I started by splitting Alexei's SKL PCI ID fix into
> logical chunks, and then ocd kicked in a bit...

Thank you for picking it up. Please do not forget https://lists.freedesktop.org/archives/intel-gfx/2020-April/237944.html

Alexei

> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> 
> Alexei Podtelezhnikov (4):
>  drm/i915: Update Haswell PCI IDs
>  drm/i915: Reclassify SKL 0x192a as GT3
>  drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
>  drm/i915: Add SKL GT1.5 PCI IDs
> 
> Ville Syrjälä (10):
>  drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
>  drm/i915: Ocd the HSW PCI ID hex numbers
>  drm/i915: Sort HSW PCI IDs
>  drm/i915: Sort SKL PCI IDs
>  drm/i915: Sort KBL PCI IDs
>  drm/i915: Sort CML PCI IDs
>  drm/i915: Sort CFL PCI IDs
>  drm/i915: Sort CNL PCI IDs
>  drm/i915: Sort ICL PCI IDs
>  drm/i915: Sort EHL/JSL PCI IDs
> 
> include/drm/i915_pciids.h | 141 +++++++++++++++++++-------------------
> 1 file changed, 72 insertions(+), 69 deletions(-)
> 
> -- 
> 2.26.2
> 

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_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: PCI ID cleanup
  2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
                   ` (16 preceding siblings ...)
  2020-07-16 19:51 ` [Intel-gfx] [PATCH 00/14] " Alexei Podtelezhnikov
@ 2020-07-16 23:11 ` Patchwork
  17 siblings, 0 replies; 36+ messages in thread
From: Patchwork @ 2020-07-16 23:11 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx


[-- Attachment #1.1: Type: text/plain, Size: 15746 bytes --]

== Series Details ==

Series: drm/i915: PCI ID cleanup
URL   : https://patchwork.freedesktop.org/series/79561/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_8757_full -> Patchwork_18192_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_18192_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_18192_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_18192_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_suspend@sysfs-reader:
    - shard-skl:          [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl2/igt@i915_suspend@sysfs-reader.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl10/igt@i915_suspend@sysfs-reader.html

  
Known issues
------------

  Here are the changes found in Patchwork_18192_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_balancer@bonded-early:
    - shard-kbl:          [PASS][3] -> [FAIL][4] ([i915#2079])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl3/igt@gem_exec_balancer@bonded-early.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-kbl2/igt@gem_exec_balancer@bonded-early.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-0:
    - shard-glk:          [PASS][5] -> [DMESG-FAIL][6] ([i915#118] / [i915#95]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk2/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-glk8/igt@kms_big_fb@x-tiled-64bpp-rotate-0.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +8 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl6/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
    - shard-apl:          [PASS][9] -> [DMESG-WARN][10] ([i915#1635] / [i915#1982])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl8/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-apl2/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#79]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@plain-flip-fb-recreate@b-edp1:
    - shard-skl:          [PASS][13] -> [FAIL][14] ([i915#2122])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl4/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
    - shard-tglb:         [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-skl:          [PASS][17] -> [INCOMPLETE][18] ([i915#123])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl6/igt@kms_frontbuffer_tracking@psr-suspend.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl4/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([fdo#108145] / [i915#265]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109642] / [fdo#111068])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-iclb5/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_vblank@crtc-id:
    - shard-skl:          [PASS][25] -> [DMESG-WARN][26] ([i915#1982]) +4 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl3/igt@kms_vblank@crtc-id.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl9/igt@kms_vblank@crtc-id.html

  * igt@perf@polling-parameterized:
    - shard-tglb:         [PASS][27] -> [FAIL][28] ([i915#1542])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb5/igt@perf@polling-parameterized.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-tglb7/igt@perf@polling-parameterized.html

  * igt@perf@polling-small-buf:
    - shard-skl:          [PASS][29] -> [FAIL][30] ([i915#1722])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl5/igt@perf@polling-small-buf.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl1/igt@perf@polling-small-buf.html

  * igt@perf_pmu@semaphore-busy@rcs0:
    - shard-kbl:          [PASS][31] -> [FAIL][32] ([i915#1820])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl7/igt@perf_pmu@semaphore-busy@rcs0.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-kbl2/igt@perf_pmu@semaphore-busy@rcs0.html

  * igt@vgem_slow@nohang:
    - shard-tglb:         [PASS][33] -> [DMESG-WARN][34] ([i915#402])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb6/igt@vgem_slow@nohang.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-tglb1/igt@vgem_slow@nohang.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@processes:
    - shard-skl:          [FAIL][35] ([i915#1528]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl1/igt@gem_ctx_persistence@processes.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl4/igt@gem_ctx_persistence@processes.html

  * igt@gem_userptr_blits@invalid-mmap-offset-unsync@gtt:
    - shard-tglb:         [INCOMPLETE][37] ([i915#2119] / [i915#2149]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb7/igt@gem_userptr_blits@invalid-mmap-offset-unsync@gtt.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-tglb6/igt@gem_userptr_blits@invalid-mmap-offset-unsync@gtt.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-skl:          [INCOMPLETE][39] -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl10/igt@gem_workarounds@suspend-resume-fd.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl2/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_module_load@reload:
    - shard-tglb:         [DMESG-WARN][41] ([i915#402]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb6/igt@i915_module_load@reload.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-tglb7/igt@i915_module_load@reload.html

  * igt@kms_color@pipe-c-ctm-0-25:
    - shard-skl:          [DMESG-WARN][43] ([i915#1982]) -> [PASS][44] +3 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl1/igt@kms_color@pipe-c-ctm-0-25.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl3/igt@kms_color@pipe-c-ctm-0-25.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen:
    - shard-skl:          [FAIL][45] ([i915#54]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl3/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html

  * igt@kms_flip@flip-vs-expired-vblank@a-edp1:
    - shard-skl:          [FAIL][47] ([i915#79]) -> [PASS][48] +1 similar issue
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl1/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
    - shard-skl:          [INCOMPLETE][49] ([i915#198]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl9/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html

  * igt@kms_flip_tiling@flip-changes-tiling-yf:
    - shard-kbl:          [DMESG-WARN][51] ([i915#1982]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl6/igt@kms_flip_tiling@flip-changes-tiling-yf.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-kbl4/igt@kms_flip_tiling@flip-changes-tiling-yf.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +7 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-tglb:         [DMESG-WARN][55] ([i915#1982]) -> [PASS][56] +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-tglb3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [FAIL][57] ([fdo#108145] / [i915#265]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [SKIP][59] ([fdo#109441]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb8/igt@kms_psr@psr2_basic.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-iclb2/igt@kms_psr@psr2_basic.html

  * igt@kms_vblank@pipe-c-wait-busy-hang:
    - shard-apl:          [DMESG-WARN][61] ([i915#1635] / [i915#1982]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl1/igt@kms_vblank@pipe-c-wait-busy-hang.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-apl4/igt@kms_vblank@pipe-c-wait-busy-hang.html

  
#### Warnings ####

  * igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
    - shard-apl:          [DMESG-FAIL][63] ([fdo#108145] / [i915#1635] / [i915#1982]) -> [FAIL][64] ([fdo#108145] / [i915#1635] / [i915#265])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-apl7/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html

  * igt@runner@aborted:
    - shard-apl:          ([FAIL][65], [FAIL][66], [FAIL][67], [FAIL][68]) ([i915#1610] / [i915#1635] / [i915#2110]) -> [FAIL][69] ([i915#1635] / [i915#2110])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl1/igt@runner@aborted.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl8/igt@runner@aborted.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl3/igt@runner@aborted.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl7/igt@runner@aborted.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/shard-apl2/igt@runner@aborted.html

  
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#123]: https://gitlab.freedesktop.org/drm/intel/issues/123
  [i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
  [i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
  [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1820]: https://gitlab.freedesktop.org/drm/intel/issues/1820
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2079]: https://gitlab.freedesktop.org/drm/intel/issues/2079
  [i915#2110]: https://gitlab.freedesktop.org/drm/intel/issues/2110
  [i915#2119]: https://gitlab.freedesktop.org/drm/intel/issues/2119
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2149]: https://gitlab.freedesktop.org/drm/intel/issues/2149
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
  [i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
  [i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_8757 -> Patchwork_18192

  CI-20190529: 20190529
  CI_DRM_8757: 6802049b80a49f5f45c2bc2dd3e6d189204dc2bb @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5738: bc8b56fe177af34fbde7b96f1f66614a0014c6ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_18192: e65cc9c4b7954706e66eaef7e8d093304a181512 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18192/index.html

[-- Attachment #1.2: Type: text/html, Size: 18618 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Ville Syrjala
@ 2020-09-23 23:46   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-23 23:46 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs
> 
> From: Alexei Podtelezhnikov <apodtele@gmail.com>
> 
> Reclassify 0x0426 as GT3 (GT2+) according to specifications and the second
> least significant digit.
> 
> Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
> [vsyrjala: s/GT2/GT3/ in the comment]
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 8e7ae30ebcbb..51831c6f603c 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -221,7 +221,6 @@
>  	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
> -	INTEL_VGA_DEVICE(0x0426, info), /* GT2 mobile */ \
>  	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
>  	INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
> 
> @@ -246,6 +245,7 @@
>  	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
>  	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
> +	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
> 
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT Ville Syrjala
@ 2020-09-24  0:32   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:32 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and
> 0x1927 as ULT
> 
> From: Alexei Podtelezhnikov <apodtele@gmail.com>
> 
> Reclassify 0x1923, 0x1927 according to specifications. Of note, the second to
> last digit seems to correspond to GT#.

IMO we don’t need to specify the above.

> Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
> [vsyrjala: Split separate changes into separate patches,
>            Sort the IDs]
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  include/drm/i915_pciids.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> d4c054e3b95f..9df3697f074d 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -357,12 +357,12 @@
>  	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
> 
>  #define INTEL_SKL_ULT_GT3_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1926, info) /* ULT GT3 */
> +	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
> +	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
> +	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3 */
> 
>  #define INTEL_SKL_GT3_IDS(info) \
>  	INTEL_SKL_ULT_GT3_IDS(info), \
> -	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x1927, info), /* ULT GT3 */ \
>  	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
>  	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
>  	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Ville Syrjala
@ 2020-09-24  0:37   ` Srivatsa, Anusha
  2020-09-24 10:46     ` Ville Syrjälä
  0 siblings, 1 reply; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:37 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
> 
> From: Alexei Podtelezhnikov <apodtele@gmail.com>
> 
> Add three new devices 0x1913, 0x1915, and 0x1917 also known as
> iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15.
> 
> Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
> [vsyrjala: Split separate changes into separate patchs,
>            Sort the IDs]
The above comment appears in every patch. If this is v2 of the patches then it goes right after the commit message as:

 V2: Split separate changes into separate patches, sort the IDs (Ville)
 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
The code changes itself look good.

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 9 ++++++---
>  1 file changed, 6 insertions(+), 3 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 9df3697f074d..c906088ccffe 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -329,17 +329,20 @@
>  	INTEL_VGA_DEVICE(0x22b3, info)
> 
>  #define INTEL_SKL_ULT_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
> +	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
> +	INTEL_VGA_DEVICE(0x1913, info)  /* ULT GT1.5 */
> 
>  #define INTEL_SKL_ULX_GT1_IDS(info) \
> -	INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
> +	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
> +	INTEL_VGA_DEVICE(0x1915, info)  /* ULX GT1.5 */
> 
>  #define INTEL_SKL_GT1_IDS(info)	\
>  	INTEL_SKL_ULT_GT1_IDS(info), \
>  	INTEL_SKL_ULX_GT1_IDS(info), \
>  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
>  	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> -	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
> +	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> +	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> 
>  #define INTEL_SKL_ULT_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments Ville Syrjala
@ 2020-09-24  0:40   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:40 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs.
> GT3e/4e comments
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Bunch of the SKL SKUs currently documented as GT3/4 seem to actually be
> GT3e/4e. Fix up the comments.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> c906088ccffe..3792ab5f20ff 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -361,19 +361,19 @@
> 
>  #define INTEL_SKL_ULT_GT3_IDS(info) \
>  	INTEL_VGA_DEVICE(0x1923, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3 */ \
> -	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3 */
> +	INTEL_VGA_DEVICE(0x1926, info), /* ULT GT3e */ \
> +	INTEL_VGA_DEVICE(0x1927, info)  /* ULT GT3e */
> 
>  #define INTEL_SKL_GT3_IDS(info) \
>  	INTEL_SKL_ULT_GT3_IDS(info), \
>  	INTEL_VGA_DEVICE(0x192A, info), /* SRV GT3 */ \
> -	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3 */ \
> -	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3 */
> +	INTEL_VGA_DEVICE(0x192B, info), /* Halo GT3e */ \
> +	INTEL_VGA_DEVICE(0x192D, info)  /* SRV GT3e */
> 
>  #define INTEL_SKL_GT4_IDS(info) \
>  	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
> -	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4 */ \
> -	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4 */ \
> +	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
> +	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \
>  	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
> 
>  #define INTEL_SKL_IDS(info)	 \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers Ville Syrjala
@ 2020-09-24  0:42   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:42 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex
> numbers
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Most of the HSW PCI IDs are upper case hex numbers, but a few are lower
> case. Make it consistent so these don't stick out like a sore thumb.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 3792ab5f20ff..026db4d496e9 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -181,7 +181,7 @@
>  	INTEL_HSW_ULT_GT1_IDS(info), \
>  	INTEL_HSW_ULX_GT1_IDS(info), \
>  	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
> -	INTEL_VGA_DEVICE(0x040a, info), /* GT1 server */ \
> +	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
>  	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
>  	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \ @@ -
> 209,7 +209,7 @@
>  	INTEL_HSW_ULT_GT2_IDS(info), \
>  	INTEL_HSW_ULX_GT2_IDS(info), \
>  	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
> -	INTEL_VGA_DEVICE(0x041a, info), /* GT2 server */ \
> +	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
>  	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \ @@ -
> 234,7 +234,7 @@  #define INTEL_HSW_GT3_IDS(info) \
>  	INTEL_HSW_ULT_GT3_IDS(info), \
>  	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
> -	INTEL_VGA_DEVICE(0x042a, info), /* GT3 server */ \
> +	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
>  	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs
  2020-07-16 17:20 ` [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs Ville Syrjala
@ 2020-09-24  0:44   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:44 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx


> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the HSW PCI IDs numerically. Some order seems better than
> randomness.

I think the sorting, OCD-ness with hex and reclassifying can be combined in one patch.

Anusha 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  include/drm/i915_pciids.h | 34 +++++++++++++++++-----------------
>  1 file changed, 17 insertions(+), 17 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 026db4d496e9..4870c3c9f9b2 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -170,9 +170,9 @@
> 
>  #define INTEL_HSW_ULT_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
> +	INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
>  	INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
> -	INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0A06, info)  /* ULT GT1 mobile */
> +	INTEL_VGA_DEVICE(0x0A0B, info)  /* ULT GT1 reserved */
> 
>  #define INTEL_HSW_ULX_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */ @@ -181,26
> +181,26 @@
>  	INTEL_HSW_ULT_GT1_IDS(info), \
>  	INTEL_HSW_ULX_GT1_IDS(info), \
>  	INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
> +	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
>  	INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
>  	INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
>  	INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
> +	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
>  	INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
>  	INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
>  	INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
> +	INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */	\
>  	INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
>  	INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
> -	INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
> -	INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
> -	INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */
> +	INTEL_VGA_DEVICE(0x0D0E, info)  /* CRW GT1 reserved */
> 
>  #define INTEL_HSW_ULT_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
> +	INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */	\
>  	INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
> -	INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0A16, info)  /* ULT GT2 mobile */
> +	INTEL_VGA_DEVICE(0x0A1B, info)  /* ULT GT2 reserved */ \
> 
>  #define INTEL_HSW_ULX_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \ @@ -
> 209,45 +209,45 @@
>  	INTEL_HSW_ULT_GT2_IDS(info), \
>  	INTEL_HSW_ULX_GT2_IDS(info), \
>  	INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
> +	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
>  	INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
>  	INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
> +	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
>  	INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
>  	INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
>  	INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
> +	INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
>  	INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
>  	INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
> -	INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
> -	INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
> -	INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
> +	INTEL_VGA_DEVICE(0x0D1E, info)  /* CRW GT2 reserved */
> 
>  #define INTEL_HSW_ULT_GT3_IDS(info) \
>  	INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
> +	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
>  	INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
> 
>  #define INTEL_HSW_GT3_IDS(info) \
>  	INTEL_HSW_ULT_GT3_IDS(info), \
>  	INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
> +	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
>  	INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
> +	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
>  	INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
>  	INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
> +	INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
>  	INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
>  	INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
> -	INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
> -	INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
> -	INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
> +	INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */
> 
>  #define INTEL_HSW_IDS(info) \
>  	INTEL_HSW_GT1_IDS(info), \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Ville Syrjala
@ 2020-09-24  0:49   ` Srivatsa, Anusha
  2020-09-24 10:50     ` Ville Syrjälä
  0 siblings, 1 reply; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:49 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the SKL PCI IDs numerically. Some order seems better than
> randomness.

There are 2 patches - patch 2 and 3 in the series that are reclassifying some PCI IDs  and there is patch 4 that adds a missing ID. All of those with this patch can be combined to a single patch OR patch 2, 3 and 4 can be squashed as one solitary patch.

Anusha 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  include/drm/i915_pciids.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 4870c3c9f9b2..5185ac789038 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -340,8 +340,8 @@
>  	INTEL_SKL_ULT_GT1_IDS(info), \
>  	INTEL_SKL_ULX_GT1_IDS(info), \
>  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> -	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
>  	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> +	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
>  	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> 
>  #define INTEL_SKL_ULT_GT2_IDS(info) \
> @@ -355,8 +355,8 @@
>  	INTEL_SKL_ULT_GT2_IDS(info), \
>  	INTEL_SKL_ULX_GT2_IDS(info), \
>  	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
> -	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
> +	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
> 
>  #define INTEL_SKL_ULT_GT3_IDS(info) \
> @@ -372,9 +372,9 @@
> 
>  #define INTEL_SKL_GT4_IDS(info) \
>  	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
> +	INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
>  	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
> -	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \
> -	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
> +	INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
> 
>  #define INTEL_SKL_IDS(info)	 \
>  	INTEL_SKL_GT1_IDS(info), \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL " Ville Syrjala
@ 2020-09-24  0:50   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:50 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the KBL PCI IDs numerically. Some order seems better than
> randomness.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 5185ac789038..db409171d9c3 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -406,8 +406,8 @@
>  	INTEL_KBL_ULX_GT1_IDS(info), \
>  	INTEL_VGA_DEVICE(0x5902, info), /* DT  GT1 */ \
>  	INTEL_VGA_DEVICE(0x5908, info), /* Halo GT1 */ \
> -	INTEL_VGA_DEVICE(0x590B, info), /* Halo GT1 */ \
> -	INTEL_VGA_DEVICE(0x590A, info) /* SRV GT1 */
> +	INTEL_VGA_DEVICE(0x590A, info), /* SRV GT1 */ \
> +	INTEL_VGA_DEVICE(0x590B, info) /* Halo GT1 */
> 
>  #define INTEL_KBL_ULT_GT2_IDS(info) \
>  	INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \ @@ -419,10
> +419,10 @@
>  #define INTEL_KBL_GT2_IDS(info)	\
>  	INTEL_KBL_ULT_GT2_IDS(info), \
>  	INTEL_KBL_ULX_GT2_IDS(info), \
> -	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
>  	INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
> -	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
> +	INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
>  	INTEL_VGA_DEVICE(0x591A, info), /* SRV GT2 */ \
> +	INTEL_VGA_DEVICE(0x591B, info), /* Halo GT2 */ \
>  	INTEL_VGA_DEVICE(0x591D, info) /* WKS GT2 */
> 
>  #define INTEL_KBL_ULT_GT3_IDS(info) \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML " Ville Syrjala
@ 2020-09-24  0:53   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:53 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the CML PCI IDs numerically. Some order seems better than
> randomness.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> db409171d9c3..2d36cbce0ac0 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -447,10 +447,10 @@
> 
>  /* CML GT1 */
>  #define INTEL_CML_GT1_IDS(info)	\
> -	INTEL_VGA_DEVICE(0x9BA5, info), \
> -	INTEL_VGA_DEVICE(0x9BA8, info), \
> +	INTEL_VGA_DEVICE(0x9BA2, info), \
>  	INTEL_VGA_DEVICE(0x9BA4, info), \
> -	INTEL_VGA_DEVICE(0x9BA2, info)
> +	INTEL_VGA_DEVICE(0x9BA5, info), \
> +	INTEL_VGA_DEVICE(0x9BA8, info)
> 
>  #define INTEL_CML_U_GT1_IDS(info) \
>  	INTEL_VGA_DEVICE(0x9B21, info), \
> @@ -459,11 +459,11 @@
> 
>  /* CML GT2 */
>  #define INTEL_CML_GT2_IDS(info)	\
> -	INTEL_VGA_DEVICE(0x9BC5, info), \
> -	INTEL_VGA_DEVICE(0x9BC8, info), \
> -	INTEL_VGA_DEVICE(0x9BC4, info), \
>  	INTEL_VGA_DEVICE(0x9BC2, info), \
> +	INTEL_VGA_DEVICE(0x9BC4, info), \
> +	INTEL_VGA_DEVICE(0x9BC5, info), \
>  	INTEL_VGA_DEVICE(0x9BC6, info), \
> +	INTEL_VGA_DEVICE(0x9BC8, info), \
>  	INTEL_VGA_DEVICE(0x9BE6, info), \
>  	INTEL_VGA_DEVICE(0x9BF6, info)
> 
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL " Ville Syrjala
@ 2020-09-24  0:55   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:55 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the CFL PCI IDs numerically. Some order seems better than
> randomness.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 2d36cbce0ac0..c48c2b76aa7d 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -497,8 +497,8 @@
>  	INTEL_VGA_DEVICE(0x3E9C, info)
> 
>  #define INTEL_CFL_H_GT2_IDS(info) \
> -	INTEL_VGA_DEVICE(0x3E9B, info), /* Halo GT2 */ \
> -	INTEL_VGA_DEVICE(0x3E94, info)  /* Halo GT2 */
> +	INTEL_VGA_DEVICE(0x3E94, info),  /* Halo GT2 */ \
> +	INTEL_VGA_DEVICE(0x3E9B, info) /* Halo GT2 */
> 
>  /* CFL U GT2 */
>  #define INTEL_CFL_U_GT2_IDS(info) \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL " Ville Syrjala
@ 2020-09-24  0:59   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  0:59 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the CNL PCI IDs numerically. Some order seems better than
> randomness.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> c48c2b76aa7d..33a72e6eadd8 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -543,23 +543,23 @@
> 
>  /* CNL */
>  #define INTEL_CNL_PORT_F_IDS(info) \
> -	INTEL_VGA_DEVICE(0x5A54, info), \
> -	INTEL_VGA_DEVICE(0x5A5C, info), \
>  	INTEL_VGA_DEVICE(0x5A44, info), \
> -	INTEL_VGA_DEVICE(0x5A4C, info)
> +	INTEL_VGA_DEVICE(0x5A4C, info), \
> +	INTEL_VGA_DEVICE(0x5A54, info), \
> +	INTEL_VGA_DEVICE(0x5A5C, info)
> 
>  #define INTEL_CNL_IDS(info) \
>  	INTEL_CNL_PORT_F_IDS(info), \
> -	INTEL_VGA_DEVICE(0x5A51, info), \
> -	INTEL_VGA_DEVICE(0x5A59, info), \
> +	INTEL_VGA_DEVICE(0x5A40, info), \
>  	INTEL_VGA_DEVICE(0x5A41, info), \
> -	INTEL_VGA_DEVICE(0x5A49, info), \
> -	INTEL_VGA_DEVICE(0x5A52, info), \
> -	INTEL_VGA_DEVICE(0x5A5A, info), \
>  	INTEL_VGA_DEVICE(0x5A42, info), \
> +	INTEL_VGA_DEVICE(0x5A49, info), \
>  	INTEL_VGA_DEVICE(0x5A4A, info), \
>  	INTEL_VGA_DEVICE(0x5A50, info), \
> -	INTEL_VGA_DEVICE(0x5A40, info)
> +	INTEL_VGA_DEVICE(0x5A51, info), \
> +	INTEL_VGA_DEVICE(0x5A52, info), \
> +	INTEL_VGA_DEVICE(0x5A59, info), \
> +	INTEL_VGA_DEVICE(0x5A5A, info)
> 
>  /* ICL */
>  #define INTEL_ICL_PORT_F_IDS(info) \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Ville Syrjala
@ 2020-09-24  1:01   ` Srivatsa, Anusha
  2020-10-23 23:55   ` Lucas De Marchi
  1 sibling, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  1:01 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the ICL PCI IDs numerically. Some order seems better than randomness.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivats@intel.com>

> ---
>  include/drm/i915_pciids.h | 16 ++++++++--------
>  1 file changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 33a72e6eadd8..45da1b45c01e 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -564,18 +564,18 @@
>  /* ICL */
>  #define INTEL_ICL_PORT_F_IDS(info) \
>  	INTEL_VGA_DEVICE(0x8A50, info), \
> -	INTEL_VGA_DEVICE(0x8A5C, info), \
> -	INTEL_VGA_DEVICE(0x8A59, info),	\
> -	INTEL_VGA_DEVICE(0x8A58, info),	\
>  	INTEL_VGA_DEVICE(0x8A52, info), \
> +	INTEL_VGA_DEVICE(0x8A53, info), \
> +	INTEL_VGA_DEVICE(0x8A54, info), \
> +	INTEL_VGA_DEVICE(0x8A56, info), \
> +	INTEL_VGA_DEVICE(0x8A57, info), \
> +	INTEL_VGA_DEVICE(0x8A58, info),	\
> +	INTEL_VGA_DEVICE(0x8A59, info),	\
>  	INTEL_VGA_DEVICE(0x8A5A, info), \
>  	INTEL_VGA_DEVICE(0x8A5B, info), \
> -	INTEL_VGA_DEVICE(0x8A57, info), \
> -	INTEL_VGA_DEVICE(0x8A56, info), \
> -	INTEL_VGA_DEVICE(0x8A71, info), \
> +	INTEL_VGA_DEVICE(0x8A5C, info), \
>  	INTEL_VGA_DEVICE(0x8A70, info), \
> -	INTEL_VGA_DEVICE(0x8A53, info), \
> -	INTEL_VGA_DEVICE(0x8A54, info)
> +	INTEL_VGA_DEVICE(0x8A71, info)
> 
>  #define INTEL_ICL_11_IDS(info) \
>  	INTEL_ICL_PORT_F_IDS(info), \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL " Ville Syrjala
@ 2020-09-24  1:04   ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24  1:04 UTC (permalink / raw)
  To: Ville Syrjala, intel-gfx



> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Thursday, July 16, 2020 10:21 AM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL PCI IDs
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Sort the EHL/JSL PCI IDs numerically. Some order seems better than
> randomness.
> 
> Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  include/drm/i915_pciids.h | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> 45da1b45c01e..880ffe8571e8 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -585,16 +585,16 @@
>  /* EHL/JSL */
>  #define INTEL_EHL_IDS(info) \
>  	INTEL_VGA_DEVICE(0x4500, info),	\
> -	INTEL_VGA_DEVICE(0x4571, info), \
> -	INTEL_VGA_DEVICE(0x4551, info), \
>  	INTEL_VGA_DEVICE(0x4541, info), \
> -	INTEL_VGA_DEVICE(0x4E71, info), \
> -	INTEL_VGA_DEVICE(0x4557, info), \
> +	INTEL_VGA_DEVICE(0x4551, info), \
>  	INTEL_VGA_DEVICE(0x4555, info), \
> -	INTEL_VGA_DEVICE(0x4E61, info), \
> -	INTEL_VGA_DEVICE(0x4E57, info), \
> +	INTEL_VGA_DEVICE(0x4557, info), \
> +	INTEL_VGA_DEVICE(0x4571, info), \
> +	INTEL_VGA_DEVICE(0x4E51, info), \
>  	INTEL_VGA_DEVICE(0x4E55, info), \
> -	INTEL_VGA_DEVICE(0x4E51, info)
> +	INTEL_VGA_DEVICE(0x4E57, info), \
> +	INTEL_VGA_DEVICE(0x4E61, info), \
> +	INTEL_VGA_DEVICE(0x4E71, info)
> 
>  /* TGL */
>  #define INTEL_TGL_12_IDS(info) \
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
  2020-09-24  0:37   ` Srivatsa, Anusha
@ 2020-09-24 10:46     ` Ville Syrjälä
  2020-09-24 17:54       ` Srivatsa, Anusha
  0 siblings, 1 reply; 36+ messages in thread
From: Ville Syrjälä @ 2020-09-24 10:46 UTC (permalink / raw)
  To: Srivatsa, Anusha; +Cc: intel-gfx

On Thu, Sep 24, 2020 at 12:37:47AM +0000, Srivatsa, Anusha wrote:
> 
> 
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> > Syrjala
> > Sent: Thursday, July 16, 2020 10:21 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
> > 
> > From: Alexei Podtelezhnikov <apodtele@gmail.com>
> > 
> > Add three new devices 0x1913, 0x1915, and 0x1917 also known as
> > iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15.
> > 
> > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
> > [vsyrjala: Split separate changes into separate patchs,
> >            Sort the IDs]
> The above comment appears in every patch. If this is v2 of the patches then it goes right after the commit message as:
> 
>  V2: Split separate changes into separate patches, sort the IDs (Ville)

No. I use the [vsyrjala: blah] notation to indicate I modified the
original patch which was authored by someone else.

>  
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> The code changes itself look good.
> 
> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> 
> > ---
> >  include/drm/i915_pciids.h | 9 ++++++---
> >  1 file changed, 6 insertions(+), 3 deletions(-)
> > 
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> > 9df3697f074d..c906088ccffe 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -329,17 +329,20 @@
> >  	INTEL_VGA_DEVICE(0x22b3, info)
> > 
> >  #define INTEL_SKL_ULT_GT1_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
> > +	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
> > +	INTEL_VGA_DEVICE(0x1913, info)  /* ULT GT1.5 */
> > 
> >  #define INTEL_SKL_ULX_GT1_IDS(info) \
> > -	INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
> > +	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
> > +	INTEL_VGA_DEVICE(0x1915, info)  /* ULX GT1.5 */
> > 
> >  #define INTEL_SKL_GT1_IDS(info)	\
> >  	INTEL_SKL_ULT_GT1_IDS(info), \
> >  	INTEL_SKL_ULX_GT1_IDS(info), \
> >  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> >  	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> > -	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
> > +	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> > +	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> > 
> >  #define INTEL_SKL_ULT_GT2_IDS(info) \
> >  	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> > --
> > 2.26.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
  2020-09-24  0:49   ` Srivatsa, Anusha
@ 2020-09-24 10:50     ` Ville Syrjälä
  0 siblings, 0 replies; 36+ messages in thread
From: Ville Syrjälä @ 2020-09-24 10:50 UTC (permalink / raw)
  To: Srivatsa, Anusha; +Cc: intel-gfx

On Thu, Sep 24, 2020 at 12:49:13AM +0000, Srivatsa, Anusha wrote:
> 
> 
> > -----Original Message-----
> > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> > Syrjala
> > Sent: Thursday, July 16, 2020 10:21 AM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL PCI IDs
> > 
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Sort the SKL PCI IDs numerically. Some order seems better than
> > randomness.
> 
> There are 2 patches - patch 2 and 3 in the series that are reclassifying some PCI IDs  and there is patch 4 that adds a missing ID. All of those with this patch can be combined to a single patch OR patch 2, 3 and 4 can be squashed as one solitary patch.

The original patch from Alexei was a single patch. I split it up for
a reason; easier to revert things if/when necessary, and it's also
easier to review.

If your commit message is of the form "do A and B" it's generally
a good indication that it should be split into two patches.

> 
> Anusha 
> > Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  include/drm/i915_pciids.h | 8 ++++----
> >  1 file changed, 4 insertions(+), 4 deletions(-)
> > 
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h index
> > 4870c3c9f9b2..5185ac789038 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -340,8 +340,8 @@
> >  	INTEL_SKL_ULT_GT1_IDS(info), \
> >  	INTEL_SKL_ULX_GT1_IDS(info), \
> >  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> > -	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> >  	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> > +	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> >  	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> > 
> >  #define INTEL_SKL_ULT_GT2_IDS(info) \
> > @@ -355,8 +355,8 @@
> >  	INTEL_SKL_ULT_GT2_IDS(info), \
> >  	INTEL_SKL_ULX_GT2_IDS(info), \
> >  	INTEL_VGA_DEVICE(0x1912, info), /* DT  GT2 */ \
> > -	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
> >  	INTEL_VGA_DEVICE(0x191A, info), /* SRV GT2 */ \
> > +	INTEL_VGA_DEVICE(0x191B, info), /* Halo GT2 */ \
> >  	INTEL_VGA_DEVICE(0x191D, info)  /* WKS GT2 */
> > 
> >  #define INTEL_SKL_ULT_GT3_IDS(info) \
> > @@ -372,9 +372,9 @@
> > 
> >  #define INTEL_SKL_GT4_IDS(info) \
> >  	INTEL_VGA_DEVICE(0x1932, info), /* DT GT4 */ \
> > +	INTEL_VGA_DEVICE(0x193A, info), /* SRV GT4e */ \
> >  	INTEL_VGA_DEVICE(0x193B, info), /* Halo GT4e */ \
> > -	INTEL_VGA_DEVICE(0x193D, info), /* WKS GT4e */ \
> > -	INTEL_VGA_DEVICE(0x193A, info)  /* SRV GT4e */
> > +	INTEL_VGA_DEVICE(0x193D, info) /* WKS GT4e */
> > 
> >  #define INTEL_SKL_IDS(info)	 \
> >  	INTEL_SKL_GT1_IDS(info), \
> > --
> > 2.26.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
  2020-09-24 10:46     ` Ville Syrjälä
@ 2020-09-24 17:54       ` Srivatsa, Anusha
  0 siblings, 0 replies; 36+ messages in thread
From: Srivatsa, Anusha @ 2020-09-24 17:54 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx



> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Thursday, September 24, 2020 3:46 AM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
> 
> On Thu, Sep 24, 2020 at 12:37:47AM +0000, Srivatsa, Anusha wrote:
> >
> >
> > > -----Original Message-----
> > > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf
> > > Of Ville Syrjala
> > > Sent: Thursday, July 16, 2020 10:21 AM
> > > To: intel-gfx@lists.freedesktop.org
> > > Subject: [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs
> > >
> > > From: Alexei Podtelezhnikov <apodtele@gmail.com>
> > >
> > > Add three new devices 0x1913, 0x1915, and 0x1917 also known as
> > > iSKLULTGT15, iSKLULXGT15, and iSKLDTGT15.
> > >
> > > Signed-off-by: Alexei Podtelezhnikov <apodtele@gmail.com>
> > > [vsyrjala: Split separate changes into separate patchs,
> > >            Sort the IDs]
> > The above comment appears in every patch. If this is v2 of the patches
> then it goes right after the commit message as:
> >
> >  V2: Split separate changes into separate patches, sort the IDs
> > (Ville)
> 
> No. I use the [vsyrjala: blah] notation to indicate I modified the original
> patch which was authored by someone else.
> 
> >
> > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > The code changes itself look good.

Ah. Ok.
Makes sense

Anusha 
> > Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> >
> > > ---
> > >  include/drm/i915_pciids.h | 9 ++++++---
> > >  1 file changed, 6 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > > index 9df3697f074d..c906088ccffe 100644
> > > --- a/include/drm/i915_pciids.h
> > > +++ b/include/drm/i915_pciids.h
> > > @@ -329,17 +329,20 @@
> > >  	INTEL_VGA_DEVICE(0x22b3, info)
> > >
> > >  #define INTEL_SKL_ULT_GT1_IDS(info) \
> > > -	INTEL_VGA_DEVICE(0x1906, info) /* ULT GT1 */
> > > +	INTEL_VGA_DEVICE(0x1906, info), /* ULT GT1 */ \
> > > +	INTEL_VGA_DEVICE(0x1913, info)  /* ULT GT1.5 */
> > >
> > >  #define INTEL_SKL_ULX_GT1_IDS(info) \
> > > -	INTEL_VGA_DEVICE(0x190E, info) /* ULX GT1 */
> > > +	INTEL_VGA_DEVICE(0x190E, info), /* ULX GT1 */ \
> > > +	INTEL_VGA_DEVICE(0x1915, info)  /* ULX GT1.5 */
> > >
> > >  #define INTEL_SKL_GT1_IDS(info)	\
> > >  	INTEL_SKL_ULT_GT1_IDS(info), \
> > >  	INTEL_SKL_ULX_GT1_IDS(info), \
> > >  	INTEL_VGA_DEVICE(0x1902, info), /* DT  GT1 */ \
> > >  	INTEL_VGA_DEVICE(0x190B, info), /* Halo GT1 */ \
> > > -	INTEL_VGA_DEVICE(0x190A, info) /* SRV GT1 */
> > > +	INTEL_VGA_DEVICE(0x190A, info), /* SRV GT1 */ \
> > > +	INTEL_VGA_DEVICE(0x1917, info)  /* DT  GT1.5 */
> > >
> > >  #define INTEL_SKL_ULT_GT2_IDS(info) \
> > >  	INTEL_VGA_DEVICE(0x1916, info), /* ULT GT2 */ \
> > > --
> > > 2.26.2
> > >
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> --
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

* Re: [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL PCI IDs
  2020-07-16 17:21 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Ville Syrjala
  2020-09-24  1:01   ` Srivatsa, Anusha
@ 2020-10-23 23:55   ` Lucas De Marchi
  1 sibling, 0 replies; 36+ messages in thread
From: Lucas De Marchi @ 2020-10-23 23:55 UTC (permalink / raw)
  To: Ville Syrjala; +Cc: intel-gfx

On Thu, Jul 16, 2020 at 08:21:05PM +0300, Ville Syrjälä wrote:
>From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>Sort the ICL PCI IDs numerically. Some order seems better than
>randomness.

At one point there was actually logic in the order: it followed whatever
order the spec had, so "updating the IDs" was basically rewriting
those defines or quickly scan through the spec and what we had in the
driver.

Of course, that doesn't work so well, because a) the order may change in
the spec and in fact it did; b)  with the split between variants of the
same platform it adds randomness to it; c) not everybody understands
what order was supposed to be and just appends to the end

So, I think a comment on top saying the PCI IDs should be lowercase and
numerically sorted would be appropriate to avoid having to fix this
again soon.

Lucas De Marchi

>
>Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
>Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>---
> include/drm/i915_pciids.h | 16 ++++++++--------
> 1 file changed, 8 insertions(+), 8 deletions(-)
>
>diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
>index 33a72e6eadd8..45da1b45c01e 100644
>--- a/include/drm/i915_pciids.h
>+++ b/include/drm/i915_pciids.h
>@@ -564,18 +564,18 @@
> /* ICL */
> #define INTEL_ICL_PORT_F_IDS(info) \
> 	INTEL_VGA_DEVICE(0x8A50, info), \
>-	INTEL_VGA_DEVICE(0x8A5C, info), \
>-	INTEL_VGA_DEVICE(0x8A59, info),	\
>-	INTEL_VGA_DEVICE(0x8A58, info),	\
> 	INTEL_VGA_DEVICE(0x8A52, info), \
>+	INTEL_VGA_DEVICE(0x8A53, info), \
>+	INTEL_VGA_DEVICE(0x8A54, info), \
>+	INTEL_VGA_DEVICE(0x8A56, info), \
>+	INTEL_VGA_DEVICE(0x8A57, info), \
>+	INTEL_VGA_DEVICE(0x8A58, info),	\
>+	INTEL_VGA_DEVICE(0x8A59, info),	\
> 	INTEL_VGA_DEVICE(0x8A5A, info), \
> 	INTEL_VGA_DEVICE(0x8A5B, info), \
>-	INTEL_VGA_DEVICE(0x8A57, info), \
>-	INTEL_VGA_DEVICE(0x8A56, info), \
>-	INTEL_VGA_DEVICE(0x8A71, info), \
>+	INTEL_VGA_DEVICE(0x8A5C, info), \
> 	INTEL_VGA_DEVICE(0x8A70, info), \
>-	INTEL_VGA_DEVICE(0x8A53, info), \
>-	INTEL_VGA_DEVICE(0x8A54, info)
>+	INTEL_VGA_DEVICE(0x8A71, info)
>
> #define INTEL_ICL_11_IDS(info) \
> 	INTEL_ICL_PORT_F_IDS(info), \
>-- 
>2.26.2
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 36+ messages in thread

end of thread, other threads:[~2020-10-23 23:55 UTC | newest]

Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-07-16 17:20 [Intel-gfx] [PATCH 00/14] drm/i915: PCI ID cleanup Ville Syrjala
2020-07-16 17:20 ` [Intel-gfx] [PATCH 01/14] drm/i915: Update Haswell PCI IDs Ville Syrjala
2020-09-23 23:46   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 02/14] drm/i915: Reclassify SKL 0x192a as GT3 Ville Syrjala
2020-07-16 17:20 ` [Intel-gfx] [PATCH 03/14] drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT Ville Syrjala
2020-09-24  0:32   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 04/14] drm/i915: Add SKL GT1.5 PCI IDs Ville Syrjala
2020-09-24  0:37   ` Srivatsa, Anusha
2020-09-24 10:46     ` Ville Syrjälä
2020-09-24 17:54       ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 05/14] drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments Ville Syrjala
2020-09-24  0:40   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 06/14] drm/i915: Ocd the HSW PCI ID hex numbers Ville Syrjala
2020-09-24  0:42   ` Srivatsa, Anusha
2020-07-16 17:20 ` [Intel-gfx] [PATCH 07/14] drm/i915: Sort HSW PCI IDs Ville Syrjala
2020-09-24  0:44   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 08/14] drm/i915: Sort SKL " Ville Syrjala
2020-09-24  0:49   ` Srivatsa, Anusha
2020-09-24 10:50     ` Ville Syrjälä
2020-07-16 17:21 ` [Intel-gfx] [PATCH 09/14] drm/i915: Sort KBL " Ville Syrjala
2020-09-24  0:50   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 10/14] drm/i915: Sort CML " Ville Syrjala
2020-09-24  0:53   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 11/14] drm/i915: Sort CFL " Ville Syrjala
2020-09-24  0:55   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 12/14] drm/i915: Sort CNL " Ville Syrjala
2020-09-24  0:59   ` Srivatsa, Anusha
2020-07-16 17:21 ` [Intel-gfx] [PATCH 13/14] drm/i915: Sort ICL " Ville Syrjala
2020-09-24  1:01   ` Srivatsa, Anusha
2020-10-23 23:55   ` Lucas De Marchi
2020-07-16 17:21 ` [Intel-gfx] [PATCH 14/14] drm/i915: Sort EHL/JSL " Ville Syrjala
2020-09-24  1:04   ` Srivatsa, Anusha
2020-07-16 18:25 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: PCI ID cleanup Patchwork
2020-07-16 18:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-16 19:51 ` [Intel-gfx] [PATCH 00/14] " Alexei Podtelezhnikov
2020-07-16 23:11 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for " Patchwork

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