From: Vandita Kulkarni <vandita.kulkarni@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com
Subject: [Intel-gfx] [V14 2/5] i915/dsi: Configure TE interrupt for cmd mode
Date: Thu, 24 Sep 2020 18:12:06 +0530 [thread overview]
Message-ID: <20200924124209.17916-3-vandita.kulkarni@intel.com> (raw)
In-Reply-To: <20200924124209.17916-1-vandita.kulkarni@intel.com>
Configure TE interrupt as part of the vblank
enable call flow.
v2: Hide the private flags check inside configure_te (Jani)
v3: Fix the position of masking de_port_masked for DSI_TE.
v4: Simplify the caller of configure_te (Jani)
v5: Clear IIR, remove the usage of private_flags
v6: including icl_dsi header is not needed
Signed-off-by: Vandita Kulkarni <vandita.kulkarni@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 50 +++++++++++++++++++++++++++++++--
1 file changed, 48 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 759f523c6a6b..913548addfba 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2631,12 +2631,47 @@ int ilk_enable_vblank(struct drm_crtc *crtc)
return 0;
}
+static bool gen11_dsi_configure_te(struct intel_crtc *intel_crtc,
+ bool enable)
+{
+ struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
+ enum port port;
+ u32 tmp;
+
+ if (!(intel_crtc->mode_flags &
+ (I915_MODE_FLAG_DSI_USE_TE1 | I915_MODE_FLAG_DSI_USE_TE0)))
+ return false;
+
+ /* for dual link cases we consider TE from slave */
+ if (intel_crtc->mode_flags & I915_MODE_FLAG_DSI_USE_TE1)
+ port = PORT_B;
+ else
+ port = PORT_A;
+
+ tmp = I915_READ(DSI_INTR_MASK_REG(port));
+ if (enable)
+ tmp &= ~DSI_TE_EVENT;
+ else
+ tmp |= DSI_TE_EVENT;
+
+ I915_WRITE(DSI_INTR_MASK_REG(port), tmp);
+
+ tmp = I915_READ(DSI_INTR_IDENT_REG(port));
+ I915_WRITE(DSI_INTR_IDENT_REG(port), tmp);
+
+ return true;
+}
+
int bdw_enable_vblank(struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- enum pipe pipe = to_intel_crtc(crtc)->pipe;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ enum pipe pipe = intel_crtc->pipe;
unsigned long irqflags;
+ if (gen11_dsi_configure_te(intel_crtc, true))
+ return 0;
+
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -2702,9 +2737,13 @@ void ilk_disable_vblank(struct drm_crtc *crtc)
void bdw_disable_vblank(struct drm_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->dev);
- enum pipe pipe = to_intel_crtc(crtc)->pipe;
+ struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+ enum pipe pipe = intel_crtc->pipe;
unsigned long irqflags;
+ if (gen11_dsi_configure_te(intel_crtc, false))
+ return;
+
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -3400,6 +3439,13 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv)
if (IS_GEN9_LP(dev_priv))
de_port_masked |= BXT_DE_PORT_GMBUS;
+ if (INTEL_GEN(dev_priv) >= 11) {
+ enum port port;
+
+ if (intel_bios_is_dsi_present(dev_priv, &port))
+ de_port_masked |= DSI0_TE | DSI1_TE;
+ }
+
de_pipe_enables = de_pipe_masked | GEN8_PIPE_VBLANK |
GEN8_PIPE_FIFO_UNDERRUN;
--
2.21.0.5.gaeb582a
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next prev parent reply other threads:[~2020-09-24 12:49 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-24 12:42 [Intel-gfx] [V14 0/5] Add support for mipi dsi cmd mode Vandita Kulkarni
2020-09-24 12:42 ` [Intel-gfx] [V14 1/5] drm/i915/dsi: Add details about TE in get_config Vandita Kulkarni
2020-09-24 12:42 ` Vandita Kulkarni [this message]
2020-09-24 12:42 ` [Intel-gfx] [V14 3/5] drm/i915/dsi: Add TE handler for dsi cmd mode Vandita Kulkarni
2020-09-24 12:42 ` [Intel-gfx] [V14 4/5] drm/i915/dsi: Initiate frame request in " Vandita Kulkarni
2020-09-28 10:17 ` Ville Syrjälä
2020-09-28 10:19 ` Kulkarni, Vandita
2020-09-28 11:08 ` [Intel-gfx] [15 " Vandita Kulkarni
2020-09-24 12:42 ` [Intel-gfx] [V14 5/5] drm/i915/dsi: Enable software vblank counter Vandita Kulkarni
2020-10-02 11:13 ` Ville Syrjälä
2020-09-24 14:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add support for mipi dsi cmd mode (rev14) Patchwork
2020-09-24 19:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-28 11:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Add support for mipi dsi cmd mode (rev15) Patchwork
2020-09-28 15:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-09-28 15:42 ` Kulkarni, Vandita
2020-09-28 16:01 ` Vudum, Lakshminarayana
2020-09-28 15:54 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-09-28 17:07 ` [Intel-gfx] [V14 0/5] Add support for mipi dsi cmd mode Jani Nikula
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