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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Michel Thierry <michel.thierry@intel.com>,
	Matthew Auld <matthew.auld@intel.com>
Subject: [Intel-gfx] [PATCH v6 24/24] drm/i915/dgfx: define llc and snooping behaviour
Date: Tue, 29 Sep 2020 23:42:34 -0700	[thread overview]
Message-ID: <20200930064234.85769-25-lucas.demarchi@intel.com> (raw)
In-Reply-To: <20200930064234.85769-1-lucas.demarchi@intel.com>

From: Michel Thierry <michel.thierry@intel.com>

While we do lack the faster shared LLC, we should still have support
for snooping over PCIe.

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/i915_pci.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c2dfdf52419b..95f281b48c64 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -900,6 +900,8 @@ static const struct intel_device_info rkl_info = {
 	GEN12_FEATURES, \
 	.memory_regions = REGION_SMEM | REGION_LMEM, \
 	.has_master_unit_irq = 1, \
+	.has_llc = 0, \
+	.has_snoop = 1, \
 	.is_dgfx = 1
 
 static const struct intel_device_info dg1_info __maybe_unused = {
-- 
2.28.0

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  parent reply	other threads:[~2020-09-30  6:43 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-30  6:42 [Intel-gfx] [PATCH v6 00/24] Introduce DG1 Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 01/24] drm/i915/dg1: add more PCI ids Lucas De Marchi
2020-09-30 14:00   ` Matt Roper
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 02/24] drm/i915/dg1: Initialize RAWCLK properly Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 03/24] drm/i915/dg1: Define MOCS table for DG1 Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 04/24] drm/i915/dg1: Add DG1 power wells Lucas De Marchi
2020-09-30 15:44   ` Matt Roper
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 05/24] drm/i915/dg1: Increase mmio size to 4MB Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 06/24] drm/i915/dg1: Wait for pcode/uncore handshake at startup Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 07/24] drm/i915/dg1: Add DPLL macros for DG1 Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 08/24] drm/i915/dg1: Add and setup DPLLs " Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 09/24] drm/i915/dg1: Enable DPLL " Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 10/24] drm/i915/dg1: add hpd interrupt handling Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 11/24] drm/i915/dg1: invert HPD pins Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 12/24] drm/i915/dg1: gmbus pin mapping Lucas De Marchi
2020-09-30 16:17   ` Matt Roper
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 13/24] drm/i915/dg1: Enable first 2 ports for DG1 Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 14/24] drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 15/24] drm/i915/dg1: Update comp master/slave relationships for PHYs Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 16/24] drm/i915/dg1: Update voltage swing tables for DP Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 17/24] drm/i915/dg1: provide port/phy mapping for vbt Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 18/24] drm/i915/dg1: map/unmap pll clocks Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 19/24] drm/i915/dg1: enable PORT C/D aka D/E Lucas De Marchi
2020-09-30 17:33   ` Matt Roper
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 20/24] drm/i915/dg1: Load DMC Lucas De Marchi
2020-09-30 16:10   ` Matt Roper
2020-09-30 16:18     ` Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 21/24] drm/i915/dg1: Add initial DG1 workarounds Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 22/24] drm/i915/dg1: DG1 does not support DC6 Lucas De Marchi
2020-09-30 16:50   ` Matt Roper
2020-10-08  4:20     ` Lucas De Marchi
2020-09-30  6:42 ` [Intel-gfx] [PATCH v6 23/24] drm/i915/dg1: Change DMC_DEBUG{1, 2} registers Lucas De Marchi
2020-09-30 17:20   ` Matt Roper
2020-10-01  5:16     ` Lucas De Marchi
2020-10-01 14:51       ` Matt Roper
2020-09-30  6:42 ` Lucas De Marchi [this message]
2020-09-30  7:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce DG1 Patchwork
2020-09-30  7:26 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-30  7:44 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-09-30  8:01   ` Lucas De Marchi
2020-09-30  9:14     ` Matthew Auld

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