From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Kui Wen <kui.wen@intel.com>, Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 1/4] drm/i915: Fix the sgt.pfn sanity check
Date: Tue, 19 Jan 2021 13:31:03 +0000 [thread overview]
Message-ID: <20210119133106.66294-1-matthew.auld@intel.com> (raw)
From: Kui Wen <kui.wen@intel.com>
For the device local-memory case, sgt.pfn will always be equal to zero,
since we instead use sgt.dma. Also, for device local-memory it is
perfectly valid for it to start from zero anyway, so no need to add a
new check for that either.
Signed-off-by: Kui Wen <kui.wen@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_mm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 43039dc8c607..666808cb3a32 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -62,7 +62,7 @@ static int remap_sg(pte_t *pte, unsigned long addr, void *data)
{
struct remap_pfn *r = data;
- if (GEM_WARN_ON(!r->sgt.pfn))
+ if (GEM_WARN_ON(!r->sgt.sgp))
return -EINVAL;
/* Special PTE are not associated with any struct page */
--
2.26.2
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next reply other threads:[~2021-01-19 13:31 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-19 13:31 Matthew Auld [this message]
2021-01-19 13:31 ` [Intel-gfx] [PATCH 2/4] drm/i915/error: Fix object page offset within a region Matthew Auld
2021-01-19 13:31 ` [Intel-gfx] [PATCH 3/4] drm/i915: move i915_map_type into i915_gem_object_types.h Matthew Auld
2021-01-19 13:31 ` [Intel-gfx] [PATCH 4/4] drm/i915/pool: constrain pool objects by mapping type Matthew Auld
2021-01-19 17:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Fix the sgt.pfn sanity check Patchwork
2021-01-19 20:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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