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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Aditya Swarup <aditya.swarup@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 07/10] drm/i915/adl_s: Initialize display for ADL-S
Date: Mon, 25 Jan 2021 10:47:17 -0800	[thread overview]
Message-ID: <20210125184717.tmhmkejsrzljzndr@ldmartin-desk1> (raw)
In-Reply-To: <20210125140753.347998-8-aditya.swarup@intel.com>

On Mon, Jan 25, 2021 at 06:07:50AM -0800, Aditya Swarup wrote:
>Initialize display outputs for ADL-S. ADL-S has 5 display
>outputs -> 1 eDP, 2 HDMI and 2 DP++ outputs.
>
>v2:
>- Use PORT_TCx instead of PORT_D,E.. to stay consistent
>  with other platforms.(mdroper)
>
>Cc: Jani Nikula <jani.nikula@intel.com>
>Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>Cc: Imre Deak <imre.deak@intel.com>
>Cc: Matt Roper <matthew.d.roper@intel.com>
>Cc: Lucas De Marchi <lucas.demarchi@intel.com>
>Signed-off-by: Aditya Swarup <aditya.swarup@intel.com>

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>

Lucas De Marchi

>---
> drivers/gpu/drm/i915/display/intel_display.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>index 83ac0a7a59f0..eaec5cd1a144 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -13897,7 +13897,13 @@ static void intel_setup_outputs(struct drm_i915_private *dev_priv)
> 	if (!HAS_DISPLAY(dev_priv))
> 		return;
>
>-	if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) {
>+	if (IS_ALDERLAKE_S(dev_priv)) {
>+		intel_ddi_init(dev_priv, PORT_A);
>+		intel_ddi_init(dev_priv, PORT_TC1);
>+		intel_ddi_init(dev_priv, PORT_TC2);
>+		intel_ddi_init(dev_priv, PORT_TC3);
>+		intel_ddi_init(dev_priv, PORT_TC4);
>+	} else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) {
> 		intel_ddi_init(dev_priv, PORT_A);
> 		intel_ddi_init(dev_priv, PORT_B);
> 		intel_ddi_init(dev_priv, PORT_TC1);
>-- 
>2.27.0
>
>_______________________________________________
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  reply	other threads:[~2021-01-25 18:47 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-25 14:07 [Intel-gfx] [PATCH 00/10] Alderlake-S platform enabling patches Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 01/10] x86/gpu: Add Alderlake-S stolen memory support Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 02/10] drm/i915/adl_s: Add PCH support Aditya Swarup
2021-01-25 17:39   ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 03/10] drm/i915/adl_s: Add Interrupt Support Aditya Swarup
2021-01-25 17:46   ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 04/10] drm/i915/adl_s: Add PHYs for Alderlake S Aditya Swarup
2021-01-25 17:51   ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 05/10] drm/i915/adl_s: Configure DPLL for ADL-S Aditya Swarup
2021-01-25 18:45   ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 06/10] drm/i915/adl_s: Configure Port clock registers " Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 07/10] drm/i915/adl_s: Initialize display " Aditya Swarup
2021-01-25 18:47   ` Lucas De Marchi [this message]
2021-01-25 14:07 ` [Intel-gfx] [PATCH 08/10] drm/i915/adl_s: Add adl-s ddc pin mapping Aditya Swarup
2021-01-25 18:54   ` Lucas De Marchi
2021-01-25 14:07 ` [Intel-gfx] [PATCH 09/10] drm/i915/adl_s: Add vbt port and aux channel settings for adls Aditya Swarup
2021-01-25 14:07 ` [Intel-gfx] [PATCH 10/10] drm/i915/adl_s: Update combo PHY master/slave relationships Aditya Swarup
2021-01-25 17:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alderlake-S platform enabling patches Patchwork
2021-01-25 17:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-25 18:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-25 23:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-01-26  0:05   ` Aditya Swarup
2021-01-26  3:27 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Alderlake-S platform enabling patches (rev2) Patchwork
2021-01-26  3:28 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-26  3:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-26 10:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-26 15:09 ` [Intel-gfx] [PATCH 00/10] Alderlake-S platform enabling patches Lucas De Marchi

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