From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: [Intel-gfx] [PATCH 22/31] drm/i915/selftests: Exercise relative timeline modes
Date: Mon, 8 Feb 2021 10:52:27 +0000 [thread overview]
Message-ID: <20210208105236.28498-22-chris@chris-wilson.co.uk> (raw)
In-Reply-To: <20210208105236.28498-1-chris@chris-wilson.co.uk>
A quick test to verify that the backend accepts each type of timeline
and can use them to track and control request emission.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gt/selftest_timeline.c | 105 ++++++++++++++++++++
1 file changed, 105 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c
index 6b412228a6fd..dcc03522b277 100644
--- a/drivers/gpu/drm/i915/gt/selftest_timeline.c
+++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c
@@ -1364,9 +1364,114 @@ static int live_hwsp_recycle(void *arg)
return err;
}
+static int live_hwsp_relative(void *arg)
+{
+ struct intel_gt *gt = arg;
+ struct intel_engine_cs *engine;
+ enum intel_engine_id id;
+
+ /*
+ * Check backend support for different timeline modes.
+ */
+
+ for_each_engine(engine, gt, id) {
+ enum intel_timeline_mode mode;
+
+ if (!intel_engine_has_scheduler(engine))
+ continue;
+
+ for (mode = INTEL_TIMELINE_ABSOLUTE;
+ mode <= INTEL_TIMELINE_RELATIVE_ENGINE;
+ mode++) {
+ struct intel_timeline *tl;
+ struct i915_request *rq;
+ struct intel_context *ce;
+ const char *msg;
+ int err;
+
+ if (mode == INTEL_TIMELINE_RELATIVE_CONTEXT &&
+ !HAS_EXECLISTS(gt->i915))
+ continue;
+
+ ce = intel_context_create(engine);
+ if (IS_ERR(ce))
+ return PTR_ERR(ce);
+
+ err = intel_context_alloc_state(ce);
+ if (err) {
+ intel_context_put(ce);
+ return err;
+ }
+
+ switch (mode) {
+ case INTEL_TIMELINE_ABSOLUTE:
+ tl = intel_timeline_create(gt);
+ msg = "local";
+ break;
+
+ case INTEL_TIMELINE_RELATIVE_CONTEXT:
+ tl = __intel_timeline_create(gt,
+ ce->state,
+ INTEL_TIMELINE_RELATIVE_CONTEXT |
+ 0x400);
+ msg = "ppHWSP";
+ break;
+
+ case INTEL_TIMELINE_RELATIVE_ENGINE:
+ tl = __intel_timeline_create(gt,
+ engine->status_page.vma,
+ 0x400);
+ msg = "HWSP";
+ break;
+ default:
+ continue;
+ }
+ if (IS_ERR(tl)) {
+ intel_context_put(ce);
+ return PTR_ERR(tl);
+ }
+
+ pr_info("Testing %s timeline on %s\n",
+ msg, engine->name);
+
+ intel_timeline_put(ce->timeline);
+ ce->timeline = tl;
+
+ err = intel_timeline_pin(tl, NULL);
+ if (err) {
+ intel_context_put(ce);
+ return err;
+ }
+ tl->seqno = 0xc0000000;
+ WRITE_ONCE(*(u32 *)tl->hwsp_seqno, tl->seqno);
+ intel_timeline_unpin(tl);
+
+ rq = intel_context_create_request(ce);
+ intel_context_put(ce);
+ if (IS_ERR(rq))
+ return PTR_ERR(rq);
+
+ GEM_BUG_ON(rcu_access_pointer(rq->timeline) != tl);
+
+ i915_request_get(rq);
+ i915_request_add(rq);
+
+ if (i915_request_wait(rq, 0, HZ / 5) < 0) {
+ i915_request_put(rq);
+ return -EIO;
+ }
+
+ i915_request_put(rq);
+ }
+ }
+
+ return 0;
+}
+
int intel_timeline_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
+ SUBTEST(live_hwsp_relative),
SUBTEST(live_hwsp_recycle),
SUBTEST(live_hwsp_engine),
SUBTEST(live_hwsp_alternate),
--
2.20.1
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next prev parent reply other threads:[~2021-02-08 10:53 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 10:52 [Intel-gfx] [PATCH 01/31] drm/i915/gt: Ratelimit heartbeat completion probing Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 02/31] drm/i915: Move context revocation to scheduler Chris Wilson
2021-02-08 11:18 ` Tvrtko Ursulin
2021-02-08 10:52 ` [Intel-gfx] [PATCH 03/31] drm/i915: Introduce the scheduling mode Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 04/31] drm/i915: Move timeslicing flag to scheduler Chris Wilson
2021-02-08 11:43 ` Tvrtko Ursulin
2021-02-08 10:52 ` [Intel-gfx] [PATCH 05/31] drm/i915/gt: Declare when we enabled timeslicing Chris Wilson
2021-02-08 11:44 ` Tvrtko Ursulin
2021-02-08 10:52 ` [Intel-gfx] [PATCH 06/31] drm/i915: Move busywaiting control to the scheduler Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 07/31] drm/i915: Move preempt-reset flag " Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 08/31] drm/i915: Fix the iterative dfs for defering requests Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 09/31] drm/i915: Replace priolist rbtree with a skiplist Chris Wilson
2021-02-08 12:29 ` Tvrtko Ursulin
2021-02-08 12:46 ` Chris Wilson
2021-02-08 15:10 ` Tvrtko Ursulin
2021-02-08 15:23 ` Tvrtko Ursulin
2021-02-08 16:19 ` Chris Wilson
2021-02-09 16:11 ` Tvrtko Ursulin
2021-02-08 10:52 ` [Intel-gfx] [PATCH 10/31] drm/i915: Fair low-latency scheduling Chris Wilson
2021-02-08 14:56 ` Tvrtko Ursulin
2021-02-08 15:29 ` Chris Wilson
2021-02-08 16:03 ` Tvrtko Ursulin
2021-02-08 16:11 ` Chris Wilson
2021-02-09 9:37 ` Tvrtko Ursulin
2021-02-09 10:31 ` Chris Wilson
2021-02-09 10:40 ` Tvrtko Ursulin
2021-02-08 10:52 ` [Intel-gfx] [PATCH 11/31] drm/i915/gt: Specify a deadline for the heartbeat Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 12/31] drm/i915: Extend the priority boosting for the display with a deadline Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 13/31] drm/i915/gt: Support virtual engine queues Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 14/31] drm/i915: Move saturated workload detection back to the context Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 15/31] drm/i915: Bump default timeslicing quantum to 5ms Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 16/31] drm/i915/gt: Delay taking irqoff for execlists submission Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 17/31] drm/i915/gt: Convert the legacy ring submission to use the scheduling interface Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 18/31] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 19/31] drm/i915/gt: Track timeline GGTT offset separately from subpage offset Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 20/31] drm/i915/gt: Add timeline "mode" Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 21/31] drm/i915/gt: Use indices for writing into relative timelines Chris Wilson
2021-02-08 10:52 ` Chris Wilson [this message]
2021-02-08 10:52 ` [Intel-gfx] [PATCH 23/31] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 24/31] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq" Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 25/31] drm/i915/gt: Support creation of 'internal' rings Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 26/31] drm/i915/gt: Use client timeline address for seqno writes Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 27/31] drm/i915/gt: Infrastructure for ring scheduling Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 28/31] drm/i915/gt: Implement ring scheduler for gen4-7 Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 29/31] drm/i915/gt: Enable ring scheduling for gen5-7 Chris Wilson
2021-02-08 10:52 ` [Intel-gfx] [PATCH 30/31] drm/i915: Support secure dispatch on gen6/gen7 Chris Wilson
2021-02-08 20:55 ` Dave Airlie
2021-02-08 22:49 ` Chris Wilson
2021-02-09 11:02 ` Tvrtko Ursulin
2021-02-08 10:52 ` [Intel-gfx] [PATCH 31/31] drm/i915/gt: Limit C-states while waiting for requests Chris Wilson
2021-02-08 15:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/31] drm/i915/gt: Ratelimit heartbeat completion probing Patchwork
2021-02-08 15:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-08 16:13 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-02-09 17:52 ` [Intel-gfx] [PATCH 01/31] " Mika Kuoppala
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