From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Lucas De Marchi" <lucas.demarchi@intel.com>,
"Juha-Pekka Heikkilä" <juha-pekka.heikkila@intel.com>
Subject: [Intel-gfx] [PATCH v2 06/10] drm/i915/xelpd: Support 128k plane stride
Date: Thu, 6 May 2021 19:19:26 +0300 [thread overview]
Message-ID: <20210506161930.309688-7-imre.deak@intel.com> (raw)
In-Reply-To: <20210506161930.309688-1-imre.deak@intel.com>
From: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
XE_LPD supports plane strides up to 128KB.
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Signed-off-by: Juha-Pekka Heikkilä <juha-pekka.heikkila@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
.../drm/i915/display/skl_universal_plane.c | 46 +++++++++++++++----
drivers/gpu/drm/i915/i915_reg.h | 2 +
2 files changed, 39 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 6df3e745f830d..68a0c0a92fa1a 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -482,17 +482,35 @@ skl_plane_max_stride(struct intel_plane *plane,
u32 pixel_format, u64 modifier,
unsigned int rotation)
{
+ struct drm_i915_private *i915 = to_i915(plane->base.dev);
const struct drm_format_info *info = drm_format_info(pixel_format);
int cpp = info->cpp[0];
+ int max_horizontal_pixels = 8192;
+ int max_stride_bytes;
+
+ if (DISPLAY_VER(i915) >= 13) {
+ /*
+ * The stride in bytes must not exceed of the size
+ * of 128K bytes. For pixel formats of 64bpp will allow
+ * for a 16K pixel surface.
+ */
+ max_stride_bytes = 131072;
+ if (cpp == 8)
+ max_horizontal_pixels = 16384;
+ else
+ max_horizontal_pixels = 65536;
+ } else {
+ /*
+ * "The stride in bytes must not exceed the
+ * of the size of 8K pixels and 32K bytes."
+ */
+ max_stride_bytes = 32768;
+ }
- /*
- * "The stride in bytes must not exceed the
- * of the size of 8K pixels and 32K bytes."
- */
if (drm_rotation_90_or_270(rotation))
- return min(8192, 32768 / cpp);
+ return min(max_horizontal_pixels, max_stride_bytes / cpp);
else
- return min(8192 * cpp, 32768);
+ return min(max_horizontal_pixels * cpp, max_stride_bytes);
}
@@ -1452,7 +1470,10 @@ static int skl_check_main_surface(struct intel_plane_state *plane_state)
}
}
- drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
+ if (DISPLAY_VER(dev_priv) >= 13)
+ drm_WARN_ON(&dev_priv->drm, x > 65535 || y > 65535);
+ else
+ drm_WARN_ON(&dev_priv->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[0].offset = offset;
plane_state->view.color_plane[0].x = x;
@@ -1526,7 +1547,10 @@ static int skl_check_nv12_aux_surface(struct intel_plane_state *plane_state)
}
}
- drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
+ if (DISPLAY_VER(i915) >= 13)
+ drm_WARN_ON(&i915->drm, x > 65535 || y > 65535);
+ else
+ drm_WARN_ON(&i915->drm, x > 8191 || y > 8191);
plane_state->view.color_plane[uv_plane].offset = offset;
plane_state->view.color_plane[uv_plane].x = x;
@@ -2239,7 +2263,11 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
val = intel_de_read(dev_priv, PLANE_STRIDE(pipe, plane_id));
stride_mult = skl_plane_stride_mult(fb, 0, DRM_MODE_ROTATE_0);
- fb->pitches[0] = (val & 0x3ff) * stride_mult;
+
+ if (DISPLAY_VER(dev_priv) >= 13)
+ fb->pitches[0] = (val & PLANE_STRIDE_MASK_XELPD) * stride_mult;
+ else
+ fb->pitches[0] = (val & PLANE_STRIDE_MASK) * stride_mult;
aligned_height = intel_fb_align_height(fb, 0, fb->height);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9ffd173f8b7f9..846fa927a3d83 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7212,6 +7212,8 @@ enum {
_PIPE(pipe, _PLANE_STRIDE_3_A, _PLANE_STRIDE_3_B)
#define PLANE_STRIDE(pipe, plane) \
_MMIO_PLANE(plane, _PLANE_STRIDE_1(pipe), _PLANE_STRIDE_2(pipe))
+#define PLANE_STRIDE_MASK REG_GENMASK(10, 0)
+#define PLANE_STRIDE_MASK_XELPD REG_GENMASK(11, 0)
#define _PLANE_POS_1_B 0x7118c
#define _PLANE_POS_2_B 0x7128c
--
2.27.0
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next prev parent reply other threads:[~2021-05-06 16:19 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-06 16:19 [Intel-gfx] [PATCH v2 00/10] drm/i915/adl_p: Add support for Display Page Tables Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 01/10] drm/i915/xelpd: add XE_LPD display characteristics Imre Deak
2021-05-06 19:09 ` Souza, Jose
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 02/10] drm/i915/adl_p: Add PCI Devices IDs Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 03/10] drm/i915/adl_p: ADL_P device info enabling Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 04/10] drm/i915/xelpd: First stab at DPT support Imre Deak
2021-07-28 6:50 ` Daniel Vetter
2021-07-28 16:41 ` Rodrigo Vivi
2021-07-28 19:06 ` Daniel Vetter
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 05/10] drm/i915/xelpd: Fallback to plane stride limitations when using DPT Imre Deak
2021-05-06 16:19 ` Imre Deak [this message]
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 07/10] drm/i915/adl_p: Add stride restriction " Imre Deak
2021-05-06 21:03 ` Clint Taylor
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 08/10] drm/i915/adl_p: Disable support for 90/270 FB rotation Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 09/10] drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs Imre Deak
2021-05-06 16:19 ` [Intel-gfx] [PATCH v2 10/10] drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT Imre Deak
2021-05-06 16:32 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/adl_p: Add support for Display Page Tables (rev2) Patchwork
2021-05-06 16:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-06 17:03 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-05-06 17:58 ` Imre Deak
2021-05-06 19:12 ` Vudum, Lakshminarayana
2021-05-06 18:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-06 20:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-07 9:36 ` Imre Deak
2021-05-07 14:56 ` Vudum, Lakshminarayana
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