intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Pekka Paalanen <ppaalanen@gmail.com>
To: Uma Shankar <uma.shankar@intel.com>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 01/21] drm: Add Enhanced Gamma and color lut range attributes
Date: Wed, 2 Jun 2021 12:33:35 +0300	[thread overview]
Message-ID: <20210602123335.29045e06@eldfell> (raw)
In-Reply-To: <20210601105218.29185-2-uma.shankar@intel.com>


[-- Attachment #1.1: Type: text/plain, Size: 3243 bytes --]

On Tue,  1 Jun 2021 16:21:58 +0530
Uma Shankar <uma.shankar@intel.com> wrote:

> Existing LUT precision structure is having only 16 bit
> precision. This is not enough for upcoming enhanced hardwares
> and advance usecases like HDR processing. Hence added a new
> structure with 32 bit precision values.
> 
> This also defines a new structure to define color lut ranges,
> along with related macro definitions and enums. This will help
> describe multi segmented lut ranges in the hardware.
> 
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
>  include/uapi/drm/drm_mode.h | 58 +++++++++++++++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 9b6722d45f36..d0ce48d2e732 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -819,6 +819,64 @@ struct hdr_output_metadata {
>  	};
>  };
>  
> +/*
> + * DRM_MODE_LUT_GAMMA|DRM_MODE_LUT_DEGAMMA is legal and means the LUT
> + * can be used for either purpose, but not simultaneously. To expose
> + * modes that support gamma and degamma simultaneously the gamma mode
> + * must declare distinct DRM_MODE_LUT_GAMMA and DRM_MODE_LUT_DEGAMMA
> + * ranges.
> + */
> +/* LUT is for gamma (after CTM) */
> +#define DRM_MODE_LUT_GAMMA BIT(0)
> +/* LUT is for degamma (before CTM) */
> +#define DRM_MODE_LUT_DEGAMMA BIT(1)
> +/* linearly interpolate between the points */
> +#define DRM_MODE_LUT_INTERPOLATE BIT(2)
> +/*
> + * the last value of the previous range is the
> + * first value of the current range.
> + */
> +#define DRM_MODE_LUT_REUSE_LAST BIT(3)
> +/* the curve must be non-decreasing */
> +#define DRM_MODE_LUT_NON_DECREASING BIT(4)
> +/* the curve is reflected across origin for negative inputs */
> +#define DRM_MODE_LUT_REFLECT_NEGATIVE BIT(5)
> +/* the same curve (red) is used for blue and green channels as well */
> +#define DRM_MODE_LUT_SINGLE_CHANNEL BIT(6)
> +
> +struct drm_color_lut_range {
> +	/* DRM_MODE_LUT_* */
> +	__u32 flags;
> +	/* number of points on the curve */
> +	__u16 count;
> +	/* input/output bits per component */
> +	__u8 input_bpc, output_bpc;
> +	/* input start/end values */
> +	__s32 start, end;
> +	/* output min/max values */
> +	__s32 min, max;
> +};
> +
> +enum lut_type {

Unprefixed type name in UAPI headers is probably not a good idea.

> +	LUT_TYPE_DEGAMMA = 0,
> +	LUT_TYPE_GAMMA = 1,
> +};

All the above stuff seems to be the same in your other patch series'
patch "[PATCH 1/9] drm: Add gamma mode property". Is this series
replacing the series "[PATCH 0/9] Enhance pipe color support for multi
segmented luts" or what does this mean?


Thanks,
pq

> +
> +/*
> + * Creating 64 bit palette entries for better data
> + * precision. This will be required for HDR and
> + * similar color processing usecases.
> + */
> +struct drm_color_lut_ext {
> +	/*
> +	 * Data is U32.32 fixed point format.
> +	 */
> +	__u64 red;
> +	__u64 green;
> +	__u64 blue;
> +	__u64 reserved;
> +};
> +
>  #define DRM_MODE_PAGE_FLIP_EVENT 0x01
>  #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
>  #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4


[-- Attachment #1.2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-06-02  9:33 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-01 10:51 [Intel-gfx] [PATCH 00/21] Add Support for Plane Color Lut and CSC features Uma Shankar
2021-06-01 10:51 ` [Intel-gfx] [PATCH 01/21] drm: Add Enhanced Gamma and color lut range attributes Uma Shankar
2021-06-02  9:33   ` Pekka Paalanen [this message]
2021-06-02 20:26     ` Shankar, Uma
2021-06-04 15:23       ` Harry Wentland
2021-06-07 17:19         ` Shankar, Uma
2021-06-01 10:51 ` [Intel-gfx] [PATCH 02/21] drm: Add Plane Degamma Mode property Uma Shankar
2021-06-04 18:24   ` Harry Wentland
2021-06-07 11:00     ` Pekka Paalanen
2021-06-07 17:34     ` Shankar, Uma
2021-06-08  8:34       ` Pekka Paalanen
2021-06-01 10:52 ` [Intel-gfx] [PATCH 03/21] drm: Add Plane Degamma Lut property Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 04/21] drm/i915/xelpd: Define Degamma Lut range struct for HDR planes Uma Shankar
2021-06-28 15:14   ` Harry Wentland
2021-06-30 11:36     ` Shankar, Uma
2021-06-01 10:52 ` [Intel-gfx] [PATCH 05/21] drm/i915/xelpd: Add register definitions for Plane Degamma Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 06/21] drm/i915/xelpd: Enable plane color features Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 07/21] drm/i915/xelpd: Add color capabilities of SDR planes Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 08/21] drm/i915/xelpd: Program Plane Degamma Registers Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 09/21] drm/i915/xelpd: Add plane color check to glk_plane_color_ctl Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 10/21] drm/i915/xelpd: Initialize plane color features Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 11/21] drm/i915/xelpd: Load plane color luts from atomic flip Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 12/21] drm: Add Plane CTM property Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 13/21] drm: Add helper to attach Plane ctm property Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 14/21] drm/i915/xelpd: Define Plane CSC Registers Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 15/21] drm/i915/xelpd: Enable Plane CSC Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 16/21] drm: Add Plane Gamma Mode property Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 17/21] drm: Add Plane Gamma Lut property Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 18/21] drm/i915/xelpd: Define and Initialize Plane Gamma Lut range Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 19/21] drm/i915/xelpd: Add register definitions for Plane Gamma Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 20/21] drm/i915/xelpd: Program Plane Gamma Registers Uma Shankar
2021-06-01 10:52 ` [Intel-gfx] [PATCH 21/21] drm/i915/xelpd: Enable plane gamma Uma Shankar
2021-06-01 13:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add Support for Plane Color Lut and CSC features Patchwork
2021-06-01 13:21 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-06-01 13:49 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-06-02  9:28 ` [Intel-gfx] [PATCH 00/21] " Pekka Paalanen
2021-06-02 20:22   ` Shankar, Uma
2021-06-02 23:42     ` Harry Wentland
2021-06-03  8:47       ` Pekka Paalanen
2021-06-03 12:30         ` Sebastian Wick
2021-06-03 12:58           ` Pekka Paalanen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210602123335.29045e06@eldfell \
    --to=ppaalanen@gmail.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=uma.shankar@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).