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Thu, 01 Jul 2021 01:14:13 -0700 (PDT) Date: Thu, 1 Jul 2021 11:14:10 +0300 From: Pekka Paalanen To: John Harrison Message-ID: <20210701111410.3fc6551e@eldfell> In-Reply-To: <05e1d462-57ae-888a-888c-3ad486150821@intel.com> References: <20210624070516.21893-1-matthew.brost@intel.com> <20210624070516.21893-48-matthew.brost@intel.com> <88cbe963-7188-f4ae-5acf-01a80bd2fe25@free.fr> <05e1d462-57ae-888a-888c-3ad486150821@intel.com> X-Mailer: Claws Mail 3.17.8 (GTK+ 2.24.33; x86_64-pc-linux-gnu) MIME-Version: 1.0 Subject: Re: [Intel-gfx] [PATCH 47/47] drm/i915/guc: Unblock GuC submission on Gen11+ X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Peres , intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Content-Type: multipart/mixed; boundary="===============1753468110==" Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" --===============1753468110== Content-Type: multipart/signed; boundary="Sig_/kYsol.Yx5eleTZ6uubSo3To"; protocol="application/pgp-signature"; micalg=pgp-sha256 --Sig_/kYsol.Yx5eleTZ6uubSo3To Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Wed, 30 Jun 2021 11:58:25 -0700 John Harrison wrote: > On 6/30/2021 01:22, Martin Peres wrote: > > On 24/06/2021 10:05, Matthew Brost wrote: =20 > >> From: Daniele Ceraolo Spurio > >> > >> Unblock GuC submission on Gen11+ platforms. > >> > >> Signed-off-by: Michal Wajdeczko > >> Signed-off-by: Daniele Ceraolo Spurio > >> Signed-off-by: Matthew Brost > >> --- > >> =C2=A0 drivers/gpu/drm/i915/gt/uc/intel_guc.h=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 1 + > >> =C2=A0 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c |=C2=A0 8 +++= +++++ > >> =C2=A0 drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h |=C2=A0 3 +-- > >> =C2=A0 drivers/gpu/drm/i915/gt/uc/intel_uc.c=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 14 +++++++++----- > >> =C2=A0 4 files changed, 19 insertions(+), 7 deletions(-) > >> ... > >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c=20 > >> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > >> index 7a69c3c027e9..61be0aa81492 100644 > >> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c > >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c > >> @@ -34,8 +34,15 @@ static void uc_expand_default_options(struct=20 > >> intel_uc *uc) > >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return; > >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } > >> =C2=A0 -=C2=A0=C2=A0=C2=A0 /* Default: enable HuC authentication only = */ > >> -=C2=A0=C2=A0=C2=A0 i915->params.enable_guc =3D ENABLE_GUC_LOAD_HUC; > >> +=C2=A0=C2=A0=C2=A0 /* Intermediate platforms are HuC authentication o= nly */ > >> +=C2=A0=C2=A0=C2=A0 if (IS_DG1(i915) || IS_ALDERLAKE_S(i915)) { > >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 drm_dbg(&i915->drm, "Disab= ling GuC only due to old=20 > >> platform\n"); =20 > > > > This comment does not seem accurate, given that DG1 is barely out, and= =20 > > ADL is not out yet. How about: > > > > "Disabling GuC on untested platforms"? > > =20 > Just because something is not in the shops yet does not mean it is new.=20 > Technology is always obsolete by the time it goes on sale. That is a very good reason to not use terminology like "new", "old", "current", "modern" etc. at all. End users like me definitely do not share your interpretation of "old". Thanks, pq > And the issue is not a lack of testing, it is a question of whether we=20 > are allowed to change the default on something that has already started=20 > being used by customers or not (including pre-release beta customers).=20 > I.e. it is basically a political decision not an engineering decision. --Sig_/kYsol.Yx5eleTZ6uubSo3To Content-Type: application/pgp-signature Content-Description: OpenPGP digital signature -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEJQjwWQChkWOYOIONI1/ltBGqqqcFAmDdeVIACgkQI1/ltBGq qqeQgRAAkIJvCZDu1CVdjVduAYd6syxsyXcxuaHOLl3dYGZdS4zjWxI4ky4E1cAf T9CwDnUz0yxkrHBVgkf4n29oDmHpAyeLbTxuK3+5hmqT5bw492hpH0qixeLzXXgO Co+DaQngcLmaUPWQIp0lOcQRBXVaaJkbJ6rxoI6p/LMlosl5K9wWc16SrGrtjlNA OndC9XkQbcJ+t/olb/0eOGqhAVqy2d7UPU1MvokxTpGvxveOUS0Im+4pCWDGjtoi Gz3CfKJs0nnXExkYbqEttGk4whgyvlLSf+QPASayF/RGmYh2ws0y74GsR4O+tB6h 0N34vqCvbpu5aiLFfprEr/vVVxtlGUzFeU2vavF9x1nGHlwrTvZUNsaImeRCJJIN meDcsZ2Q84yRdvncFSGAW3lXpqlhG5kkl6kBUkgGr3uPCn0eqFxj2KFZmiPu4fgv NLVYwKspA//xjIK1tW8PCGeYJmRwPPFS2MSoDuvIQLIKTOL27oJUsCDaTItDWweY 495HI63t14/sPdhrq+8//U1LXiJkdg7y9KizjdWvuCRKaS/UF7ydTMjPyAqK9qqf kKeWuO1l7Nhu0t2Z8nTdBrWebM6SFOcoDq/4BQKLVEWoMbRmfqBb4EWX41wjlNn1 JGYCuNechO32ASXbJHwxXWqKW4QCC83C+9onUW6zlLaxNOYAId4= =p7r+ -----END PGP SIGNATURE----- --Sig_/kYsol.Yx5eleTZ6uubSo3To-- --===============1753468110== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============1753468110==--