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From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 6/7] drm/i915/rkl: Wa_1408330847 no longer applies to RKL
Date: Fri, 16 Jul 2021 22:14:25 -0700	[thread overview]
Message-ID: <20210717051426.4120328-7-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20210717051426.4120328-1-matthew.d.roper@intel.com>

RKL doesn't have PSR2 support, so PSR2-related workarounds no longer
apply.

Bspec: 53273
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index d436490ab28c..0a3d42c8d47d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -592,9 +592,8 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
 		val |= EDP_PSR2_SU_SDP_SCANLINE;
 
 	if (intel_dp->psr.psr2_sel_fetch_enabled) {
-		/* WA 1408330847 */
-		if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
-		    IS_RKL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
+		/* Wa_1408330847 */
+		if (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
 			intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
 				     DIS_RAM_BYPASS_PSR2_MAN_TRACK,
 				     DIS_RAM_BYPASS_PSR2_MAN_TRACK);
@@ -1339,10 +1338,9 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	intel_psr_exit(intel_dp);
 	intel_psr_wait_exit_locked(intel_dp);
 
-	/* WA 1408330847 */
+	/* Wa_1408330847 */
 	if (intel_dp->psr.psr2_sel_fetch_enabled &&
-	    (IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0) ||
-	     IS_RKL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0)))
+	    IS_TGL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_A0))
 		intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
 			     DIS_RAM_BYPASS_PSR2_MAN_TRACK, 0);
 
-- 
2.25.4

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  parent reply	other threads:[~2021-07-17  5:14 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-17  5:14 [Intel-gfx] [PATCH 0/7] More workaround updates Matt Roper
2021-07-17  5:14 ` [Intel-gfx] [PATCH 1/7] drm/i915: Fix application of WaInPlaceDecompressionHang Matt Roper
2021-07-19 17:51   ` Souza, Jose
2021-07-17  5:14 ` [Intel-gfx] [PATCH 2/7] drm/i915/icl: Drop a couple unnecessary workarounds Matt Roper
2021-07-19 17:55   ` Souza, Jose
2021-07-17  5:14 ` [Intel-gfx] [PATCH 3/7] drm/i915: Program DFR enable/disable as a GT workaround Matt Roper
2021-07-19 17:57   ` Souza, Jose
2021-07-17  5:14 ` [Intel-gfx] [PATCH 4/7] drm/i915/adl_s: Wa_14011765242 is also needed on A1 display stepping Matt Roper
2021-07-19 17:59   ` Souza, Jose
2021-07-17  5:14 ` [Intel-gfx] [PATCH 5/7] drm/i915/rkl: Wa_1409767108 also applies to RKL Matt Roper
2021-07-19 18:00   ` Souza, Jose
2021-07-17  5:14 ` Matt Roper [this message]
2021-07-19 17:37   ` [Intel-gfx] [PATCH 6/7] drm/i915/rkl: Wa_1408330847 no longer " Souza, Jose
2021-07-17  5:14 ` [Intel-gfx] [PATCH 7/7] drm/i915: Make workaround upper bounds exclusive Matt Roper
2021-07-19 17:46   ` Souza, Jose
2021-08-10 12:58     ` Jani Nikula
2021-08-10 13:57       ` Vivi, Rodrigo
2021-07-17  5:41 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for More workaround updates Patchwork
2021-07-17  6:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-17 16:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-21 18:24   ` Matt Roper

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