[Intel-gfx] [CI 00/18] CI pass for reviewed Xe_HP SDV and DG2 patches

From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [CI 00/18] CI pass for reviewed Xe_HP SDV and DG2 patches
Date: Wed, 21 Jul 2021 15:30:25 -0700	[thread overview]
Message-ID: <20210721223043.834562-1-matthew.d.roper@intel.com> (raw)

We have enough reviews that we can start applying some of these patches;
let's kick off another CI run for the reviewed patches that don't have
dependencies on other unreviewed patches.

The plan is to apply the first couple patches (which have the
definitions like IS_XEHPSDV and IS_DG2) to a topic branch that gets
merged to both intel-next and gt-next.  Then the rest of the patches
should be able to be applied to whichever branch is appropriate after
that.

John Harrison (1):
  drm/i915/selftests: Allow for larger engine counts

Lucas De Marchi (2):
  drm/i915: Add XE_HP initial definitions
  drm/i915/xehpsdv: add initial XeHP SDV definitions

Matt Roper (10):
  drm/i915/dg2: add DG2 platform info
  drm/i915/dg2: Add fake PCH
  drm/i915/dg2: Add cdclk table and reference clock
  drm/i915/dg2: Skip shared DPLL handling
  drm/i915/dg2: Don't wait for AUX power well enable ACKs
  drm/i915/dg2: Setup display outputs
  drm/i915/dg2: Add dbuf programming
  drm/i915/dg2: Don't program BW_BUDDY registers
  drm/i915/dg2: Don't read DRAM info
  drm/i915/dg2: DG2 has fixed memory bandwidth

Paulo Zanoni (1):
  drm/i915: Fork DG1 interrupt handler

Prathap Kumar Valsan (1):
  drm/i915/xehp: New engine context offsets

Stuart Summers (1):
  drm/i915/xehp: Handle new device context ID format

Tvrtko Ursulin (1):
  drm/i915/xehp: VDBOX/VEBOX fusing registers are enable-based

Venkata Sandeep Dhanalakota (1):
  drm/i915/gen12: Use fuse info to enable SFC

 drivers/gpu/drm/i915/display/intel_bw.c       |  24 ++-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  22 ++-
 drivers/gpu/drm/i915/display/intel_display.c  |  17 ++-
 .../drm/i915/display/intel_display_power.c    |  20 +++
 .../drm/i915/display/intel_display_power.h    |  10 ++
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c |   5 +-
 drivers/gpu/drm/i915/gt/intel_engine_cs.c     |  39 ++++-
 .../drm/i915/gt/intel_execlists_submission.c  |  74 +++++++--
 drivers/gpu/drm/i915/gt/intel_lrc.c           |  73 ++++++++-
 drivers/gpu/drm/i915/gt/intel_lrc_reg.h       |   2 +
 drivers/gpu/drm/i915/gt/selftest_execlists.c  |  10 +-
 .../gpu/drm/i915/gt/selftest_workarounds.c    |  32 ++--
 drivers/gpu/drm/i915/i915_drv.h               |  33 +++-
 drivers/gpu/drm/i915/i915_irq.c               | 141 ++++++++++++------
 drivers/gpu/drm/i915/i915_pci.c               |  61 +++++++-
 drivers/gpu/drm/i915/i915_perf.c              |  29 ++--
 drivers/gpu/drm/i915/i915_reg.h               |   9 +-
 drivers/gpu/drm/i915/intel_device_info.c      |   2 +
 drivers/gpu/drm/i915/intel_device_info.h      |   7 +-
 drivers/gpu/drm/i915/intel_dram.c             |   6 +-
 drivers/gpu/drm/i915/intel_pch.c              |   3 +
 drivers/gpu/drm/i915/intel_pch.h              |   2 +
 drivers/gpu/drm/i915/intel_pm.c               | 120 ++++++++++++++-
 drivers/gpu/drm/i915/intel_step.c             |  30 +++-
 24 files changed, 657 insertions(+), 114 deletions(-)

-- 
2.25.4

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