From: Matt Roper <matthew.d.roper@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 5/6] drm/i915/gen12: Update shadowed register table
Date: Wed, 28 Jul 2021 22:41:17 -0700 [thread overview]
Message-ID: <20210729054118.2458523-6-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20210729054118.2458523-1-matthew.d.roper@intel.com>
The bspec lists many shadowed registers (i.e., registers for which we
don't need to grab forcewake when writing) that we weren't tracking in
the driver. Although we may not actually use all of these registers
right now, it's best to just match the bspec list exactly.
Note that the bspec also lists registers that are shadowed for various
HW-internal accesses; we can ignore those and just list the ones that
are shadowed for accesses from the IA/CPU.
Bspec: 52077
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 23 ++++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index 31e0456dce5a..42acf106a6df 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -984,23 +984,28 @@ static const struct i915_range gen11_shadowed_regs[] = {
static const struct i915_range gen12_shadowed_regs[] = {
{ .start = 0x2030, .end = 0x2030 },
- { .start = 0x2550, .end = 0x2550 },
+ { .start = 0x2510, .end = 0x2550 },
{ .start = 0xA008, .end = 0xA00C },
+ { .start = 0xA188, .end = 0xA188 },
+ { .start = 0xA278, .end = 0xA278 },
+ { .start = 0xA540, .end = 0xA56C },
+ { .start = 0xC4C8, .end = 0xC4C8 },
+ { .start = 0xC4D4, .end = 0xC4D4 },
+ { .start = 0xC600, .end = 0xC600 },
{ .start = 0x22030, .end = 0x22030 },
- { .start = 0x22550, .end = 0x22550 },
+ { .start = 0x22510, .end = 0x22550 },
{ .start = 0x1C0030, .end = 0x1C0030 },
- { .start = 0x1C0550, .end = 0x1C0550 },
+ { .start = 0x1C0510, .end = 0x1C0550 },
{ .start = 0x1C4030, .end = 0x1C4030 },
- { .start = 0x1C4550, .end = 0x1C4550 },
+ { .start = 0x1C4510, .end = 0x1C4550 },
{ .start = 0x1C8030, .end = 0x1C8030 },
- { .start = 0x1C8550, .end = 0x1C8550 },
+ { .start = 0x1C8510, .end = 0x1C8550 },
{ .start = 0x1D0030, .end = 0x1D0030 },
- { .start = 0x1D0550, .end = 0x1D0550 },
+ { .start = 0x1D0510, .end = 0x1D0550 },
{ .start = 0x1D4030, .end = 0x1D4030 },
- { .start = 0x1D4550, .end = 0x1D4550 },
+ { .start = 0x1D4510, .end = 0x1D4550 },
{ .start = 0x1D8030, .end = 0x1D8030 },
- { .start = 0x1D8550, .end = 0x1D8550 },
- /* TODO: Other registers are not yet used */
+ { .start = 0x1D8510, .end = 0x1D8550 },
};
static const struct i915_range xehp_shadowed_regs[] = {
--
2.25.4
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next prev parent reply other threads:[~2021-07-29 5:41 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-29 5:41 [Intel-gfx] [PATCH 0/6] Forcewake and shadowed register updates Matt Roper
2021-07-29 5:41 ` [Intel-gfx] [PATCH 1/6] drm/i915: correct name of GT forcewake domain in error messages Matt Roper
2021-07-29 14:13 ` Yokoyama, Caz
2021-07-29 5:41 ` [Intel-gfx] [PATCH 2/6] drm/i915: Re-use gen11 forcewake read functions on gen12 Matt Roper
2021-07-29 21:02 ` Yokoyama, Caz
2021-07-29 5:41 ` [Intel-gfx] [PATCH 3/6] drm/i915: Make shadow tables range-based Matt Roper
2021-07-29 15:21 ` [Intel-gfx] [PATCH v2 " Matt Roper
2021-07-29 21:55 ` Yokoyama, Caz
2021-07-29 21:59 ` Matt Roper
2021-08-10 22:02 ` Yokoyama, Caz
2021-07-29 5:41 ` [Intel-gfx] [PATCH 4/6] drm/i915/gen11: Update shadowed register table Matt Roper
2021-08-10 22:03 ` Yokoyama, Caz
2021-07-29 5:41 ` Matt Roper [this message]
2021-08-10 22:04 ` [Intel-gfx] [PATCH 5/6] drm/i915/gen12: " Yokoyama, Caz
2021-07-29 5:41 ` [Intel-gfx] [PATCH 6/6] drm/i915/xehp: Xe_HP shadowed registers are a strict superset of gen12 Matt Roper
2021-07-29 23:36 ` Yokoyama, Caz
2021-07-29 6:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Forcewake and shadowed register updates Patchwork
2021-07-29 6:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-29 13:00 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-07-29 20:33 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Forcewake and shadowed register updates (rev2) Patchwork
2021-07-29 20:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-30 8:36 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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