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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>
Subject: [Intel-gfx] [PATCH CI 07/10] drm/i915/bios: Enable parse of two DSI panels data
Date: Thu, 29 Jul 2021 14:55:42 -0700	[thread overview]
Message-ID: <20210729215545.192606-7-jose.souza@intel.com> (raw)
In-Reply-To: <20210729215545.192606-1-jose.souza@intel.com>

Continuing the conversion from single integrated VBT data to two, now
handling DSI data.

Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c       |  12 +-
 drivers/gpu/drm/i915/display/intel_bios.c    | 163 ++++++++++---------
 drivers/gpu/drm/i915/display/intel_bios.h    |   1 +
 drivers/gpu/drm/i915/display/intel_dsi.c     |   8 +-
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c |  58 ++++---
 drivers/gpu/drm/i915/display/intel_panel.c   |   3 +-
 drivers/gpu/drm/i915/display/vlv_dsi.c       |  14 +-
 drivers/gpu/drm/i915/i915_drv.h              |  30 ++--
 8 files changed, 161 insertions(+), 128 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 43ec7fcd3f5d2..0a8360d196cc7 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1846,7 +1846,8 @@ static void icl_dphy_param_init(struct intel_dsi *intel_dsi)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct mipi_config *mipi_config = vbt_dsi_info->config;
 	u32 tlpx_ns;
 	u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt;
 	u32 ths_prepare_ns, tclk_trail_ns;
@@ -1977,6 +1978,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
 	struct intel_connector *intel_connector;
 	struct drm_connector *connector;
 	struct drm_display_mode *fixed_mode;
+	const struct vbt_dsi_info *vbt_dsi_info;
 	enum port port;
 
 	if (!intel_bios_is_dsi_present(dev_priv, &port))
@@ -2044,13 +2046,15 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
 	intel_panel_init(&intel_connector->panel, fixed_mode, NULL);
 	intel_panel_setup_backlight(connector, INVALID_PIPE);
 
-	if (dev_priv->vbt.dsi.config->dual_link)
+	vbt_dsi_info = intel_bios_dsi_info(encoder);
+
+	if (vbt_dsi_info->config->dual_link)
 		intel_dsi->ports = BIT(PORT_A) | BIT(PORT_B);
 	else
 		intel_dsi->ports = BIT(port);
 
-	intel_dsi->dcs_backlight_ports = dev_priv->vbt.dsi.bl_ports;
-	intel_dsi->dcs_cabc_ports = dev_priv->vbt.dsi.cabc_ports;
+	intel_dsi->dcs_backlight_ports = vbt_dsi_info->bl_ports;
+	intel_dsi->dcs_cabc_ports = vbt_dsi_info->cabc_ports;
 
 	for_each_dsi_port(port, intel_dsi->ports) {
 		struct intel_dsi_host *host;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 40fa63336cd9d..aa98bef4b8a57 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1022,55 +1022,56 @@ parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb,
 }
 
 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
-				      u16 version, enum port port)
+				      u16 version, enum port port,
+				      struct ddi_vbt_port_info *info)
 {
-	if (!i915->vbt.dsi.config->dual_link || version < 197) {
-		i915->vbt.dsi.bl_ports = BIT(port);
-		if (i915->vbt.dsi.config->cabc_supported)
-			i915->vbt.dsi.cabc_ports = BIT(port);
+	if (!info->dsi.config->dual_link || version < 197) {
+		info->dsi.bl_ports = BIT(port);
+		if (info->dsi.config->cabc_supported)
+			info->dsi.cabc_ports = BIT(port);
 
 		return;
 	}
 
-	switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
+	switch (info->dsi.config->dl_dcs_backlight_ports) {
 	case DL_DCS_PORT_A:
-		i915->vbt.dsi.bl_ports = BIT(PORT_A);
+		info->dsi.bl_ports = BIT(PORT_A);
 		break;
 	case DL_DCS_PORT_C:
-		i915->vbt.dsi.bl_ports = BIT(PORT_C);
+		info->dsi.bl_ports = BIT(PORT_C);
 		break;
 	default:
 	case DL_DCS_PORT_A_AND_C:
-		i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
+		info->dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
 		break;
 	}
 
-	if (!i915->vbt.dsi.config->cabc_supported)
+	if (!info->dsi.config->cabc_supported)
 		return;
 
-	switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
+	switch (info->dsi.config->dl_dcs_cabc_ports) {
 	case DL_DCS_PORT_A:
-		i915->vbt.dsi.cabc_ports = BIT(PORT_A);
+		info->dsi.cabc_ports = BIT(PORT_A);
 		break;
 	case DL_DCS_PORT_C:
-		i915->vbt.dsi.cabc_ports = BIT(PORT_C);
+		info->dsi.cabc_ports = BIT(PORT_C);
 		break;
 	default:
 	case DL_DCS_PORT_A_AND_C:
-		i915->vbt.dsi.cabc_ports =
-					BIT(PORT_A) | BIT(PORT_C);
+		info->dsi.cabc_ports = BIT(PORT_A) | BIT(PORT_C);
 		break;
 	}
 }
 
 static void
 parse_mipi_config(struct drm_i915_private *i915,
-		  const struct bdb_header *bdb)
+		  const struct bdb_header *bdb,
+		  struct ddi_vbt_port_info *info,
+		  int panel_index)
 {
 	const struct bdb_mipi_config *start;
 	const struct mipi_config *config;
 	const struct mipi_pps_data *pps;
-	int panel_type = i915->vbt.panel_type;
 	enum port port;
 
 	/* parse MIPI blocks only if LFP type is MIPI */
@@ -1078,14 +1079,14 @@ parse_mipi_config(struct drm_i915_private *i915,
 		return;
 
 	/* Initialize this to undefined indicating no generic MIPI support */
-	i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
+	info->dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
 
 	/* Block #40 is already parsed and panel_fixed_mode is
 	 * stored in i915->lfp_lvds_vbt_mode
 	 * resuse this when needed
 	 */
 
-	/* Parse #52 for panel index used from panel_type already
+	/* Parse #52 for panel index used from panel_index already
 	 * parsed
 	 */
 	start = find_section(bdb, BDB_MIPI_CONFIG);
@@ -1095,27 +1096,27 @@ parse_mipi_config(struct drm_i915_private *i915,
 	}
 
 	drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
-		panel_type);
+		panel_index);
 
 	/*
 	 * get hold of the correct configuration block and pps data as per
-	 * the panel_type as index
+	 * the panel_index as index
 	 */
-	config = &start->config[panel_type];
-	pps = &start->pps[panel_type];
+	config = &start->config[panel_index];
+	pps = &start->pps[panel_index];
 
 	/* store as of now full data. Trim when we realise all is not needed */
-	i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
-	if (!i915->vbt.dsi.config)
+	info->dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
+	if (!info->dsi.config)
 		return;
 
-	i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
-	if (!i915->vbt.dsi.pps) {
-		kfree(i915->vbt.dsi.config);
+	info->dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
+	if (!info->dsi.pps) {
+		kfree(info->dsi.config);
 		return;
 	}
 
-	parse_dsi_backlight_ports(i915, bdb->version, port);
+	parse_dsi_backlight_ports(i915, bdb->version, port, info);
 
 	/* FIXME is the 90 vs. 270 correct? */
 	switch (config->rotation) {
@@ -1124,25 +1125,25 @@ parse_mipi_config(struct drm_i915_private *i915,
 		 * Most (all?) VBTs claim 0 degrees despite having
 		 * an upside down panel, thus we do not trust this.
 		 */
-		i915->vbt.dsi.orientation =
+		info->dsi.orientation =
 			DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
 		break;
 	case ENABLE_ROTATION_90:
-		i915->vbt.dsi.orientation =
+		info->dsi.orientation =
 			DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
 		break;
 	case ENABLE_ROTATION_180:
-		i915->vbt.dsi.orientation =
+		info->dsi.orientation =
 			DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
 		break;
 	case ENABLE_ROTATION_270:
-		i915->vbt.dsi.orientation =
+		info->dsi.orientation =
 			DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
 		break;
 	}
 
 	/* We have mandatory mipi config blocks. Initialize as generic panel */
-	i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
+	info->dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 }
 
 /* Find the sequence block and size for the given panel. */
@@ -1305,13 +1306,14 @@ static int goto_next_sequence_v3(const u8 *data, int index, int total)
  * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
  * skip all delay + gpio operands and stop at the first DSI packet op.
  */
-static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
+static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915,
+					      struct ddi_vbt_port_info *info)
 {
-	const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
+	const u8 *data = info->dsi.sequence[MIPI_SEQ_INIT_OTP];
 	int index, len;
 
 	if (drm_WARN_ON(&i915->drm,
-			!data || i915->vbt.dsi.seq_version != 1))
+			!data || info->dsi.seq_version != 1))
 		return 0;
 
 	/* index = 1 to skip sequence byte */
@@ -1339,7 +1341,8 @@ static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
  * these devices we split the init OTP sequence into a deassert sequence and
  * the actual init OTP part.
  */
-static void fixup_mipi_sequences(struct drm_i915_private *i915)
+static void fixup_mipi_sequences(struct drm_i915_private *i915,
+				 struct ddi_vbt_port_info *info)
 {
 	u8 *init_otp;
 	int len;
@@ -1349,18 +1352,18 @@ static void fixup_mipi_sequences(struct drm_i915_private *i915)
 		return;
 
 	/* Limit this to v1 vid-mode sequences */
-	if (i915->vbt.dsi.config->is_cmd_mode ||
-	    i915->vbt.dsi.seq_version != 1)
+	if (info->dsi.config->is_cmd_mode ||
+	    info->dsi.seq_version != 1)
 		return;
 
 	/* Only do this if there are otp and assert seqs and no deassert seq */
-	if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
-	    !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
-	    i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
+	if (!info->dsi.sequence[MIPI_SEQ_INIT_OTP] ||
+	    !info->dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
+	    info->dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
 		return;
 
 	/* The deassert-sequence ends at the first DSI packet */
-	len = get_init_otp_deassert_fragment_len(i915);
+	len = get_init_otp_deassert_fragment_len(i915, info);
 	if (!len)
 		return;
 
@@ -1368,26 +1371,27 @@ static void fixup_mipi_sequences(struct drm_i915_private *i915)
 		    "Using init OTP fragment to deassert reset\n");
 
 	/* Copy the fragment, update seq byte and terminate it */
-	init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
-	i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
-	if (!i915->vbt.dsi.deassert_seq)
+	init_otp = (u8 *)info->dsi.sequence[MIPI_SEQ_INIT_OTP];
+	info->dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
+	if (!info->dsi.deassert_seq)
 		return;
-	i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
-	i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
+	info->dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
+	info->dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
 	/* Use the copy for deassert */
-	i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
-		i915->vbt.dsi.deassert_seq;
+	info->dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
+		info->dsi.deassert_seq;
 	/* Replace the last byte of the fragment with init OTP seq byte */
 	init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
 	/* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
-	i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
+	info->dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
 }
 
 static void
 parse_mipi_sequence(struct drm_i915_private *i915,
-		    const struct bdb_header *bdb)
+		    const struct bdb_header *bdb,
+		    struct ddi_vbt_port_info *info,
+		    int panel_index)
 {
-	int panel_type = i915->vbt.panel_type;
 	const struct bdb_mipi_sequence *sequence;
 	const u8 *seq_data;
 	u32 seq_size;
@@ -1395,7 +1399,7 @@ parse_mipi_sequence(struct drm_i915_private *i915,
 	int index = 0;
 
 	/* Only our generic panel driver uses the sequence block. */
-	if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
+	if (info->dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
 		return;
 
 	sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
@@ -1416,7 +1420,7 @@ parse_mipi_sequence(struct drm_i915_private *i915,
 	drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
 		sequence->version);
 
-	seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
+	seq_data = find_panel_sequence_block(sequence, panel_index, &seq_size);
 	if (!seq_data)
 		return;
 
@@ -1441,7 +1445,7 @@ parse_mipi_sequence(struct drm_i915_private *i915,
 			drm_dbg_kms(&i915->drm,
 				    "Unsupported sequence %u\n", seq_id);
 
-		i915->vbt.dsi.sequence[seq_id] = data + index;
+		info->dsi.sequence[seq_id] = data + index;
 
 		if (sequence->version >= 3)
 			index = goto_next_sequence_v3(data, index, seq_size);
@@ -1454,18 +1458,18 @@ parse_mipi_sequence(struct drm_i915_private *i915,
 		}
 	}
 
-	i915->vbt.dsi.data = data;
-	i915->vbt.dsi.size = seq_size;
-	i915->vbt.dsi.seq_version = sequence->version;
+	info->dsi.data = data;
+	info->dsi.size = seq_size;
+	info->dsi.seq_version = sequence->version;
 
-	fixup_mipi_sequences(i915);
+	fixup_mipi_sequences(i915, info);
 
 	drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
 	return;
 
 err:
 	kfree(data);
-	memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
+	memset(info->dsi.sequence, 0, sizeof(info->dsi.sequence));
 }
 
 static void
@@ -1990,6 +1994,8 @@ static void parse_integrated_panel(struct drm_i915_private *i915,
 	parse_lfp_backlight(i915, bdb, info, panel_index);
 	parse_edp(i915, bdb, info, panel_index);
 	parse_psr(i915, bdb, info, panel_index);
+	parse_mipi_config(i915, bdb, info, panel_index);
+	parse_mipi_sequence(i915, bdb, info, panel_index);
 }
 
 static void parse_ddi_port(struct drm_i915_private *i915,
@@ -2487,8 +2493,6 @@ void intel_bios_init(struct drm_i915_private *i915)
 	parse_panel_type(i915, bdb);
 	parse_sdvo_panel_data(i915, bdb);
 	parse_driver_features(i915, bdb);
-	parse_mipi_config(i915, bdb);
-	parse_mipi_sequence(i915, bdb);
 
 	/* Depends on child device list */
 	parse_compression_parameters(i915, bdb);
@@ -2523,20 +2527,23 @@ void intel_bios_driver_remove(struct drm_i915_private *i915)
 	}
 
 	for (i = 0; i < I915_MAX_PORTS; i++) {
-		kfree(i915->vbt.ddi_port_info[i].lfp_lvds_vbt_mode);
-		i915->vbt.ddi_port_info[i].lfp_lvds_vbt_mode = NULL;
+		struct ddi_vbt_port_info *info = &i915->vbt.ddi_port_info[i];
+
+		kfree(info->lfp_lvds_vbt_mode);
+		info->lfp_lvds_vbt_mode = NULL;
+
+		kfree(info->dsi.data);
+		info->dsi.data = NULL;
+		kfree(info->dsi.pps);
+		info->dsi.pps = NULL;
+		kfree(info->dsi.config);
+		info->dsi.config = NULL;
+		kfree(info->dsi.deassert_seq);
+		info->dsi.deassert_seq = NULL;
 	}
 
 	kfree(i915->vbt.sdvo_lvds_vbt_mode);
 	i915->vbt.sdvo_lvds_vbt_mode = NULL;
-	kfree(i915->vbt.dsi.data);
-	i915->vbt.dsi.data = NULL;
-	kfree(i915->vbt.dsi.pps);
-	i915->vbt.dsi.pps = NULL;
-	kfree(i915->vbt.dsi.config);
-	i915->vbt.dsi.config = NULL;
-	kfree(i915->vbt.dsi.deassert_seq);
-	i915->vbt.dsi.deassert_seq = NULL;
 }
 
 /**
@@ -3150,3 +3157,11 @@ intel_bios_psr_info(struct intel_dp *intel_dp)
 
 	return &i915->vbt.ddi_port_info[encoder->port].psr;
 }
+
+const struct vbt_dsi_info *
+intel_bios_dsi_info(struct intel_encoder *encoder)
+{
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+	return &i915->vbt.ddi_port_info[encoder->port].dsi;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index c701871d9a74d..6e953a89c84cb 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -272,5 +272,6 @@ const struct drm_display_mode *intel_bios_lfp_lvds_info(struct intel_encoder *en
 const struct vbt_backlight_info *intel_bios_backlight_info(struct intel_encoder *encoder);
 struct vbt_edp_info *intel_bios_edp_info(struct intel_encoder *encoder);
 const struct vbt_psr_info *intel_bios_psr_info(struct intel_dp *intel_dp);
+const struct vbt_dsi_info *intel_bios_dsi_info(struct intel_encoder *encoder);
 
 #endif /* _INTEL_BIOS_H_ */
diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c
index f453ceb8d1494..2cd819a7f9dd6 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi.c
@@ -115,14 +115,10 @@ struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
 enum drm_panel_orientation
 intel_dsi_get_panel_orientation(struct intel_connector *connector)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(connector->encoder);
 	enum drm_panel_orientation orientation;
 
-	orientation = dev_priv->vbt.dsi.orientation;
-	if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
-		return orientation;
-
-	orientation = dev_priv->vbt.orientation;
+	orientation = vbt_dsi_info->orientation;
 	if (orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN)
 		return orientation;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index 2218de0773bf0..24de775ee7b30 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -225,9 +225,11 @@ static const u8 *mipi_exec_delay(struct intel_dsi *intel_dsi, const u8 *data)
 	return data;
 }
 
-static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
+static void vlv_exec_gpio(struct intel_dsi *intel_dsi,
 			  u8 gpio_source, u8 gpio_index, bool value)
 {
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
 	struct gpio_map *map;
 	u16 pconf0, padval;
 	u32 tmp;
@@ -241,7 +243,7 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 
 	map = &vlv_gpio_table[gpio_index];
 
-	if (dev_priv->vbt.dsi.seq_version >= 3) {
+	if (vbt_dsi_info->seq_version >= 3) {
 		/* XXX: this assumes vlv_gpio_table only has NC GPIOs. */
 		port = IOSF_PORT_GPIO_NC;
 	} else {
@@ -272,14 +274,16 @@ static void vlv_exec_gpio(struct drm_i915_private *dev_priv,
 	vlv_iosf_sb_put(dev_priv, BIT(VLV_IOSF_SB_GPIO));
 }
 
-static void chv_exec_gpio(struct drm_i915_private *dev_priv,
+static void chv_exec_gpio(struct intel_dsi *intel_dsi,
 			  u8 gpio_source, u8 gpio_index, bool value)
 {
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
 	u16 cfg0, cfg1;
 	u16 family_num;
 	u8 port;
 
-	if (dev_priv->vbt.dsi.seq_version >= 3) {
+	if (vbt_dsi_info->seq_version >= 3) {
 		if (gpio_index >= CHV_GPIO_IDX_START_SE) {
 			/* XXX: it's unclear whether 255->57 is part of SE. */
 			gpio_index -= CHV_GPIO_IDX_START_SE;
@@ -325,9 +329,10 @@ static void chv_exec_gpio(struct drm_i915_private *dev_priv,
 	vlv_iosf_sb_put(dev_priv, BIT(VLV_IOSF_SB_GPIO));
 }
 
-static void bxt_exec_gpio(struct drm_i915_private *dev_priv,
+static void bxt_exec_gpio(struct intel_dsi *intel_dsi,
 			  u8 gpio_source, u8 gpio_index, bool value)
 {
+	struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
 	/* XXX: this table is a quick ugly hack. */
 	static struct gpio_desc *bxt_gpio_table[U8_MAX + 1];
 	struct gpio_desc *gpio_desc = bxt_gpio_table[gpio_index];
@@ -351,14 +356,17 @@ static void bxt_exec_gpio(struct drm_i915_private *dev_priv,
 	gpiod_set_value(gpio_desc, value);
 }
 
-static void icl_exec_gpio(struct drm_i915_private *dev_priv,
+static void icl_exec_gpio(struct intel_dsi *intel_dsi,
 			  u8 gpio_source, u8 gpio_index, bool value)
 {
-	drm_dbg_kms(&dev_priv->drm, "Skipping ICL GPIO element execution\n");
+	struct drm_device *drm = intel_dsi->base.base.dev;
+
+	drm_dbg_kms(drm, "Skipping ICL GPIO element execution\n");
 }
 
 static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 {
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
 	struct drm_device *dev = intel_dsi->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	u8 gpio_source, gpio_index = 0, gpio_number;
@@ -366,13 +374,13 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 
 	drm_dbg_kms(&dev_priv->drm, "\n");
 
-	if (dev_priv->vbt.dsi.seq_version >= 3)
+	if (vbt_dsi_info->seq_version >= 3)
 		gpio_index = *data++;
 
 	gpio_number = *data++;
 
 	/* gpio source in sequence v2 only */
-	if (dev_priv->vbt.dsi.seq_version == 2)
+	if (vbt_dsi_info->seq_version == 2)
 		gpio_source = (*data >> 1) & 3;
 	else
 		gpio_source = 0;
@@ -381,13 +389,13 @@ static const u8 *mipi_exec_gpio(struct intel_dsi *intel_dsi, const u8 *data)
 	value = *data++ & 1;
 
 	if (DISPLAY_VER(dev_priv) >= 11)
-		icl_exec_gpio(dev_priv, gpio_source, gpio_index, value);
+		icl_exec_gpio(intel_dsi, gpio_source, gpio_index, value);
 	else if (IS_VALLEYVIEW(dev_priv))
-		vlv_exec_gpio(dev_priv, gpio_source, gpio_number, value);
+		vlv_exec_gpio(intel_dsi, gpio_source, gpio_number, value);
 	else if (IS_CHERRYVIEW(dev_priv))
-		chv_exec_gpio(dev_priv, gpio_source, gpio_number, value);
+		chv_exec_gpio(intel_dsi, gpio_source, gpio_number, value);
 	else
-		bxt_exec_gpio(dev_priv, gpio_source, gpio_index, value);
+		bxt_exec_gpio(intel_dsi, gpio_source, gpio_index, value);
 
 	return data;
 }
@@ -577,15 +585,16 @@ static const char *sequence_name(enum mipi_seq seq_id)
 static void intel_dsi_vbt_exec(struct intel_dsi *intel_dsi,
 			       enum mipi_seq seq_id)
 {
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
 	struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
 	const u8 *data;
 	fn_mipi_elem_exec mipi_elem_exec;
 
 	if (drm_WARN_ON(&dev_priv->drm,
-			seq_id >= ARRAY_SIZE(dev_priv->vbt.dsi.sequence)))
+			seq_id >= ARRAY_SIZE(vbt_dsi_info->sequence)))
 		return;
 
-	data = dev_priv->vbt.dsi.sequence[seq_id];
+	data = vbt_dsi_info->sequence[seq_id];
 	if (!data)
 		return;
 
@@ -598,7 +607,7 @@ static void intel_dsi_vbt_exec(struct intel_dsi *intel_dsi,
 	data++;
 
 	/* Skip Size of Sequence. */
-	if (dev_priv->vbt.dsi.seq_version >= 3)
+	if (vbt_dsi_info->seq_version >= 3)
 		data += 4;
 
 	while (1) {
@@ -614,7 +623,7 @@ static void intel_dsi_vbt_exec(struct intel_dsi *intel_dsi,
 			mipi_elem_exec = NULL;
 
 		/* Size of Operation. */
-		if (dev_priv->vbt.dsi.seq_version >= 3)
+		if (vbt_dsi_info->seq_version >= 3)
 			operation_size = *data++;
 
 		if (mipi_elem_exec) {
@@ -662,10 +671,10 @@ void intel_dsi_vbt_exec_sequence(struct intel_dsi *intel_dsi,
 
 void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec)
 {
-	struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
 
 	/* For v3 VBTs in vid-mode the delays are part of the VBT sequences */
-	if (is_vid_mode(intel_dsi) && dev_priv->vbt.dsi.seq_version >= 3)
+	if (is_vid_mode(intel_dsi) && vbt_dsi_info->seq_version >= 3)
 		return;
 
 	msleep(msec);
@@ -727,8 +736,9 @@ bool intel_dsi_vbt_init(struct intel_dsi *intel_dsi, u16 panel_id)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
-	struct mipi_pps_data *pps = dev_priv->vbt.dsi.pps;
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct mipi_config *mipi_config = vbt_dsi_info->config;
+	struct mipi_pps_data *pps = vbt_dsi_info->pps;
 	const struct drm_display_mode *mode = intel_bios_lfp_lvds_info(&intel_dsi->base);
 	u16 burst_mode_ratio;
 	enum port port;
@@ -870,7 +880,8 @@ void intel_dsi_vbt_gpio_init(struct intel_dsi *intel_dsi, bool panel_is_on)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct mipi_config *mipi_config = vbt_dsi_info->config;
 	enum gpiod_flags flags = panel_is_on ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
 	bool want_backlight_gpio = false;
 	bool want_panel_gpio = false;
@@ -925,7 +936,8 @@ void intel_dsi_vbt_gpio_cleanup(struct intel_dsi *intel_dsi)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct mipi_config *mipi_config = vbt_dsi_info->config;
 
 	if (intel_dsi->gpio_panel) {
 		gpiod_put(intel_dsi->gpio_panel);
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 9c892476d8621..92d93ddf28140 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -1924,6 +1924,7 @@ cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
 static int ext_pwm_setup_backlight(struct intel_connector *connector,
 				   enum pipe pipe)
 {
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(connector->encoder);
 	struct drm_device *dev = connector->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	struct intel_panel *panel = &connector->panel;
@@ -1931,7 +1932,7 @@ static int ext_pwm_setup_backlight(struct intel_connector *connector,
 	u32 level;
 
 	/* Get the right PWM chip for DSI backlight according to VBT */
-	if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) {
+	if (vbt_dsi_info->config->pwm_blc == PPS_BLC_PMIC) {
 		panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight");
 		desc = "PMIC";
 	} else {
diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c
index 0ee4ff341e25d..0758726fa19bd 100644
--- a/drivers/gpu/drm/i915/display/vlv_dsi.c
+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c
@@ -780,6 +780,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,
 				 const struct drm_connector_state *conn_state)
 {
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
 	struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 	enum pipe pipe = crtc->pipe;
@@ -837,7 +838,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state,
 	 * the delay in that case. If there is no deassert-seq, then an
 	 * unconditional msleep is used to give the panel time to power-on.
 	 */
-	if (dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]) {
+	if (vbt_dsi_info->sequence[MIPI_SEQ_DEASSERT_RESET]) {
 		intel_dsi_msleep(intel_dsi, intel_dsi->panel_on_delay);
 		intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
 	} else {
@@ -1665,7 +1666,8 @@ static void vlv_dphy_param_init(struct intel_dsi *intel_dsi)
 {
 	struct drm_device *dev = intel_dsi->base.base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
+	const struct vbt_dsi_info *vbt_dsi_info = intel_bios_dsi_info(&intel_dsi->base);
+	struct mipi_config *mipi_config = vbt_dsi_info->config;
 	u32 tlpx_ns, extra_byte_count, tlpx_ui;
 	u32 ui_num, ui_den;
 	u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt;
@@ -1835,6 +1837,7 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
 	struct intel_connector *intel_connector;
 	struct drm_connector *connector;
 	struct drm_display_mode *current_mode, *fixed_mode;
+	const struct vbt_dsi_info *vbt_dsi_info;
 	enum port port;
 	enum pipe pipe;
 
@@ -1898,14 +1901,15 @@ void vlv_dsi_init(struct drm_i915_private *dev_priv)
 		intel_encoder->pipe_mask = BIT(PIPE_B);
 
 	intel_dsi->panel_power_off_time = ktime_get_boottime();
+	vbt_dsi_info = intel_bios_dsi_info(intel_encoder);
 
-	if (dev_priv->vbt.dsi.config->dual_link)
+	if (vbt_dsi_info->config->dual_link)
 		intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);
 	else
 		intel_dsi->ports = BIT(port);
 
-	intel_dsi->dcs_backlight_ports = dev_priv->vbt.dsi.bl_ports;
-	intel_dsi->dcs_cabc_ports = dev_priv->vbt.dsi.cabc_ports;
+	intel_dsi->dcs_backlight_ports = vbt_dsi_info->bl_ports;
+	intel_dsi->dcs_cabc_ports = vbt_dsi_info->cabc_ports;
 
 	/* Create a DSI host (and a device) for each port. */
 	for_each_dsi_port(port, intel_dsi->ports) {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2db6c4461b39e..3535759796033 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -693,6 +693,21 @@ struct ddi_vbt_port_info {
 		int tp2_tp3_wakeup_time_us;
 		int psr2_tp2_tp3_wakeup_time_us;
 	} psr;
+
+	/* MIPI DSI */
+	struct vbt_dsi_info {
+		u16 panel_id;
+		struct mipi_config *config;
+		struct mipi_pps_data *pps;
+		u16 bl_ports;
+		u16 cabc_ports;
+		u8 seq_version;
+		u32 size;
+		u8 *data;
+		const u8 *sequence[MIPI_SEQ_MAX];
+		u8 *deassert_seq; /* Used by fixup_mipi_sequences() */
+		enum drm_panel_orientation orientation;
+	} dsi;
 };
 
 struct intel_vbt_data {
@@ -713,21 +728,6 @@ struct intel_vbt_data {
 	unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
 	enum drm_panel_orientation orientation;
 
-	/* MIPI DSI */
-	struct {
-		u16 panel_id;
-		struct mipi_config *config;
-		struct mipi_pps_data *pps;
-		u16 bl_ports;
-		u16 cabc_ports;
-		u8 seq_version;
-		u32 size;
-		u8 *data;
-		const u8 *sequence[MIPI_SEQ_MAX];
-		u8 *deassert_seq; /* Used by fixup_mipi_sequences() */
-		enum drm_panel_orientation orientation;
-	} dsi;
-
 	int crt_ddc_pin;
 
 	struct list_head display_devices;
-- 
2.32.0

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  parent reply	other threads:[~2021-07-29 21:51 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-07-29 21:55 [Intel-gfx] [PATCH CI 01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port() José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 02/10] drm/i915/bios: Start to support two integrated panels José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 03/10] drm/i915/bios: Enable parse of two integrated panels timing data José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 04/10] drm/i915/bios: Enable parse of two integrated panels backlight data José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 05/10] drm/i915/bios: Enable parse of two integrated panels eDP data José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 06/10] drm/i915/bios: Enable parse of two integrated panels PSR data José Roberto de Souza
2021-07-29 21:55 ` José Roberto de Souza [this message]
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 08/10] drm/i915/bios: Nuke panel_type José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 09/10] drm/i915/bios: Only use opregion panel index for display ver 8 and older José Roberto de Souza
2021-07-29 21:55 ` [Intel-gfx] [PATCH CI 10/10] drm/i915/display/tgl+: Use PPS index from vbt José Roberto de Souza
2021-07-29 22:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,01/10] drm/i915/bios: Allow DSI ports to be parsed by parse_ddi_port() Patchwork
2021-07-29 22:01 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-07-29 22:26 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-30  9:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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