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* [Intel-gfx] [PATCH i-g-t v3 01/11] lib/i915/gem_mman: add FIXED mmap mode
@ 2021-07-30  8:53 Matthew Auld
  2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
                   ` (9 more replies)
  0 siblings, 10 replies; 16+ messages in thread
From: Matthew Auld @ 2021-07-30  8:53 UTC (permalink / raw)
  To: igt-dev; +Cc: Daniel Vetter, intel-gfx

We need this for discrete.

v2(Ashutosh):
 - use the new i915_drm_local.h infrastructure, and drop the LOCAL prefix

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ramalingam C <ramalingam.c@intel.com>
---
 lib/i915/gem_mman.c       | 36 ++++++++++++++++++++++++++++++++++++
 lib/i915/gem_mman.h       |  4 ++++
 lib/i915/i915_drm_local.h |  2 ++
 3 files changed, 42 insertions(+)

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
index 4b4f2114..11df0d76 100644
--- a/lib/i915/gem_mman.c
+++ b/lib/i915/gem_mman.c
@@ -27,6 +27,7 @@
 #include <errno.h>
 
 #include "igt_core.h"
+#include "igt_gt.h"
 #include "igt_device.h"
 #include "ioctl_wrappers.h"
 #include "intel_chipset.h"
@@ -497,6 +498,41 @@ void *gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
 	return ptr;
 }
 
+void *__gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			       uint64_t size, unsigned prot)
+{
+	return __gem_mmap_offset(fd, handle, offset, size, prot,
+				 I915_MMAP_OFFSET_FIXED);
+}
+
+/**
+ * gem_mmap_offset__fixed: Used to mmap objects on discrete platforms
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ *
+ * Like __gem_mmap_offset__fixed() except we assert on failure.
+ *
+ * For discrete the caching attributes for the pages are fixed at allocation
+ * time, and can't be changed. The FIXED mode will simply use the same caching *
+ * mode of the allocated pages. This mode will always be coherent with GPU
+ * access.
+ *
+ * On non-discrete platforms this mode is not supported.
+ *
+ * Returns: A pointer to the created memory mapping
+ */
+void *gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			   uint64_t size, unsigned prot)
+{
+	void *ptr = __gem_mmap_offset__fixed(fd, handle, offset, size, prot);
+
+	igt_assert(ptr);
+	return ptr;
+}
+
 /**
  * __gem_mmap__cpu_coherent:
  * @fd: open i915 drm file descriptor
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
index 5695d2ad..290c997d 100644
--- a/lib/i915/gem_mman.h
+++ b/lib/i915/gem_mman.h
@@ -37,6 +37,8 @@ bool gem_mmap_offset__has_wc(int fd);
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
 void *gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
 			  uint64_t size, unsigned prot);
+void *gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			     uint64_t size, unsigned prot);
 void *gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 				uint64_t size, unsigned prot);
 void *gem_mmap__cpu_coherent(int fd, uint32_t handle, uint64_t offset,
@@ -54,6 +56,8 @@ void *__gem_mmap_offset__cpu(int fd, uint32_t handle, uint64_t offset,
 void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
 void *__gem_mmap_offset__wc(int fd, uint32_t handle, uint64_t offset,
 			    uint64_t size, unsigned prot);
+void *__gem_mmap_offset__fixed(int fd, uint32_t handle, uint64_t offset,
+			       uint64_t size, unsigned prot);
 void *__gem_mmap__device_coherent(int fd, uint32_t handle, uint64_t offset,
 				  uint64_t size, unsigned prot);
 void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size,
diff --git a/lib/i915/i915_drm_local.h b/lib/i915/i915_drm_local.h
index dd646aed..0e3cef81 100644
--- a/lib/i915/i915_drm_local.h
+++ b/lib/i915/i915_drm_local.h
@@ -20,6 +20,8 @@ extern "C" {
  * clean these up when kernel uapi headers are sync'd.
  */
 
+#define I915_MMAP_OFFSET_FIXED 4
+
 #if defined(__cplusplus)
 }
 #endif
-- 
2.26.3

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^ permalink raw reply	[flat|nested] 16+ messages in thread

end of thread, other threads:[~2021-08-06 10:11 UTC | newest]

Thread overview: 16+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-07-30  8:53 [Intel-gfx] [PATCH i-g-t v3 01/11] lib/i915/gem_mman: add FIXED mmap mode Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 02/11] lib/i915/gem_mman: add fixed mode to mmap__device_coherent Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 03/11] lib/i915/gem_mman: add fixed mode to gem_mmap_offset__cpu Matthew Auld
2021-08-02  6:29   ` Dixit, Ashutosh
2021-08-06 10:00     ` Maarten Lankhorst
2021-08-06 10:10     ` Maarten Lankhorst
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 04/11] lib/i915/gem_mman: add fixed mode to gem_mmap__cpu Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 05/11] lib/i915/gem_mman: update mmap_offset_types with FIXED Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 06/11] lib/ioctl_wrappers: update mmap_{read, write} for discrete Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 07/11] lib/intel_bufops: " Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 08/11] lib/ioctl_wrappers: update set_domain " Matthew Auld
2021-08-02  6:24   ` Dixit, Ashutosh
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 09/11] tests/i915/module_load: update " Matthew Auld
2021-08-02  6:25   ` Dixit, Ashutosh
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 10/11] lib/i915/gem_mman: add helper query for has_device_coherent Matthew Auld
2021-07-30  8:53 ` [Intel-gfx] [PATCH i-g-t v3 11/11] tests/i915/gem_exec_fence: use device_coherent mmap Matthew Auld

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