From: Vinod Govindapillai <vinod.govindapillai@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@intel.com
Subject: [Intel-gfx] [PATCH v1 2/2] drm/i915/reg: use the correct register to access SAGV block time
Date: Wed, 22 Mar 2023 03:01:38 +0200 [thread overview]
Message-ID: <20230322010138.663264-3-vinod.govindapillai@intel.com> (raw)
In-Reply-To: <20230322010138.663264-1-vinod.govindapillai@intel.com>
Wrong register address is used to read the SAG block time. Fix
the register address according to the bspec.
Bspec: 64608
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ae8ba090c0f4..b2ed3c0fee4c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7716,7 +7716,7 @@ enum skl_power_gate {
#define MTL_LATENCY_LEVEL_EVEN_MASK REG_GENMASK(12, 0)
#define MTL_LATENCY_LEVEL_ODD_MASK REG_GENMASK(28, 16)
-#define MTL_LATENCY_SAGV _MMIO(0x4578b)
+#define MTL_LATENCY_SAGV _MMIO(0x4578c)
#define MTL_LATENCY_QCLK_SAGV REG_GENMASK(12, 0)
#define MTL_MEM_SS_INFO_GLOBAL _MMIO(0x45700)
--
2.34.1
next prev parent reply other threads:[~2023-03-22 1:02 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-22 1:01 [Intel-gfx] [PATCH v1 0/2] Correction to QGV related register addresses Vinod Govindapillai
2023-03-22 1:01 ` [Intel-gfx] [PATCH v1 1/2] drm/i915/reg: fix QGV points register access offsets Vinod Govindapillai
2023-03-22 8:25 ` Lisovskiy, Stanislav
2023-03-22 1:01 ` Vinod Govindapillai [this message]
2023-03-22 8:26 ` [Intel-gfx] [PATCH v1 2/2] drm/i915/reg: use the correct register to access SAGV block time Lisovskiy, Stanislav
2023-03-22 14:03 ` Ville Syrjälä
2023-03-22 5:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correction to QGV related register addresses Patchwork
2023-03-22 5:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-03-22 5:46 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2023-03-22 5:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-03-22 9:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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