From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE4C9C76196 for ; Fri, 31 Mar 2023 22:12:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3D0D310E2E4; Fri, 31 Mar 2023 22:12:51 +0000 (UTC) Received: from mail-yb1-xb2a.google.com (mail-yb1-xb2a.google.com [IPv6:2607:f8b0:4864:20::b2a]) by gabe.freedesktop.org (Postfix) with ESMTPS id 991E710F326 for ; Fri, 31 Mar 2023 22:12:35 +0000 (UTC) Received: by mail-yb1-xb2a.google.com with SMTP id e65so29001647ybh.10 for ; Fri, 31 Mar 2023 15:12:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1680300755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gbsW0FcE5qqhDIMlHuiVbXHRMEHkoDZZEt/YtNg2DNM=; b=FvQAvC3TAZE9QE7W+H8Y6xq0+90J+AkW9Jq3WfZu1mXlXG9GIX2cQkzK8LehXPaZe8 XZy9U3wkpFLYGZztz86NMDdQV69wFvoFgI3SkxSs6Vmn8Q7aJhTJlDFFbGOQu1GV1TWk wzd3Od3pdOCll8RyKStkF4G4OWC5IFoyT3OWw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1680300755; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gbsW0FcE5qqhDIMlHuiVbXHRMEHkoDZZEt/YtNg2DNM=; b=Uz16pSZVZ9pFtxFzxN1j11g/huJT6sXUzXZerFFPn/xqfGZHkFQ1bBGlR6wkA8a6wo d+xAFN6iuIqhtZfnY1dXy/DX8cAgivKrxgSvpFxLIGeUf5gP6bXaaq1YyozkONdl4Q+d tNKt89fUca2VL6thNc61bKfQzo4AaehmMxmCjdh90eUrcHT/6REObJzLZb+MaK2MNBch DfzTIS1wgtyJLIN7mIKysKIGZgiI8eNBwJoAJjRp/sPZdNK9Iln0f3IVbFmJDRcq+tOJ eM+J6Y+6vMTZk2ZjVcqs2sc+ofSIdABijrDmhDMUxq1vRUKWy9tJN3qyjfy0cPlbzCe/ h3BQ== X-Gm-Message-State: AAQBX9fGFp17MdGHJz19Qtgb/6PPvQs7EE/K5SYYlj4GLYlmRhL0bSdJ YVQIGMQ9BA/NMmd6HxETZnxBDw== X-Google-Smtp-Source: AKy350Zwij10RXkh5IOn5YyhAQQl1uJBaGHEDTVmJ///DgObvKiniO3Hppma1Q1jCpKg4AeBU8jdTw== X-Received: by 2002:a25:b122:0:b0:b60:d281:de97 with SMTP id g34-20020a25b122000000b00b60d281de97mr8813526ybj.28.1680300754850; Fri, 31 Mar 2023 15:12:34 -0700 (PDT) Received: from localhost ([2620:0:1035:15:a8f6:869a:3ef5:e1d]) by smtp.gmail.com with UTF8SMTPSA id p7-20020a81b107000000b00545a782b485sm787373ywh.113.2023.03.31.15.12.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 31 Mar 2023 15:12:34 -0700 (PDT) From: Mark Yacoub X-Google-Original-From: Mark Yacoub To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , David Airlie , Daniel Vetter , Rob Herring , Krzysztof Kozlowski , Kuogee Hsieh Date: Fri, 31 Mar 2023 18:12:10 -0400 Message-Id: <20230331221213.1691997-9-markyacoub@google.com> X-Mailer: git-send-email 2.40.0.348.gf938b09366-goog In-Reply-To: <20230331221213.1691997-1-markyacoub@google.com> References: <20230331221213.1691997-1-markyacoub@google.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Intel-gfx] [PATCH v8 08/10] dt-bindings: msm/dp: Add bindings for HDCP registers X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , devicetree@vger.kernel.org, Mark Yacoub , intel-gfx@lists.freedesktop.org, dianders@chromium.org, dri-devel@lists.freedesktop.org, Stephen Boyd , seanpaul@chromium.org, linux-arm-msm@vger.kernel.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Sean Paul Add the bindings for the MSM DisplayPort HDCP registers which are required to write the HDCP key into the display controller as well as the registers to enable HDCP authentication/key exchange/encryption. Cc: Rob Herring Cc: Stephen Boyd Reviewed-by: Rob Herring Reviewed-by: Douglas Anderson Signed-off-by: Sean Paul Signed-off-by: Mark Yacoub --- Changes in v2: -Drop register range names (Stephen) -Fix yaml errors (Rob) Changes in v3: -Add new compatible string for dp-hdcp -Add descriptions to reg -Add minItems/maxItems to reg -Make reg depend on the new hdcp compatible string Changes in v4: -Rebase on Bjorn's multi-dp patchset Changes in v4.5: -Remove maxItems from reg (Rob) -Remove leading zeros in example (Rob) Changes in v5: -None Changes in v6: -Rebased: modify minItems instead of adding it as new line. Changes in v7: -Revert the change to minItems -Added the maxItems to Reg Changes in v8: -None .../devicetree/bindings/display/msm/dp-controller.yaml | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 0e8d8df686dc9..4763a2ff12fb7 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -34,6 +34,8 @@ properties: - description: link register block - description: p0 register block - description: p1 register block + - description: (Optional) Registers for HDCP device key injection + - description: (Optional) Registers for HDCP TrustZone interaction interrupts: maxItems: 1 @@ -159,6 +161,7 @@ allOf: aux-bus: false reg: minItems: 5 + maxItems: 7 required: - "#sound-dai-cells" @@ -176,7 +179,9 @@ examples: <0xae90200 0x200>, <0xae90400 0xc00>, <0xae91000 0x400>, - <0xae91400 0x400>; + <0xae91400 0x400>, + <0xaed1000 0x174>, + <0xaee1000 0x2c>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, -- 2.40.0.348.gf938b09366-goog