From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: jani.nikula@intel.com, Nischal Varide <nischal.varide@intel.com>
Subject: [Intel-gfx] [PATCH 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+
Date: Mon, 25 Jan 2021 17:52:28 +0200 [thread overview]
Message-ID: <3d3a76fc54f0049f840abf7d364c9ffb423483a8.1611589818.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1611589818.git.jani.nikula@intel.com>
Read and debug log the eDP sink MSO configuration. Do not actually do
anything with the information yet besides logging.
v2: Rename intel_dp_mso_init -> intel_edp_mso_init
Cc: Nischal Varide <nischal.varide@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 32 +++++++++++++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 927a8aeae324..59fe86fe4e4d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1438,6 +1438,7 @@ struct intel_dp {
int max_link_lane_count;
/* Max rate for the current link */
int max_link_rate;
+ int mso_link_count;
/* sink or branch descriptor */
struct drm_dp_desc desc;
struct drm_dp_aux aux;
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 7b4dd55021dc..23f98e8dd7df 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3512,6 +3512,36 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)
}
}
+static void intel_edp_mso_init(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ u8 mso;
+
+ if (intel_dp->edp_dpcd[0] < DP_EDP_14)
+ return;
+
+ if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_MSO_LINK_CAPABILITIES, &mso) != 1) {
+ drm_err(&i915->drm, "Failed to read MSO cap\n");
+ return;
+ }
+
+ /* Valid configurations are SST or MSO 2x1, 2x2, 4x1 */
+ mso &= DP_EDP_MSO_NUMBER_OF_LINKS_MASK;
+ if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) {
+ drm_err(&i915->drm, "Invalid MSO link count cap %u\n", mso);
+ mso = 0;
+ }
+
+ if (mso) {
+ drm_dbg_kms(&i915->drm, "Sink MSO %ux%u configuration\n",
+ mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso);
+ drm_err(&i915->drm, "No source MSO support, disabling\n");
+ mso = 0;
+ }
+
+ intel_dp->mso_link_count = mso;
+}
+
static bool
intel_edp_init_dpcd(struct intel_dp *intel_dp)
{
@@ -3595,6 +3625,8 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
*/
intel_edp_init_source_oui(intel_dp, true);
+ intel_edp_mso_init(intel_dp);
+
return true;
}
--
2.20.1
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next prev parent reply other threads:[~2021-01-25 15:53 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 15:52 [Intel-gfx] [PATCH 0/9] drm/i915/edp: enable MSO... maybe Jani Nikula
2021-01-25 15:52 ` [Intel-gfx] [PATCH 1/9] drm/dp: add MSO related DPCD registers Jani Nikula
2021-01-25 15:52 ` [Intel-gfx] [PATCH 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode Jani Nikula
2021-01-25 16:40 ` Ville Syrjälä
2021-01-25 15:52 ` [Intel-gfx] [PATCH 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes() Jani Nikula
2021-01-25 15:52 ` Jani Nikula [this message]
2021-01-25 15:52 ` [Intel-gfx] [PATCH 5/9] drm/i915/reg: add stream splitter configuration definitions Jani Nikula
2021-01-25 15:52 ` [Intel-gfx] [PATCH 6/9] drm/i915/mso: add state readout for platforms that support it Jani Nikula
2021-01-25 16:43 ` Ville Syrjälä
2021-01-25 15:52 ` [Intel-gfx] [PATCH 7/9] drm/i915/mso: add state check Jani Nikula
2021-01-25 15:52 ` [Intel-gfx] [PATCH 8/9] drm/i915/edp: modify fixed and downclock modes for MSO Jani Nikula
2021-01-25 15:52 ` [Intel-gfx] [PATCH 9/9] drm/i915/edp: enable eDP MSO during link training Jani Nikula
2021-01-25 18:53 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/edp: enable MSO... maybe Patchwork
2021-01-25 19:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-26 0:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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