From: "Christian König" <christian.koenig@amd.com>
To: Daniel Vetter <daniel.vetter@ffwll.ch>,
Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"David Airlie" <airlied@linux.ie>,
"Maxime Ripard" <mripard@kernel.org>,
"DRI Development" <dri-devel@lists.freedesktop.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Daniel Vetter" <daniel.vetter@intel.com>
Subject: Re: [Intel-gfx] [PATCH v4 3/4] drm/shmem-helpers: Allocate wc pages on x86
Date: Wed, 14 Jul 2021 13:54:50 +0200 [thread overview]
Message-ID: <4626a7d7-95ca-104c-753a-07a9d83b0b28@amd.com> (raw)
In-Reply-To: <20210713205153.1896059-4-daniel.vetter@ffwll.ch>
Am 13.07.21 um 22:51 schrieb Daniel Vetter:
> intel-gfx-ci realized that something is not quite coherent anymore on
> some platforms for our i915+vgem tests, when I tried to switch vgem
> over to shmem helpers.
>
> After lots of head-scratching I realized that I've removed calls to
> drm_clflush. And we need those. To make this a bit cleaner use the
> same page allocation tooling as ttm, which does internally clflush
> (and more, as neeeded on any platform instead of just the intel x86
> cpus i915 can be combined with).
>
> Unfortunately this doesn't exist on arm, or as a generic feature. For
> that I think only the dma-api can get at wc memory reliably, so maybe
> we'd need some kind of GFP_WC flag to do this properly.
The problem is that this stuff is extremely architecture specific. So
GFP_WC and GFP_UNCACHED are really what we should aim for in the long term.
And as far as I know we have at least the following possibilities how it
is implemented:
* A fixed amount of registers which tells the CPU the caching behavior
for a memory region, e.g. MTRR.
* Some bits of the memory pointers used, e.g. you see the same memory at
different locations with different caching attributes.
* Some bits in the CPUs page table.
* Some bits in a separate page table.
On top of that there is the PCIe specification which defines non-cache
snooping access as an extension.
Mixing that with the CPU caching behavior gets you some really nice ways
to break a driver. In general x86 seems to be rather graceful, but arm
and PowerPC are easily pissed if you mess that up.
> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Christian König <christian.koenig@amd.com>
> Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Cc: Maxime Ripard <mripard@kernel.org>
> Cc: Thomas Zimmermann <tzimmermann@suse.de>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel@ffwll.ch>
Acked-by: Christian könig <christian.koenig@amd.com>
Regards,
Christian.
> ---
> drivers/gpu/drm/drm_gem_shmem_helper.c | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_gem_shmem_helper.c b/drivers/gpu/drm/drm_gem_shmem_helper.c
> index 296ab1b7c07f..657d2490aaa5 100644
> --- a/drivers/gpu/drm/drm_gem_shmem_helper.c
> +++ b/drivers/gpu/drm/drm_gem_shmem_helper.c
> @@ -10,6 +10,10 @@
> #include <linux/slab.h>
> #include <linux/vmalloc.h>
>
> +#ifdef CONFIG_X86
> +#include <asm/set_memory.h>
> +#endif
> +
> #include <drm/drm.h>
> #include <drm/drm_device.h>
> #include <drm/drm_drv.h>
> @@ -162,6 +166,11 @@ static int drm_gem_shmem_get_pages_locked(struct drm_gem_shmem_object *shmem)
> return PTR_ERR(pages);
> }
>
> +#ifdef CONFIG_X86
> + if (shmem->map_wc)
> + set_pages_array_wc(pages, obj->size >> PAGE_SHIFT);
> +#endif
> +
> shmem->pages = pages;
>
> return 0;
> @@ -203,6 +212,11 @@ static void drm_gem_shmem_put_pages_locked(struct drm_gem_shmem_object *shmem)
> if (--shmem->pages_use_count > 0)
> return;
>
> +#ifdef CONFIG_X86
> + if (shmem->map_wc)
> + set_pages_array_wb(shmem->pages, obj->size >> PAGE_SHIFT);
> +#endif
> +
> drm_gem_put_pages(obj, shmem->pages,
> shmem->pages_mark_dirty_on_put,
> shmem->pages_mark_accessed_on_put);
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next prev parent reply other threads:[~2021-07-14 11:55 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-13 20:51 [Intel-gfx] [PATCH v4 0/4] shmem helpers for vgem Daniel Vetter
2021-07-13 20:51 ` [Intel-gfx] [PATCH v4 1/4] dma-buf: Require VM_PFNMAP vma for mmap Daniel Vetter
2021-07-23 18:45 ` Thomas Zimmermann
2021-07-13 20:51 ` [Intel-gfx] [PATCH v4 2/4] drm/shmem-helper: Switch to vmf_insert_pfn Daniel Vetter
2021-07-22 18:22 ` Thomas Zimmermann
2021-07-23 7:32 ` Daniel Vetter
2021-08-12 13:05 ` Daniel Vetter
2021-07-13 20:51 ` [Intel-gfx] [PATCH v4 3/4] drm/shmem-helpers: Allocate wc pages on x86 Daniel Vetter
2021-07-14 11:54 ` Christian König [this message]
2021-07-14 12:48 ` Daniel Vetter
2021-07-14 12:58 ` Christian König
2021-07-14 16:16 ` Daniel Vetter
2021-07-22 18:40 ` Thomas Zimmermann
2021-07-23 7:36 ` Daniel Vetter
2021-07-23 8:02 ` Christian König
2021-07-23 8:34 ` Daniel Vetter
2021-08-05 18:40 ` Thomas Zimmermann
2021-07-13 20:51 ` [Intel-gfx] [PATCH v4 4/4] drm/vgem: use shmem helpers Daniel Vetter
2021-07-14 12:45 ` [Intel-gfx] [PATCH] " Daniel Vetter
2021-07-22 18:50 ` [Intel-gfx] [PATCH v4 4/4] " Thomas Zimmermann
2021-07-23 7:38 ` Daniel Vetter
2021-07-13 23:43 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for shmem helpers for vgem (rev6) Patchwork
2021-07-14 0:11 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-07-16 13:29 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for shmem helpers for vgem (rev8) Patchwork
2021-07-16 13:58 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-07-16 16:43 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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