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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Animesh Manna <animesh.manna@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
	Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: Re: [Intel-gfx] [PATCH v3] drm/i915/dsb: Pre allocate and late cleanup of cmd buffer
Date: Thu, 2 Apr 2020 13:05:47 +0200	[thread overview]
Message-ID: <52e97ce9-b84e-21db-9e9b-885a08b8d488@linux.intel.com> (raw)
In-Reply-To: <20200212144522.23121-1-animesh.manna@intel.com>

Hey,

Op 12-02-2020 om 15:45 schreef Animesh Manna:
> Pre-allocate command buffer in atomic_commit using intel_dsb_prepare
> function which also includes pinning and map in cpu domain.
>
> No change is dsb write/commit functions.
>
> Now dsb get/put function is refactored and currently used only for
> reference counting. Below dsb api added to do respective job
> mentioned below.
>
> intel_dsb_prepare - Allocate, pin and map the buffer.
> intel_dsb_cleanup - Unpin and release the gem object.
>
> RFC: Initial patch for design review.
> v2: included _init() part in _prepare(). [Daniel, Ville]
> v3: dsb_cleanup called after cleanup_planes. [Daniel]
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c |  36 ++++-
>  drivers/gpu/drm/i915/display/intel_dsb.c     | 132 ++++++++++++-------
>  drivers/gpu/drm/i915/display/intel_dsb.h     |   2 +
>  3 files changed, 116 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 61ba1f2256a0..ae90687e3a6b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15076,6 +15076,19 @@ static int intel_atomic_check(struct drm_device *dev,
>  
>  static int intel_atomic_prepare_commit(struct intel_atomic_state *state)
>  {
> +	struct intel_crtc_state *crtc_state;
> +	struct intel_crtc *crtc;
> +	int i;
> +
> +	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
> +		bool mode_changed = needs_modeset(crtc_state);
> +
> +		if (mode_changed || crtc_state->update_pipe ||
> +		    crtc_state->uapi.color_mgmt_changed) {
> +			intel_dsb_prepare(crtc);
> +		}
> +	}
> +
>  	return drm_atomic_helper_prepare_planes(state->base.dev,
>  						&state->base);
>  }

DSB should be moved to crtc_state, as we may otherwise race between concurrent dsb_prepare() and dsb_cleanup().

Additionally, there should probably be some error handling like this:


int err = drm_atomic_helper_prepare_planes(state->base.dev, &state->base);

if (err) return err;

err = intel_dsb_prepare();

if (err)

intel_dsb_cleanup(previous); and drm_atomic_helper_cleanup_planes();

return err;


Otherwise looks good. :)



> @@ -15643,15 +15656,26 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat
>  		    &wait_reset);
>  }
>  
> +static void intel_cleanup_dsbs(struct intel_atomic_state *state)
> +{
> +	struct intel_crtc_state *crtc_state;
> +	struct intel_crtc *crtc;
> +	int i;
> +
> +	for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i)
> +		intel_dsb_cleanup(crtc);
> +}
> +
>  static void intel_atomic_cleanup_work(struct work_struct *work)
>  {
> -	struct drm_atomic_state *state =
> -		container_of(work, struct drm_atomic_state, commit_work);
> -	struct drm_i915_private *i915 = to_i915(state->dev);
> +	struct intel_atomic_state *state =
> +		container_of(work, struct intel_atomic_state, base.commit_work);
> +	struct drm_i915_private *i915 = to_i915(state->base.dev);
>  
> -	drm_atomic_helper_cleanup_planes(&i915->drm, state);
> -	drm_atomic_helper_commit_cleanup_done(state);
> -	drm_atomic_state_put(state);
> +	drm_atomic_helper_cleanup_planes(&i915->drm, &state->base);
> +	intel_cleanup_dsbs(state);
> +	drm_atomic_helper_commit_cleanup_done(&state->base);
> +	drm_atomic_state_put(&state->base);
>  
>  	intel_atomic_helper_free_state(i915);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 76ae01277fd6..c31132c41e0f 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -34,6 +34,86 @@
>  #define DSB_BYTE_EN_SHIFT		20
>  #define DSB_REG_VALUE_MASK		0xfffff
>  
> +/**
> + * intel_dsb_prepare() - Allocate, pin and map the DSB command buffer.
> + * @crtc: intel_crtc structure to get pipe info.
> + *
> + * This function prepare the command buffer which is used to store dsb
> + * instructions with data.
> + */
> +
> +void intel_dsb_prepare(struct intel_crtc *crtc)
> +{
> +	struct drm_device *dev = crtc->base.dev;
> +	struct drm_i915_private *i915 = to_i915(dev);
> +	struct intel_dsb *dsb = &crtc->dsb;
> +	struct drm_i915_gem_object *obj;
> +	struct i915_vma *vma;
> +	u32 *buf;
> +	intel_wakeref_t wakeref;
> +
> +	if (!HAS_DSB(i915) || dsb->cmd_buf)
> +		return;
> +
> +	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +
> +	obj = i915_gem_object_create_internal(i915, DSB_BUF_SIZE);
> +	if (IS_ERR(obj)) {
> +		DRM_ERROR("Gem object creation failed\n");
> +		goto out;
> +	}
> +
> +	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
> +	if (IS_ERR(vma)) {
> +		DRM_ERROR("Vma creation failed\n");
> +		i915_gem_object_put(obj);
> +		goto out;
> +	}
> +
> +	buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
> +	if (IS_ERR(buf)) {
> +		DRM_ERROR("Command buffer creation failed\n");
> +		goto out;
> +	}
> +
> +	dsb->id = DSB1;
> +	dsb->vma = vma;
> +	dsb->cmd_buf = buf;
> +
> +out:
> +	/*
> +	 * On error dsb->cmd_buf will continue to be NULL, making the writes
> +	 * pass-through. Leave the dangling ref to be removed later by the
> +	 * corresponding intel_dsb_put(): the important error message will
> +	 * already be logged above.
> +	 */
> +
> +	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> +}
> +
> +/**
> + * intel_dsb_cleanup() - To cleanup DSB context.
> + * @dsb: intel_dsb structure.
> + *
> + * This function cleanup the DSB context by unpinning and releasing
> + * the VMA object associated with it.
> + */
> +
> +void intel_dsb_cleanup(struct intel_crtc *crtc)
> +{
> +	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> +	struct intel_dsb *dsb = &crtc->dsb;
> +
> +	if (!HAS_DSB(i915))
> +		return;
> +
> +	if (dsb->vma) {
> +		i915_vma_unpin_and_release(&dsb->vma, I915_VMA_RELEASE_MAP);
> +		dsb->vma = NULL;
> +		dsb->cmd_buf = NULL;
> +	}
> +}
> +
>  static inline bool is_dsb_busy(struct intel_dsb *dsb)
>  {
>  	struct intel_crtc *crtc = container_of(dsb, typeof(*crtc), dsb);
> @@ -84,14 +164,13 @@ static inline bool intel_dsb_disable_engine(struct intel_dsb *dsb)
>  }
>  
>  /**
> - * intel_dsb_get() - Allocate DSB context and return a DSB instance.
> + * intel_dsb_get() - Return a DSB instance and increase reference count.
>   * @crtc: intel_crtc structure to get pipe info.
>   *
>   * This function provides handle of a DSB instance, for the further DSB
>   * operations.
>   *
>   * Returns: address of Intel_dsb instance requested for.
> - * Failure: Returns the same DSB instance, but without a command buffer.
>   */
>  
>  struct intel_dsb *
> @@ -100,52 +179,11 @@ intel_dsb_get(struct intel_crtc *crtc)
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *i915 = to_i915(dev);
>  	struct intel_dsb *dsb = &crtc->dsb;
> -	struct drm_i915_gem_object *obj;
> -	struct i915_vma *vma;
> -	u32 *buf;
> -	intel_wakeref_t wakeref;
>  
>  	if (!HAS_DSB(i915))
>  		return dsb;
>  
> -	if (dsb->refcount++ != 0)
> -		return dsb;
> -
> -	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> -
> -	obj = i915_gem_object_create_internal(i915, DSB_BUF_SIZE);
> -	if (IS_ERR(obj)) {
> -		DRM_ERROR("Gem object creation failed\n");
> -		goto out;
> -	}
> -
> -	vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, 0);
> -	if (IS_ERR(vma)) {
> -		DRM_ERROR("Vma creation failed\n");
> -		i915_gem_object_put(obj);
> -		goto out;
> -	}
> -
> -	buf = i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
> -	if (IS_ERR(buf)) {
> -		DRM_ERROR("Command buffer creation failed\n");
> -		goto out;
> -	}
> -
> -	dsb->id = DSB1;
> -	dsb->vma = vma;
> -	dsb->cmd_buf = buf;
> -
> -out:
> -	/*
> -	 * On error dsb->cmd_buf will continue to be NULL, making the writes
> -	 * pass-through. Leave the dangling ref to be removed later by the
> -	 * corresponding intel_dsb_put(): the important error message will
> -	 * already be logged above.
> -	 */
> -
> -	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> -
> +	dsb->refcount++;
>  	return dsb;
>  }
>  
> @@ -153,8 +191,8 @@ intel_dsb_get(struct intel_crtc *crtc)
>   * intel_dsb_put() - To destroy DSB context.
>   * @dsb: intel_dsb structure.
>   *
> - * This function destroys the DSB context allocated by a dsb_get(), by
> - * unpinning and releasing the VMA object associated with it.
> + * This function decrease the reference count and reset the command
> + * buffer position.
>   */
>  
>  void intel_dsb_put(struct intel_dsb *dsb)
> @@ -169,8 +207,6 @@ void intel_dsb_put(struct intel_dsb *dsb)
>  		return;
>  
>  	if (--dsb->refcount == 0) {
> -		i915_vma_unpin_and_release(&dsb->vma, I915_VMA_RELEASE_MAP);
> -		dsb->cmd_buf = NULL;
>  		dsb->free_pos = 0;
>  		dsb->ins_start_offset = 0;
>  	}
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.h b/drivers/gpu/drm/i915/display/intel_dsb.h
> index 395ef9ce558e..1dcce198899a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.h
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.h
> @@ -41,6 +41,8 @@ struct intel_dsb {
>  	u32 ins_start_offset;
>  };
>  
> +void intel_dsb_prepare(struct intel_crtc *crtc);
> +void intel_dsb_cleanup(struct intel_crtc *crtc);
>  struct intel_dsb *
>  intel_dsb_get(struct intel_crtc *crtc);
>  void intel_dsb_put(struct intel_dsb *dsb);


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      parent reply	other threads:[~2020-04-02 11:05 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-02-12 14:45 [Intel-gfx] [PATCH v3] drm/i915/dsb: Pre allocate and late cleanup of cmd buffer Animesh Manna
2020-02-13  3:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsb: Pre allocate and late cleanup of cmd buffer (rev2) Patchwork
2020-02-16  9:50 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-02-24 16:34 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-03-05  9:00 ` [Intel-gfx] [PATCH v3] drm/i915/dsb: Pre allocate and late cleanup of cmd buffer Daniel Vetter
2020-04-02 11:05 ` Maarten Lankhorst [this message]

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