From: Eric Anholt <eric@anholt.net>
To: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/2] drm/i915: Fix PIPE_CONTROL command on Sandybridge
Date: Fri, 28 May 2010 11:12:04 -0700 [thread overview]
Message-ID: <877hmnc2vf.fsf@pollan.anholt.net> (raw)
In-Reply-To: <1274927203-1467-1-git-send-email-zhenyuw@linux.intel.com>
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On Thu, 27 May 2010 10:26:42 +0800, Zhenyu Wang <zhenyuw@linux.intel.com> wrote:
> Sandybridge(Gen6) has new format for PIPE_CONTROL command,
> the flush and post-op control are in dword 1 now. This
> changes command length field for difference between Ironlake
> and Sandybridge.
>
> I tried to test this with noop request and issue PIPE_CONTROL
> command for each sequence and track notify interrupts, which
> seems work fine. Hopefully we don't need workaround like on
> Ironlake for Sandybridge.
>
> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
I rebased this to drm-intel-next and just chained the if statements
instead of nesting the ironlake code farther down.
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prev parent reply other threads:[~2010-05-28 18:12 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-05-27 2:26 [PATCH 1/2] drm/i915: Fix PIPE_CONTROL command on Sandybridge Zhenyu Wang
2010-05-27 2:26 ` [PATCH 2/2] drm/i915: Unmask interrupt for render engine " Zhenyu Wang
2010-05-28 18:12 ` Eric Anholt [this message]
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